From nobody Mon Feb 9 02:14:41 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1495655380997403.7371681777631; Wed, 24 May 2017 12:49:40 -0700 (PDT) Received: from localhost ([::1]:56583 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dDcHr-0001bb-Ee for importer@patchew.org; Wed, 24 May 2017 15:49:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45557) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dDbsa-00029G-MQ for qemu-devel@nongnu.org; Wed, 24 May 2017 15:23:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dDbsZ-0001lu-Gc for qemu-devel@nongnu.org; Wed, 24 May 2017 15:23:32 -0400 Received: from mail-qt0-x243.google.com ([2607:f8b0:400d:c0d::243]:33276) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dDbsZ-0001lk-B9 for qemu-devel@nongnu.org; Wed, 24 May 2017 15:23:31 -0400 Received: by mail-qt0-x243.google.com with SMTP id a46so27549695qte.0 for ; Wed, 24 May 2017 12:23:31 -0700 (PDT) Received: from bigtime.twiddle.net.com ([2602:47:d954:1500:5e51:4fff:fe40:9c64]) by smtp.gmail.com with ESMTPSA id b23sm3296240qkb.31.2017.05.24.12.23.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 24 May 2017 12:23:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=mFcPbxjGtmKq4m2V6YHauxduMk0dlvzqh0LE8RqQqf8=; b=CgQi4QIRYs4DK+ot4W6SsjcqnGvSsW5qc1BPnAamwZ7kB5Oje7PHJEm6ufbq3eRgaR rKVGcClgQ8lnxOWVpeYueHMhEzKAOKhu4PFHgrHlCX6kV1VlRlGmUEarzK1uI0OXSwQn 27zD4kfhMQ+XFKOZC9F997/fnj8f/8J8LBwTaBAQ8HQ+elVpnpopyuCS0z+oFQS+PIz/ qHYm8wUX4gsz9HjZxePavgmdZnVmsinil1iLBmt/HFpuXQQ8xzpzoY8lpZ2AbV0EcyzW oGCZfDAuY8AmA0qITnTlv+gqK0O4jJnqLXmQj3hPAw7Rpc8yZgGYmgFsvrATcK4wNfo6 MfQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=mFcPbxjGtmKq4m2V6YHauxduMk0dlvzqh0LE8RqQqf8=; b=b9WAWOd0grDrmcJMA6E2UFAOtN1+oPKZmX/BZuqw2IK2sdSGoDXQOJ7ZqWPbZ1SgZK 6ATr0yPKav9wfn81Yua+KO7tMMCqJeomvKu4ymw9SDbb+dRk7OFrmHK2w48Mhj/Q49jd k5BfRMUY+EhVbR20WDkguFd+Ng0THI97HVy0fMkueGRq2Oo6KzB2MZPPi+4LxawmgBk4 RgEYufxdTc5mH5KfzlCBNV8dB6f8fL57GqpIUqXR3awNkjTdBaXnGxxfmy4eVGHMH1U1 RhCKnUtCJS3YskxsmtHzYSJFDRI8Du23CaN2aAlFYNY9zdD0vDMJRaxsCZ28+U65nqik UUAA== X-Gm-Message-State: AODbwcClz4QDlN137jYlHEttSG16KZ+SFuYjLRPeMa3rdskBeh/nh8DZ JEIVktpGit1lXQ== X-Received: by 10.237.63.39 with SMTP id p36mr35408933qtf.81.1495653810838; Wed, 24 May 2017 12:23:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 24 May 2017 12:22:43 -0700 Message-Id: <20170524192246.15905-31-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170524192246.15905-1-rth@twiddle.net> References: <20170524192246.15905-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::243 Subject: [Qemu-devel] [PATCH v2 30/33] target/s390x: Fix some helper_ex problems X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" (1) The OR of the low bits or R1 into INSN were not being done consistently; it was forgotten along all but the SVC path. (2) The setting of ILEN was wrong on SVC path for EXRL. (3) The data load for ICM read too much. Fix these by consolidating data load at the beginning, using get_ilen to control the number of bytes loaded, and ORing in the byte from R1. Use extract64 from the full aligned insn to extract arguments. Pass in ILEN rather than RET as the more natural way to give the required data along the SVC path. Modify ENV->CC_OP directly rather than include it in the functional interface. Signed-off-by: Richard Henderson Reviewed-by: Aurelien Jarno --- target/s390x/helper.h | 2 +- target/s390x/mem_helper.c | 135 +++++++++++++++++++++++++-----------------= ---- target/s390x/translate.c | 8 +-- 3 files changed, 78 insertions(+), 67 deletions(-) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index ea35834..3819409 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -14,7 +14,7 @@ DEF_HELPER_4(srst, i64, env, i64, i64, i64) DEF_HELPER_4(clst, i64, env, i64, i64, i64) DEF_HELPER_FLAGS_4(mvpg, TCG_CALL_NO_WG, i32, env, i64, i64, i64) DEF_HELPER_4(mvst, i64, env, i64, i64, i64) -DEF_HELPER_5(ex, i32, env, i32, i64, i64, i64) +DEF_HELPER_4(ex, void, env, i32, i64, i64) DEF_HELPER_FLAGS_4(stam, TCG_CALL_NO_WG, void, env, i32, i64, i32) DEF_HELPER_FLAGS_4(lam, TCG_CALL_NO_WG, void, env, i32, i64, i32) DEF_HELPER_4(mvcle, i32, env, i32, i64, i32) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index a73d486..fa03129 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -1245,76 +1245,87 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t a= ddr) in other words: tricky... currently implemented by interpreting the cases it is most commonly use= d. */ -uint32_t HELPER(ex)(CPUS390XState *env, uint32_t cc, uint64_t v1, - uint64_t addr, uint64_t ret) +void HELPER(ex)(CPUS390XState *env, uint32_t ilen, uint64_t r1, uint64_t a= ddr) { S390CPU *cpu =3D s390_env_get_cpu(env); - uint16_t insn =3D cpu_lduw_code(env, addr); - - HELPER_LOG("%s: v1 0x%lx addr 0x%lx insn 0x%x\n", __func__, v1, addr, - insn); - if ((insn & 0xf0ff) =3D=3D 0xd000) { - uint32_t l, insn2, b1, b2, d1, d2; - - l =3D v1 & 0xff; - insn2 =3D cpu_ldl_code(env, addr + 2); - b1 =3D (insn2 >> 28) & 0xf; - b2 =3D (insn2 >> 12) & 0xf; - d1 =3D (insn2 >> 16) & 0xfff; - d2 =3D insn2 & 0xfff; - switch (insn & 0xf00) { - case 0x200: + uint64_t insn =3D cpu_lduw_code(env, addr); + uint8_t opc =3D insn >> 8; + + /* Or in the contents of R1[56:63]. */ + insn |=3D r1 & 0xff; + + /* Load the rest of the instruction. */ + insn <<=3D 48; + switch (get_ilen(opc)) { + case 2: + break; + case 4: + insn |=3D (uint64_t)cpu_lduw_code(env, addr + 2) << 32; + break; + case 6: + insn |=3D (uint64_t)(uint32_t)cpu_ldl_code(env, addr + 2) << 16; + break; + default: + g_assert_not_reached(); + } + + HELPER_LOG("%s: addr 0x%lx insn 0x%" PRIx64 "\n", __func__, addr, insn= ); + + if ((opc & 0xf0) =3D=3D 0xd0) { + uint32_t l, b1, b2, d1, d2; + + l =3D extract64(insn, 48, 8); + b1 =3D extract64(insn, 44, 4); + b2 =3D extract64(insn, 28, 4); + d1 =3D extract64(insn, 32, 12); + d2 =3D extract64(insn, 16, 12); + switch (opc & 0xf) { + case 0x2: do_helper_mvc(env, l, get_address(env, 0, b1, d1), get_address(env, 0, b2, d2), 0); - break; - case 0x400: - cc =3D do_helper_nc(env, l, get_address(env, 0, b1, d1), - get_address(env, 0, b2, d2), 0); - break; - case 0x500: - cc =3D do_helper_clc(env, l, get_address(env, 0, b1, d1), - get_address(env, 0, b2, d2), 0); - break; - case 0x600: - cc =3D do_helper_oc(env, l, get_address(env, 0, b1, d1), - get_address(env, 0, b2, d2), 0); - break; - case 0x700: - cc =3D do_helper_xc(env, l, get_address(env, 0, b1, d1), - get_address(env, 0, b2, d2), 0); - break; - case 0xc00: + return; + case 0x4: + env->cc_op =3D do_helper_nc(env, l, get_address(env, 0, b1, d1= ), + get_address(env, 0, b2, d2), 0); + return; + case 0x5: + env->cc_op =3D do_helper_clc(env, l, get_address(env, 0, b1, d= 1), + get_address(env, 0, b2, d2), 0); + return; + case 0x6: + env->cc_op =3D do_helper_oc(env, l, get_address(env, 0, b1, d1= ), + get_address(env, 0, b2, d2), 0); + return; + case 0x7: + env->cc_op =3D do_helper_xc(env, l, get_address(env, 0, b1, d1= ), + get_address(env, 0, b2, d2), 0); + return; + case 0xc: do_helper_tr(env, l, get_address(env, 0, b1, d1), get_address(env, 0, b2, d2), 0); - return cc; - case 0xd00: - cc =3D do_helper_trt(env, l, get_address(env, 0, b1, d1), - get_address(env, 0, b2, d2), 0); - break; - default: - goto abort; + return; + case 0xd: + env->cc_op =3D do_helper_trt(env, l, get_address(env, 0, b1, d= 1), + get_address(env, 0, b2, d2), 0); + return; } - } else if ((insn & 0xff00) =3D=3D 0x0a00) { + } else if (opc =3D=3D 0x0a) { /* supervisor call */ - HELPER_LOG("%s: svc %ld via execute\n", __func__, (insn | v1) & 0x= ff); - env->psw.addr =3D ret - 4; - env->int_svc_code =3D (insn | v1) & 0xff; - env->int_svc_ilen =3D 4; + env->int_svc_code =3D extract64(insn, 48, 8); + env->int_svc_ilen =3D ilen; helper_exception(env, EXCP_SVC); - } else if ((insn & 0xff00) =3D=3D 0xbf00) { - uint32_t insn2, r1, r3, b2, d2; - - insn2 =3D cpu_ldl_code(env, addr + 2); - r1 =3D (insn2 >> 20) & 0xf; - r3 =3D (insn2 >> 16) & 0xf; - b2 =3D (insn2 >> 12) & 0xf; - d2 =3D insn2 & 0xfff; - cc =3D helper_icm(env, r1, get_address(env, 0, b2, d2), r3); - } else { - abort: - cpu_abort(CPU(cpu), - "EXECUTE on instruction prefix 0x%x not implemented\n", - insn); + return; + } else if (opc =3D=3D 0xbf) { + uint32_t r1, r3, b2, d2; + + r1 =3D extract64(insn, 52, 4); + r3 =3D extract64(insn, 48, 4); + b2 =3D extract64(insn, 44, 4); + d2 =3D extract64(insn, 32, 12); + env->cc_op =3D helper_icm(env, r1, get_address(env, 0, b2, d2), r3= ); + return; } - return cc; + + cpu_abort(CPU(cpu), "EXECUTE on instruction prefix 0x%x not implemente= d\n", + opc); } diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 422bbf1..921a842 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -2159,14 +2159,14 @@ static ExitStatus op_ex(DisasContext *s, DisasOps *= o) MVC inside of memcpy, which needs a helper call anyway. So perhaps this doesn't bear thinking about any further. */ =20 - TCGv_i64 tmp; + TCGv_i32 ilen; =20 update_psw_addr(s); gen_op_calc_cc(s); =20 - tmp =3D tcg_const_i64(s->next_pc); - gen_helper_ex(cc_op, cpu_env, cc_op, o->in1, o->in2, tmp); - tcg_temp_free_i64(tmp); + ilen =3D tcg_const_i32(s->next_pc - s->pc); + gen_helper_ex(cpu_env, ilen, o->in1, o->in2); + tcg_temp_free_i32(ilen); =20 return NO_EXIT; } --=20 2.9.4