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dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=kraxel@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 5F7C53D95E From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Thu, 11 May 2017 16:43:37 +0200 Message-Id: <20170511144339.13027-3-kraxel@redhat.com> In-Reply-To: <20170511144339.13027-1-kraxel@redhat.com> References: <20170511144339.13027-1-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Thu, 11 May 2017 14:43:47 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 2/4] tcx: make display updates thread safe X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , Gerd Hoffmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Mark Cave-Ayland Signed-off-by: Mark Cave-Ayland Message-id: 1494449551-20227-3-git-send-email-mark.cave-ayland@ilande.co.uk Signed-off-by: Gerd Hoffmann --- hw/display/tcx.c | 68 ++++++++++++++++++++--------------------------------= ---- 1 file changed, 24 insertions(+), 44 deletions(-) diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 0e66dcd055..6593c1d6af 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -104,36 +104,23 @@ static void tcx_set_dirty(TCXState *s, ram_addr_t add= r, int len) } } =20 -static int tcx_check_dirty(TCXState *s, ram_addr_t addr, int len) +static int tcx_check_dirty(TCXState *s, DirtyBitmapSnapshot *snap, + ram_addr_t addr, int len) { int ret; =20 - ret =3D memory_region_get_dirty(&s->vram_mem, addr, len, DIRTY_MEMORY_= VGA); + ret =3D memory_region_snapshot_get_dirty(&s->vram_mem, snap, addr, len= ); =20 if (s->depth =3D=3D 24) { - ret |=3D memory_region_get_dirty(&s->vram_mem, - s->vram24_offset + addr * 4, len * = 4, - DIRTY_MEMORY_VGA); - ret |=3D memory_region_get_dirty(&s->vram_mem, - s->cplane_offset + addr * 4, len * = 4, - DIRTY_MEMORY_VGA); + ret |=3D memory_region_snapshot_get_dirty(&s->vram_mem, snap, + s->vram24_offset + addr * 4, len * = 4); + ret |=3D memory_region_snapshot_get_dirty(&s->vram_mem, snap, + s->cplane_offset + addr * 4, len * = 4); } =20 return ret; } =20 -static void tcx_reset_dirty(TCXState *s, ram_addr_t addr, int len) -{ - memory_region_reset_dirty(&s->vram_mem, addr, len, DIRTY_MEMORY_VGA); - - if (s->depth =3D=3D 24) { - memory_region_reset_dirty(&s->vram_mem, s->vram24_offset + addr * = 4, - len * 4, DIRTY_MEMORY_VGA); - memory_region_reset_dirty(&s->vram_mem, s->cplane_offset + addr * = 4, - len * 4, DIRTY_MEMORY_VGA); - } -} - static void update_palette_entries(TCXState *s, int start, int end) { DisplaySurface *surface =3D qemu_console_surface(s->con); @@ -233,7 +220,8 @@ static void tcx_update_display(void *opaque) { TCXState *ts =3D opaque; DisplaySurface *surface =3D qemu_console_surface(ts->con); - ram_addr_t page, page_min, page_max; + ram_addr_t page; + DirtyBitmapSnapshot *snap =3D NULL; int y, y_start, dd, ds; uint8_t *d, *s; =20 @@ -243,22 +231,20 @@ static void tcx_update_display(void *opaque) =20 page =3D 0; y_start =3D -1; - page_min =3D -1; - page_max =3D 0; d =3D surface_data(surface); s =3D ts->vram; dd =3D surface_stride(surface); ds =3D 1024; =20 memory_region_sync_dirty_bitmap(&ts->vram_mem); + snap =3D memory_region_snapshot_and_clear_dirty(&ts->vram_mem, 0x0, + memory_region_size(&ts->vram_= mem), + DIRTY_MEMORY_VGA); + for (y =3D 0; y < ts->height; y++, page +=3D ds) { - if (tcx_check_dirty(ts, page, ds)) { + if (tcx_check_dirty(ts, snap, page, ds)) { if (y_start < 0) y_start =3D y; - if (page < page_min) - page_min =3D page; - if (page > page_max) - page_max =3D page; =20 tcx_draw_line32(ts, d, s, ts->width); if (y >=3D ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->= width) { @@ -280,17 +266,15 @@ static void tcx_update_display(void *opaque) dpy_gfx_update(ts->con, 0, y_start, ts->width, y - y_start); } - /* reset modified pages */ - if (page_max >=3D page_min) { - tcx_reset_dirty(ts, page_min, page_max - page_min); - } + g_free(snap); } =20 static void tcx24_update_display(void *opaque) { TCXState *ts =3D opaque; DisplaySurface *surface =3D qemu_console_surface(ts->con); - ram_addr_t page, page_min, page_max; + ram_addr_t page; + DirtyBitmapSnapshot *snap =3D NULL; int y, y_start, dd, ds; uint8_t *d, *s; uint32_t *cptr, *s24; @@ -301,8 +285,6 @@ static void tcx24_update_display(void *opaque) =20 page =3D 0; y_start =3D -1; - page_min =3D -1; - page_max =3D 0; d =3D surface_data(surface); s =3D ts->vram; s24 =3D ts->vram24; @@ -311,14 +293,15 @@ static void tcx24_update_display(void *opaque) ds =3D 1024; =20 memory_region_sync_dirty_bitmap(&ts->vram_mem); + snap =3D memory_region_snapshot_and_clear_dirty(&ts->vram_mem, 0x0, + memory_region_size(&ts->vram_= mem), + DIRTY_MEMORY_VGA); + for (y =3D 0; y < ts->height; y++, page +=3D ds) { - if (tcx_check_dirty(ts, page, ds)) { + if (tcx_check_dirty(ts, snap, page, ds)) { if (y_start < 0) y_start =3D y; - if (page < page_min) - page_min =3D page; - if (page > page_max) - page_max =3D page; + tcx24_draw_line32(ts, d, s, ts->width, cptr, s24); if (y >=3D ts->cursy && y < ts->cursy+32 && ts->cursx < ts->wi= dth) { tcx_draw_cursor32(ts, d, y, ts->width); @@ -341,10 +324,7 @@ static void tcx24_update_display(void *opaque) dpy_gfx_update(ts->con, 0, y_start, ts->width, y - y_start); } - /* reset modified pages */ - if (page_max >=3D page_min) { - tcx_reset_dirty(ts, page_min, page_max - page_min); - } + g_free(snap); } =20 static void tcx_invalidate_display(void *opaque) --=20 2.9.3