From nobody Fri Dec 19 18:59:13 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494400126986674.6998216918588; Wed, 10 May 2017 00:08:46 -0700 (PDT) Received: from localhost ([::1]:40740 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8Ljp-0008UW-Hy for importer@patchew.org; Wed, 10 May 2017 03:08:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42645) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8Lcq-0002T1-V1 for qemu-devel@nongnu.org; Wed, 10 May 2017 03:01:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d8Lcp-0007pV-G5 for qemu-devel@nongnu.org; Wed, 10 May 2017 03:01:32 -0400 Received: from ozlabs.org ([103.22.144.67]:36349) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d8Lcp-0007nf-2p; Wed, 10 May 2017 03:01:31 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 3wN6bR6C26z9s8H; Wed, 10 May 2017 17:01:22 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1494399683; bh=QK+UoOG4kA8QcLfXYYjVcIBrJv0eTlTr4n1If4cXqVY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=H1fxyLApBTr6vLmNNBnn69FFFMglof77yzKRy9jJK8tsDkbDV6z2Z0z87cshPOlJj ydoSAeKhwXsKy+tN+sfaIPApu1IqLTN8Sum3lYZwPrlt0UIyoBaJvwUXrLAJs2SAwD qti/e6ygvEztyYwSBJLTxREe9eBgcSVVfCYZdIvo= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 10 May 2017 17:01:08 +1000 Message-Id: <20170510070115.13063-16-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170510070115.13063-1-david@gibson.dropbear.id.au> References: <20170510070115.13063-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 15/22] target/ppc: Update tlbie to check privilege level based on GTSE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mdroth@linux.vnet.ibm.com, nikunj@linux.vnet.ibm.com, aik@ozlabs.ru, mark.cave-ayland@ilande.co.uk, agraf@suse.de, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, clg@kaod.org, sjitindarsingh@gmail.com, bharata@linux.vnet.ibm.com, sam.bobroff@au1.ibm.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Suraj Jitindar Singh The Guest Translation Shootdown Enable (GTSE) bit in the Logical Partition Control Register (LPCR) can be set to enable a guest to use the tlbie instruction directly to invalidate translations. When the GTSE bit is set then the tlbie instruction is supervisor privileged, otherwise it is hypervisor privileged. Add a guest translation shootdown enable (gtse) field to the diassembly context and use this to check the correct privilege level at code generation time. Signed-off-by: Suraj Jitindar Singh Reviewed-by: David Gibson Signed-off-by: David Gibson --- target/ppc/translate.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 4a1f24a..1ce6ab1 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -218,6 +218,7 @@ struct DisasContext { bool vsx_enabled; bool spe_enabled; bool tm_enabled; + bool gtse; ppc_spr_t *spr_cb; /* Needed to check rights for mfspr/mtspr */ int singlestep_enabled; uint64_t insns_flags; @@ -4538,7 +4539,12 @@ static void gen_tlbie(DisasContext *ctx) GEN_PRIV; #else TCGv_i32 t1; - CHK_HV; + + if (ctx->gtse) { + CHK_SV; /* If gtse is set then tblie is supervisor privileged */ + } else { + CHK_HV; /* Else hypervisor privileged */ + } =20 if (NARROW_MODE(ctx)) { TCGv t0 =3D tcg_temp_new(); @@ -7252,6 +7258,7 @@ void gen_intermediate_code(CPUPPCState *env, struct T= ranslationBlock *tb) ctx.tm_enabled =3D false; } #endif + ctx.gtse =3D !!(env->spr[SPR_LPCR] & LPCR_GTSE); if ((env->flags & POWERPC_FLAG_SE) && msr_se) ctx.singlestep_enabled =3D CPU_SINGLE_STEP; else --=20 2.9.3