From nobody Sun Feb 8 10:33:56 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494336611506592.5904292474721; Tue, 9 May 2017 06:30:11 -0700 (PDT) Received: from localhost ([::1]:37300 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d85DM-0004LO-2k for importer@patchew.org; Tue, 09 May 2017 09:30:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58218) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d85B6-0002hF-9b for qemu-devel@nongnu.org; Tue, 09 May 2017 09:27:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d85B3-00084J-Ai for qemu-devel@nongnu.org; Tue, 09 May 2017 09:27:48 -0400 Received: from mx1.redhat.com ([209.132.183.28]:40350) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d85B3-00083H-3e for qemu-devel@nongnu.org; Tue, 09 May 2017 09:27:45 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1404064F6; Tue, 9 May 2017 13:27:44 +0000 (UTC) Received: from t460.redhat.com (ovpn-117-114.ams2.redhat.com [10.36.117.114]) by smtp.corp.redhat.com (Postfix) with ESMTP id 194097E915; Tue, 9 May 2017 13:27:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 1404064F6 Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=berrange@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 1404064F6 From: "Daniel P. Berrange" To: qemu-devel@nongnu.org Date: Tue, 9 May 2017 14:27:35 +0100 Message-Id: <20170509132736.10071-2-berrange@redhat.com> In-Reply-To: <20170509132736.10071-1-berrange@redhat.com> References: <20170509132736.10071-1-berrange@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Tue, 09 May 2017 13:27:44 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v4 1/2] i386: rewrite way CPUID index is validated X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eduardo Habkost , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Change the nested if statements into a flat format, to make it clearer what validation / capping is being performed on different CPUID index values. NB this changes behaviour when "index > env->cpuid_xlevel2". This won't have any guest-visible effect because no there is no CPUID[0xC0000001] feature supported by TCG, and KVM code will never call cpu_x86_cpuid() with such an index value. Reviewed-by: Eduardo Habkost Signed-off-by: Daniel P. Berrange --- target/i386/cpu.c | 35 +++++++++++++++-------------------- 1 file changed, 15 insertions(+), 20 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 13c0985..8cb4af4 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2626,28 +2626,23 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index= , uint32_t count, X86CPU *cpu =3D x86_env_get_cpu(env); CPUState *cs =3D CPU(cpu); uint32_t pkg_offset; + uint32_t limit; =20 - /* test if maximum index reached */ - if (index & 0x80000000) { - if (index > env->cpuid_xlevel) { - if (env->cpuid_xlevel2 > 0) { - /* Handle the Centaur's CPUID instruction. */ - if (index > env->cpuid_xlevel2) { - index =3D env->cpuid_xlevel2; - } else if (index < 0xC0000000) { - index =3D env->cpuid_xlevel; - } - } else { - /* Intel documentation states that invalid EAX input will - * return the same information as EAX=3Dcpuid_level - * (Intel SDM Vol. 2A - Instruction Set Reference - CPUID) - */ - index =3D env->cpuid_level; - } - } + /* Calculate & apply limits for different index ranges */ + if (index >=3D 0xC0000000) { + limit =3D env->cpuid_xlevel2; + } else if (index >=3D 0x80000000) { + limit =3D env->cpuid_xlevel; } else { - if (index > env->cpuid_level) - index =3D env->cpuid_level; + limit =3D env->cpuid_level; + } + + if (index > limit) { + /* Intel documentation states that invalid EAX input will + * return the same information as EAX=3Dcpuid_level + * (Intel SDM Vol. 2A - Instruction Set Reference - CPUID) + */ + index =3D env->cpuid_level; } =20 switch(index) { --=20 2.9.3