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[80.29.7.251]) by smtp.gmail.com with ESMTPSA id i199sm3056470wmf.33.2017.04.27.05.00.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 27 Apr 2017 05:00:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=2kW66JtAdGMGoKO4X8R/B6BxYBYIjV6+Ab53z4C+qKQ=; b=soW24XLpFzz25Il6ujOz9NRDX2eOqi5xmzjydRej8yeBYh9FStAMcqU8rzw9DshmG0 Ui4767hh8B5n6zep7FZlmuw0/6OynZ1T2n8CD6v9bHDuq/VSyyRECvxoCC4qQq90MUJi MhtH35O7i2HgI6yW0HZTPhQyKG5ImOk084FxMEFPhdDXButzqN9yXqA6PwVnOJeJO5Ij Z/v/OSiYSThqQm4W0MSTJ564oFFSVdRVO+Bl7pOM0YI9furUenVE5gcrmAFlyPGu9r7U lw2NSUZF/njMuriwrieCbFi5PdB+rs+/Yyi1G82AK09/wb3Gv2Z+X3yeEakB023+S5OR Neug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=2kW66JtAdGMGoKO4X8R/B6BxYBYIjV6+Ab53z4C+qKQ=; b=VzVPRbXGTnXS+BNTY1Bj4HA7ElNR27R4Nifaw0Gc7Ming4sG/vTTpVNY1AxqaxAwy9 MXQGFBbv0HKHBkpxyAngM8dD//Nsa1aJvO4V0kHX6bS3P3LfWVDUobIf9EhB/Wu9CMIy /rkKGREgbxynpq2UCVqhGnZDLdvxbDSDeZsJFurSHKrPBmDw5qbLrkGDR8pKNt51yuYr enZ4886hBerEwl+FrfP9gPvf0vRYVvojiD8FnBGfdpfm6/0eMDGYxMfYJP3uhEu03sWj QGFZU6ak6XsVFiNq0kCeUxQz0r9updQkrokjhmx1FZtkyv9byLEm74nHOIxngiMttVcG YmIQ== X-Gm-Message-State: AN3rC/5QGT+2kt9hs6Yw93qrWIbtXzd57e9sjyrmm69xhKtjr+/AxHKy tASUl/351iUv3A== X-Received: by 10.28.175.209 with SMTP id y200mr2110567wme.81.1493294430000; Thu, 27 Apr 2017 05:00:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 27 Apr 2017 14:00:01 +0200 Message-Id: <20170427120006.20564-15-rth@twiddle.net> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170427120006.20564-1-rth@twiddle.net> References: <20170427120006.20564-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::242 Subject: [Qemu-devel] [PATCH v5 14/19] target/alpha: Use tcg_gen_goto_ptr X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cota@braap.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- target/alpha/translate.c | 49 +++++++++++++++++++++++++++++++++++---------= ---- 1 file changed, 36 insertions(+), 13 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index df5d695..c1a5fbf 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -89,6 +89,10 @@ typedef enum { updated the PC for the next instruction to be executed. */ EXIT_PC_STALE, =20 + /* Similarly, but force TB exit without chaining. */ + EXIT_PC_UPDATED_FORCE, + EXIT_PC_STALE_FORCE, + /* We are ending the TB with a noreturn function call, e.g. longjmp. No following code will be executed. */ EXIT_NORETURN, @@ -455,11 +459,16 @@ static bool in_superpage(DisasContext *ctx, int64_t a= ddr) #endif } =20 +static bool use_exit_tb(DisasContext *ctx) +{ + /* Suppress any optimization in the case of single-steping and IO. */ + return ((ctx->tb->cflags & CF_LAST_IO) + || ctx->singlestep_enabled || singlestep); +} + static bool use_goto_tb(DisasContext *ctx, uint64_t dest) { - /* Suppress goto_tb in the case of single-steping and IO. */ - if ((ctx->tb->cflags & CF_LAST_IO) - || ctx->singlestep_enabled || singlestep) { + if (use_exit_tb(ctx)) { return false; } #ifndef CONFIG_USER_ONLY @@ -1257,14 +1266,14 @@ static ExitStatus gen_call_pal(DisasContext *ctx, i= nt palcode) need the page permissions check. We'll see the existence of the page when we create the TB, and we'll flush all TBs if we change the PAL base register. */ - if (!ctx->singlestep_enabled && !(ctx->tb->cflags & CF_LAST_IO)) { + if (use_exit_tb(ctx)) { + tcg_gen_movi_i64(cpu_pc, entry); + return EXIT_PC_UPDATED; + } else { tcg_gen_goto_tb(0); tcg_gen_movi_i64(cpu_pc, entry); tcg_gen_exit_tb((uintptr_t)ctx->tb); return EXIT_GOTO_TB; - } else { - tcg_gen_movi_i64(cpu_pc, entry); - return EXIT_PC_UPDATED; } } #endif @@ -1323,7 +1332,7 @@ static ExitStatus gen_mfpr(DisasContext *ctx, TCGv va= , int regno) gen_io_start(); helper(va); gen_io_end(); - return EXIT_PC_STALE; + return EXIT_PC_STALE_FORCE; } else { helper(va); } @@ -1374,7 +1383,7 @@ static ExitStatus gen_mtpr(DisasContext *ctx, TCGv vb= , int regno) case 252: /* HALT */ gen_helper_halt(vb); - return EXIT_PC_STALE; + return EXIT_PC_STALE_FORCE; =20 case 251: /* ALARM */ @@ -1388,7 +1397,7 @@ static ExitStatus gen_mtpr(DisasContext *ctx, TCGv vb= , int regno) that ended with a CALL_PAL. Since the base register usually on= ly changes during boot, flushing everything works well. */ gen_helper_tb_flush(cpu_env); - return EXIT_PC_STALE; + return EXIT_PC_STALE_FORCE; =20 case 32 ... 39: /* Accessing the "non-shadow" general registers. */ @@ -2373,7 +2382,7 @@ static ExitStatus translate_one(DisasContext *ctx, ui= nt32_t insn) gen_io_start(); gen_helper_load_pcc(va, cpu_env); gen_io_end(); - ret =3D EXIT_PC_STALE; + ret =3D EXIT_PC_STALE_FORCE; } else { gen_helper_load_pcc(va, cpu_env); } @@ -2990,18 +2999,32 @@ void gen_intermediate_code(CPUAlphaState *env, stru= ct TranslationBlock *tb) case EXIT_GOTO_TB: case EXIT_NORETURN: break; + case EXIT_PC_STALE: tcg_gen_movi_i64(cpu_pc, ctx.pc); - /* FALLTHRU */ + goto do_exit_pc_updated; + case EXIT_PC_STALE_FORCE: + tcg_gen_movi_i64(cpu_pc, ctx.pc); + goto do_exit_pc_updated_force; + case EXIT_PC_UPDATED: + do_exit_pc_updated: + if (!use_exit_tb(&ctx)) { + tcg_gen_lookup_and_goto_ptr(cpu_pc); + break; + } + /* FALLTHRU */ + case EXIT_PC_UPDATED_FORCE: + do_exit_pc_updated_force: if (ctx.singlestep_enabled) { gen_excp_1(EXCP_DEBUG, 0); } else { tcg_gen_exit_tb(0); } break; + default: - abort(); + g_assert_not_reached(); } =20 gen_tb_end(tb, num_insns); --=20 2.9.3