From nobody Sat Apr 27 20:57:42 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1491812030028947.3169799850017; Mon, 10 Apr 2017 01:13:50 -0700 (PDT) Received: from localhost ([::1]:32914 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cxUSK-0004z9-4j for importer@patchew.org; Mon, 10 Apr 2017 04:13:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44901) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cxURZ-0004gf-VS for qemu-devel@nongnu.org; Mon, 10 Apr 2017 04:13:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cxURW-0007ue-Qs for qemu-devel@nongnu.org; Mon, 10 Apr 2017 04:13:01 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:60730) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cxURW-0007uS-HH for qemu-devel@nongnu.org; Mon, 10 Apr 2017 04:12:58 -0400 Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.20/8.16.0.20) with SMTP id v3A89A3G028072 for ; Mon, 10 Apr 2017 04:12:45 -0400 Received: from e28smtp05.in.ibm.com ([125.16.236.5]) by mx0a-001b2d01.pphosted.com with ESMTP id 29r285ta3e-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Mon, 10 Apr 2017 04:12:44 -0400 Received: from localhost by e28smtp05.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Mon, 10 Apr 2017 13:42:39 +0530 Received: from d28av06.in.ibm.com (d28av06.in.ibm.com [9.184.220.48]) by d28relay02.in.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v3A8Ccnf13041900; Mon, 10 Apr 2017 13:42:38 +0530 Received: from d28av06.in.ibm.com (localhost [127.0.0.1]) by d28av06.in.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id v3A8Caw3016344; Mon, 10 Apr 2017 13:42:38 +0530 Received: from abhimanyu.in.ibm.com ([9.109.223.82]) by d28av06.in.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id v3A8Cahd016341; Mon, 10 Apr 2017 13:42:36 +0530 From: Nikunj A Dadhania To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net Date: Mon, 10 Apr 2017 13:42:17 +0530 X-Mailer: git-send-email 2.9.3 X-TM-AS-MML: disable x-cbid: 17041008-0016-0000-0000-000004066637 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17041008-0017-0000-0000-000028EFC42B Message-Id: <20170410081217.2897-1-nikunj@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-04-10_06:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1702020001 definitions=main-1704100068 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH for 2.10] tcg: enable MTTCG by default for PPC64 on x86 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nikunj@linux.vnet.ibm.com, qemu-devel@nongnu.org, programmingkidx@gmail.com, clg@kaod.org, intermediadc@hotmail.com, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This enables the multi-threaded system emulation by default for PPC64 guests using the x86_64 TCG back-end. Signed-off-by: Nikunj A Dadhania Reviewed-by: Alex Benn=C3=A9e --- Depends on following patch which fixes the define name: https://patchwork.ozlabs.org/patch/748840/ --- configure | 2 ++ target/ppc/cpu.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/configure b/configure index 4b3b5cd..2a87495 100755 --- a/configure +++ b/configure @@ -6008,12 +6008,14 @@ case "$target_name" in ppc64) TARGET_BASE_ARCH=3Dppc TARGET_ABI_DIR=3Dppc + mttcg=3Dyes gdb_xml_files=3D"power64-core.xml power-fpu.xml power-altivec.xml powe= r-spe.xml power-vsx.xml" ;; ppc64le) TARGET_ARCH=3Dppc64 TARGET_BASE_ARCH=3Dppc TARGET_ABI_DIR=3Dppc + mttcg=3Dyes gdb_xml_files=3D"power64-core.xml power-fpu.xml power-altivec.xml powe= r-spe.xml power-vsx.xml" ;; ppc64abi32) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index e0ff041..ece535d 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -30,6 +30,8 @@ #define TARGET_LONG_BITS 64 #define TARGET_PAGE_BITS 12 =20 +#define TCG_GUEST_DEFAULT_MO 0 + /* Note that the official physical address space bits is 62-M where M is implementation dependent. I've not looked up M for the set of cpus we emulate at the system level. */ --=20 2.9.3