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X-Received-From: 2a00:1450:400c:c0c::22f Subject: [Qemu-devel] [PATCH v2 07/12] cpus: move icount preparation out of tcg_exec_cpu X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mttcg@listserver.greensocs.com, peter.maydell@linaro.org, nikunj@linux.vnet.ibm.com, Peter Crosthwaite , a.rigo@virtualopensystems.com, qemu-devel@nongnu.org, cota@braap.org, bobby.prani@gmail.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 As icount is only supported for single-threaded execution due to the requirement for determinism let's remove it from the common tcg_exec_cpu path. Also remove the additional fiddling which shouldn't be required as the icount counters should all be rectified as you enter the loop. Signed-off-by: Alex Benn=C3=A9e --- v2 - only clear u16.low - drop BQL assert --- cpus.c | 67 ++++++++++++++++++++++++++++++++++++++++++++------------------= ---- 1 file changed, 45 insertions(+), 22 deletions(-) diff --git a/cpus.c b/cpus.c index 18b1746770..d9cb9407a2 100644 --- a/cpus.c +++ b/cpus.c @@ -1179,47 +1179,64 @@ static void handle_icount_deadline(void) } } =20 -static int tcg_cpu_exec(CPUState *cpu) +static void prepare_icount_for_run(CPUState *cpu) { - int ret; -#ifdef CONFIG_PROFILER - int64_t ti; -#endif - -#ifdef CONFIG_PROFILER - ti =3D profile_getclock(); -#endif if (use_icount) { int64_t count; int decr; - timers_state.qemu_icount -=3D (cpu->icount_decr.u16.low - + cpu->icount_extra); - cpu->icount_decr.u16.low =3D 0; - cpu->icount_extra =3D 0; + + /* These should always be cleared by process_icount_data after + * each vCPU execution. However u16.high can be raised + * asynchronously by cpu_exit/cpu_interrupt/tcg_handle_interrupt + */ + g_assert(cpu->icount_decr.u16.low =3D=3D 0); + g_assert(cpu->icount_extra =3D=3D 0); + + count =3D tcg_get_icount_limit(); + timers_state.qemu_icount +=3D count; decr =3D (count > 0xffff) ? 0xffff : count; count -=3D decr; cpu->icount_decr.u16.low =3D decr; cpu->icount_extra =3D count; } - qemu_mutex_unlock_iothread(); - cpu_exec_start(cpu); - ret =3D cpu_exec(cpu); - cpu_exec_end(cpu); - qemu_mutex_lock_iothread(); -#ifdef CONFIG_PROFILER - tcg_time +=3D profile_getclock() - ti; -#endif +} + +static void process_icount_data(CPUState *cpu) +{ if (use_icount) { /* Fold pending instructions back into the instruction counter, and clear the interrupt flag. */ timers_state.qemu_icount -=3D (cpu->icount_decr.u16.low + cpu->icount_extra); - cpu->icount_decr.u32 =3D 0; + + /* Reset the counters */ + cpu->icount_decr.u16.low =3D 0; cpu->icount_extra =3D 0; replay_account_executed_instructions(); } +} + + +static int tcg_cpu_exec(CPUState *cpu) +{ + int ret; +#ifdef CONFIG_PROFILER + int64_t ti; +#endif + +#ifdef CONFIG_PROFILER + ti =3D profile_getclock(); +#endif + qemu_mutex_unlock_iothread(); + cpu_exec_start(cpu); + ret =3D cpu_exec(cpu); + cpu_exec_end(cpu); + qemu_mutex_lock_iothread(); +#ifdef CONFIG_PROFILER + tcg_time +=3D profile_getclock() - ti; +#endif return ret; } =20 @@ -1306,7 +1323,13 @@ static void *qemu_tcg_rr_cpu_thread_fn(void *arg) =20 if (cpu_can_run(cpu)) { int r; + + prepare_icount_for_run(cpu); + r =3D tcg_cpu_exec(cpu); + + process_icount_data(cpu); + if (r =3D=3D EXCP_DEBUG) { cpu_handle_guest_debug(cpu); break; --=20 2.11.0