From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435270219520.4625329651083; Mon, 13 Mar 2017 13:01:10 -0700 (PDT) Received: from localhost ([::1]:54121 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW9T-00048L-Kt for importer@patchew.org; Mon, 13 Mar 2017 16:01:07 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42788) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4U-0000b2-TX for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4T-0002Lv-M9 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:55:58 -0400 Received: from mx1.redhat.com ([209.132.183.28]:55810) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4Q-0002J2-3c; Mon, 13 Mar 2017 15:55:54 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0428679DF5; Mon, 13 Mar 2017 19:55:54 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id C4E152D655; Mon, 13 Mar 2017 19:55:52 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:18 -0500 Message-Id: <20170313195547.21466-2-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Mon, 13 Mar 2017 19:55:54 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 01/30] trace: Fix backwards mirror_yield parameters X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Jeff Cody , "open list:Block Jobs" , stefanha@redhat.com, Max Reitz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" block/trace-events lists the parameters for mirror_yield consistently with other mirror events (cnt just after s, like in mirror_before_sleep; in_flight last, like in mirror_yield_in_flight). But the callers were passing parameters in the wrong order, leading to poor trace messages, including type truncation when there are more than 4G dirty sectors involved. Broken since its introduction in commit bd48bde. While touching this, ensure that all callers use the same type (uint64_t) for cnt, as a later patch will enable the compiler to do stricter type-checking. Signed-off-by: Eric Blake --- block/mirror.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/block/mirror.c b/block/mirror.c index a5d30ee..16b4c82 100644 --- a/block/mirror.c +++ b/block/mirror.c @@ -632,7 +632,8 @@ static int coroutine_fn mirror_dirty_init(MirrorBlockJo= b *s) } if (s->in_flight >=3D MAX_IN_FLIGHT) { - trace_mirror_yield(s, s->in_flight, s->buf_free_count, -1); + trace_mirror_yield(s, UINT64_MAX, s->buf_free_count, + s->in_flight); mirror_wait_for_io(s); continue; } @@ -807,7 +808,7 @@ static void coroutine_fn mirror_run(void *opaque) s->common.iostatus =3D=3D BLOCK_DEVICE_IO_STATUS_OK) { if (s->in_flight >=3D MAX_IN_FLIGHT || s->buf_free_count =3D= =3D 0 || (cnt =3D=3D 0 && s->in_flight > 0)) { - trace_mirror_yield(s, s->in_flight, s->buf_free_count, cnt= ); + trace_mirror_yield(s, cnt, s->buf_free_count, s->in_flight= ); mirror_wait_for_io(s); continue; } else if (cnt !=3D 0) { --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435032236299.60696316224517; Mon, 13 Mar 2017 12:57:12 -0700 (PDT) Received: from localhost ([::1]:54101 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW5d-0000h4-LR for importer@patchew.org; Mon, 13 Mar 2017 15:57:09 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42778) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4U-0000az-8a for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4T-0002Lm-Eu for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:55:58 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46706) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4R-0002KX-13; Mon, 13 Mar 2017 15:55:55 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id EF92E9D4ED; Mon, 13 Mar 2017 19:55:54 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id F39FB2D5C1; Mon, 13 Mar 2017 19:55:53 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:19 -0500 Message-Id: <20170313195547.21466-3-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Mon, 13 Mar 2017 19:55:55 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 02/30] trace: Fix incorrect megasas trace parameters X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "open list:megasas" , Hannes Reinecke , stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" hw/scsi/trace-events lists cmd as the first parameter for both megasas_iovec_overflow and megasas_iovec_underflow, but the caller was mistakenly passing cmd->iov_size twice instead of the command index. Also, trace_megasas_abort_invalid is called with parameters in the wrong order. Broken since its introduction in commit e8f943c3. Signed-off-by: Eric Blake Reviewed-by: Hannes Reinecke --- hw/scsi/megasas.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index e3d59b7..84b8caf 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -291,7 +291,7 @@ static int megasas_map_sgl(MegasasState *s, MegasasCmd = *cmd, union mfi_sgl *sgl) if (cmd->iov_size > iov_size) { trace_megasas_iovec_overflow(cmd->index, iov_size, cmd->iov_size); } else if (cmd->iov_size < iov_size) { - trace_megasas_iovec_underflow(cmd->iov_size, iov_size, cmd->iov_si= ze); + trace_megasas_iovec_underflow(cmd->index, iov_size, cmd->iov_size); } cmd->iov_offset =3D 0; return 0; @@ -1924,8 +1924,8 @@ static int megasas_handle_abort(MegasasState *s, Mega= sasCmd *cmd) abort_ctx &=3D (uint64_t)0xFFFFFFFF; } if (abort_cmd->context !=3D abort_ctx) { - trace_megasas_abort_invalid_context(cmd->index, abort_cmd->index, - abort_cmd->context); + trace_megasas_abort_invalid_context(cmd->index, abort_cmd->context, + abort_cmd->index); s->event_count++; return MFI_STAT_ABORT_NOT_POSSIBLE; } --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435134517673.2451532944601; Mon, 13 Mar 2017 12:58:54 -0700 (PDT) Received: from localhost ([::1]:54108 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW7J-0002EM-BT for importer@patchew.org; Mon, 13 Mar 2017 15:58:53 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42764) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4T-0000aR-Hw for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4S-0002LY-GR for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:55:57 -0400 Received: from mx1.redhat.com ([209.132.183.28]:38582) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4S-0002LC-82 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:55:56 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2B5C581220; Mon, 13 Mar 2017 19:55:56 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 11B652D5C9; Mon, 13 Mar 2017 19:55:54 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:20 -0500 Message-Id: <20170313195547.21466-4-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Mon, 13 Mar 2017 19:55:56 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 03/30] trace: Avoid abuse of amdvi_mmio_read X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Michael S. Tsirkin" , Eduardo Habkost , stefanha@redhat.com, Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" hw/i386/trace-events has an amdvi_mmio_read trace that is used for both normal reads (listing the register name, address, size, and offset) and for an error case (abusing the register name to show an error message, the address to show the maximum value supported, then shoehorning address and size into the size and offset parameters). The change from a wide address to a narrower size parameter could truncate a (rather-large) bogus read attempt, so it's better to create a separate dedicated trace with correct types, rather than abusing the trace mechanism. Broken since its introduction in commit d29a09c. Signed-off-by: Eric Blake --- hw/i386/amd_iommu.c | 3 +-- hw/i386/trace-events | 1 + 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index e0732cc..f86a40a 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -572,8 +572,7 @@ static uint64_t amdvi_mmio_read(void *opaque, hwaddr ad= dr, unsigned size) uint64_t val =3D -1; if (addr + size > AMDVI_MMIO_SIZE) { - trace_amdvi_mmio_read("error: addr outside region: max ", - (uint64_t)AMDVI_MMIO_SIZE, addr, size); + trace_amdvi_mmio_read_invalid(AMDVI_MMIO_SIZE, addr, size); return (uint64_t)-1; } diff --git a/hw/i386/trace-events b/hw/i386/trace-events index 88ad5e4..a213bfd 100644 --- a/hw/i386/trace-events +++ b/hw/i386/trace-events @@ -37,6 +37,7 @@ amdvi_cache_update(uint16_t domid, uint8_t bus, uint8_t s= lot, uint8_t func, uint amdvi_completion_wait_fail(uint64_t addr) "error: fail to write at address= 0x%"PRIx64 amdvi_mmio_write(const char *reg, uint64_t addr, unsigned size, uint64_t v= al, uint64_t offset) "%s write addr 0x%"PRIx64", size %u, val 0x%"PRIx64", = offset 0x%"PRIx64 amdvi_mmio_read(const char *reg, uint64_t addr, unsigned size, uint64_t of= fset) "%s read addr 0x%"PRIx64", size %u offset 0x%"PRIx64 +amdvi_mmio_read_invalid(int max, hwaddr addr, unsigned size) "error: addr = outside region (max 0x%x): read addr 0x%" HWADDR_PRIx ", size %u" amdvi_command_error(uint64_t status) "error: Executing commands with comma= nd buffer disabled 0x%"PRIx64 amdvi_command_read_fail(uint64_t addr, uint32_t head) "error: fail to acce= ss memory at 0x%"PRIx64" + 0x%"PRIx32 amdvi_command_exec(uint32_t head, uint32_t tail, uint64_t buf) "command bu= ffer head at 0x%"PRIx32" command buffer tail at 0x%"PRIx32" command buffer = base at 0x%"PRIx64 --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435174699689.20940734874; Mon, 13 Mar 2017 12:59:34 -0700 (PDT) Received: from localhost ([::1]:54111 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW7x-0002pV-JO for importer@patchew.org; Mon, 13 Mar 2017 15:59:33 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42859) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4Y-0000dL-56 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4X-0002Pw-3E for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:02 -0400 Received: from mx1.redhat.com ([209.132.183.28]:55856) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4U-0002MU-Kc; Mon, 13 Mar 2017 15:55:58 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 88A508047D; Mon, 13 Mar 2017 19:55:58 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 407E62D655; Mon, 13 Mar 2017 19:55:56 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:21 -0500 Message-Id: <20170313195547.21466-5-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Mon, 13 Mar 2017 19:55:58 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 04/30] trace: Fix parameter types in block X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , "open list:Block layer core" , stefanha@redhat.com, Max Reitz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake --- block/trace-events | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/block/trace-events b/block/trace-events index 0bc5c0a..acd12f9 100644 --- a/block/trace-events +++ b/block/trace-events @@ -57,7 +57,7 @@ paio_submit_co(int64_t offset, int count, int type) "offs= et %"PRId64" count %d t paio_submit(void *acb, void *opaque, int64_t offset, int count, int type) = "acb %p opaque %p offset %"PRId64" count %d type %d" # block/qcow2.c -qcow2_writev_start_req(void *co, int64_t offset, int bytes) "co %p offset = %" PRIx64 " bytes %d" +qcow2_writev_start_req(void *co, int64_t offset, uint64_t bytes) "co %p of= fset %" PRIx64 " bytes %"PRIu64 qcow2_writev_done_req(void *co, int ret) "co %p ret %d" qcow2_writev_start_part(void *co) "co %p" qcow2_writev_done_part(void *co, int cur_bytes) "co %p cur_bytes %d" @@ -69,7 +69,7 @@ qcow2_pwrite_zeroes(void *co, int64_t offset, int count) = "co %p offset %" PRIx64 qcow2_alloc_clusters_offset(void *co, uint64_t offset, int bytes) "co %p o= ffset %" PRIx64 " bytes %d" qcow2_handle_copied(void *co, uint64_t guest_offset, uint64_t host_offset,= uint64_t bytes) "co %p guest_offset %" PRIx64 " host_offset %" PRIx64 " by= tes %" PRIx64 qcow2_handle_alloc(void *co, uint64_t guest_offset, uint64_t host_offset, = uint64_t bytes) "co %p guest_offset %" PRIx64 " host_offset %" PRIx64 " byt= es %" PRIx64 -qcow2_do_alloc_clusters_offset(void *co, uint64_t guest_offset, uint64_t h= ost_offset, int nb_clusters) "co %p guest_offset %" PRIx64 " host_offset %"= PRIx64 " nb_clusters %d" +qcow2_do_alloc_clusters_offset(void *co, uint64_t guest_offset, uint64_t h= ost_offset, uint64_t nb_clusters) "co %p guest_offset %" PRIx64 " host_offs= et %" PRIx64 " nb_clusters %" PRIu64 qcow2_cluster_alloc_phys(void *co) "co %p" qcow2_cluster_link_l2(void *co, int nb_clusters) "co %p nb_clusters %d" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435415794802.6729098016921; Mon, 13 Mar 2017 13:03:35 -0700 (PDT) Received: from localhost ([::1]:54134 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWBq-0006B7-AW for importer@patchew.org; Mon, 13 Mar 2017 16:03:34 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42815) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4W-0000bD-ET for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4V-0002Or-OP for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:00 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47140) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4V-0002NQ-HZ for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:55:59 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6AE3B63B05 for ; Mon, 13 Mar 2017 19:55:59 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 93F912D5C1; Mon, 13 Mar 2017 19:55:58 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:22 -0500 Message-Id: <20170313195547.21466-6-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Mon, 13 Mar 2017 19:55:59 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 05/30] trace: Fix parameter types in io X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces. In this case, the only platform where pid_t in the caller does not match int in the trace definition is 64-bit mingw, where the system headers are still buggy in declaring a 64-bit pid_t even though getpid() only returns 32 bits, so a cast in the caller is the easiest workaround. Signed-off-by: Eric Blake --- io/channel-command.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/io/channel-command.c b/io/channel-command.c index 319c5ed..a90a078 100644 --- a/io/channel-command.c +++ b/io/channel-command.c @@ -39,7 +39,7 @@ qio_channel_command_new_pid(int writefd, ioc->writefd =3D writefd; ioc->pid =3D pid; - trace_qio_channel_command_new_pid(ioc, writefd, readfd, pid); + trace_qio_channel_command_new_pid(ioc, writefd, readfd, (int) pid); return ioc; } --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435174685189.6577600769956; Mon, 13 Mar 2017 12:59:34 -0700 (PDT) Received: from localhost ([::1]:54110 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW7w-0002my-GO for importer@patchew.org; Mon, 13 Mar 2017 15:59:32 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42841) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4X-0000cc-IG for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4W-0002PS-J8 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:01 -0400 Received: from mx1.redhat.com ([209.132.183.28]:45308) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4W-0002Ok-CQ for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:00 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4F2337AEBF for ; Mon, 13 Mar 2017 19:56:00 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6E0AA2D5C3; Mon, 13 Mar 2017 19:55:59 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:23 -0500 Message-Id: <20170313195547.21466-7-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Mon, 13 Mar 2017 19:56:00 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 06/30] trace: Fix parameter types in migration X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Dr. David Alan Gilbert" , stefanha@redhat.com, Juan Quintela Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake --- migration/trace-events | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/migration/trace-events b/migration/trace-events index 7372ce2..079d4e6 100644 --- a/migration/trace-events +++ b/migration/trace-events @@ -7,7 +7,7 @@ qemu_loadvm_state_section_partend(uint32_t section_id) "%u" qemu_loadvm_state_post_main(int ret) "%d" qemu_loadvm_state_section_startfull(uint32_t section_id, const char *idstr= , uint32_t instance_id, uint32_t version_id) "%u(%s) %u %u" qemu_savevm_send_packaged(void) "" -loadvm_handle_cmd_packaged(unsigned int length) "%u" +loadvm_handle_cmd_packaged(size_t length) "%zu" loadvm_handle_cmd_packaged_main(int ret) "%d" loadvm_handle_cmd_packaged_received(int ret) "%d" loadvm_postcopy_handle_advise(void) "" @@ -186,7 +186,7 @@ postcopy_ram_enable_notify(void) "" postcopy_ram_fault_thread_entry(void) "" postcopy_ram_fault_thread_exit(void) "" postcopy_ram_fault_thread_quit(void) "" -postcopy_ram_fault_thread_request(uint64_t hostaddr, const char *ramblock,= size_t offset) "Request for HVA=3D%" PRIx64 " rb=3D%s offset=3D%zx" +postcopy_ram_fault_thread_request(unsigned long long hostaddr, const char = *ramblock, size_t offset) "Request for HVA=3D%llx rb=3D%s offset=3D%zx" postcopy_ram_incoming_cleanup_closeuf(void) "" postcopy_ram_incoming_cleanup_entry(void) "" postcopy_ram_incoming_cleanup_exit(void) "" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435561942787.2099636381056; Mon, 13 Mar 2017 13:06:01 -0700 (PDT) Received: from localhost ([::1]:54144 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWEA-000888-Ko for importer@patchew.org; Mon, 13 Mar 2017 16:05:58 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42864) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4Y-0000dc-DB for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4X-0002Qd-JF for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:02 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46570) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4X-0002PY-9r for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:01 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 46B641293 for ; Mon, 13 Mar 2017 19:56:01 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5FA9A2D5C4; Mon, 13 Mar 2017 19:56:00 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:24 -0500 Message-Id: <20170313195547.21466-8-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Mon, 13 Mar 2017 19:56:01 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 07/30] trace: Fix parameter types in ui X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann , stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake Reviewed-by: Gerd Hoffmann --- ui/trace-events | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/ui/trace-events b/ui/trace-events index 93fe548..47f72f5 100644 --- a/ui/trace-events +++ b/ui/trace-events @@ -6,7 +6,7 @@ console_putchar_csi(int esc_param0, int esc_param1, int ch,= int nb_esc_params) " console_putchar_unhandled(int ch) "unhandled escape character '%c'" console_txt_new(int w, int h) "%dx%d" console_select(int nr) "%d" -console_refresh(int interval) "interval %d ms" +console_refresh(uint64_t interval) "interval %" PRId64 " ms" displaysurface_create(void *display_surface, int w, int h) "surface=3D%p, = %dx%d" displaysurface_create_from(void *display_surface, int w, int h, uint32_t f= ormat) "surface=3D%p, %dx%d, format 0x%x" displaysurface_create_pixman(void *display_surface) "surface=3D%p" @@ -31,11 +31,11 @@ vnc_key_sync_numlock(bool on) "%d" vnc_key_sync_capslock(bool on) "%d" # ui/input.c -input_event_key_number(int conidx, int number, const char *qcode, bool dow= n) "con %d, key number 0x%x [%s], down %d" +input_event_key_number(int conidx, uint64_t number, const char *qcode, boo= l down) "con %d, key number 0x%" PRIx64 " [%s], down %d" input_event_key_qcode(int conidx, const char *qcode, bool down) "con %d, k= ey qcode %s, down %d" input_event_btn(int conidx, const char *btn, bool down) "con %d, button %s= , down %d" -input_event_rel(int conidx, const char *axis, int value) "con %d, axis %s,= value %d" -input_event_abs(int conidx, const char *axis, int value) "con %d, axis %s,= value 0x%x" +input_event_rel(int conidx, const char *axis, uint64_t value) "con %d, axi= s %s, value %" PRId64 +input_event_abs(int conidx, const char *axis, uint64_t value) "con %d, axi= s %s, value 0x%" PRIx64 input_event_sync(void) "" input_mouse_mode(int absolute) "absolute %d" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435310590775.6194865568771; Mon, 13 Mar 2017 13:01:50 -0700 (PDT) Received: from localhost ([::1]:54125 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWA9-0004mR-7r for importer@patchew.org; Mon, 13 Mar 2017 16:01:49 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42905) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4b-0000gf-AS for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4Y-0002RH-GL for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:05 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47172) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4Y-0002Qj-AP for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:02 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3385A342C44; Mon, 13 Mar 2017 19:56:02 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 394CB2D5C1; Mon, 13 Mar 2017 19:56:01 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:25 -0500 Message-Id: <20170313195547.21466-9-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Mon, 13 Mar 2017 19:56:02 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 08/30] trace: Fix parameter types in top level X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson , stefanha@redhat.com, Peter Crosthwaite Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Some of the callers use the variable-length target_ulong, which cannot portably be mentioned in headers that are included from target-independent code; in those cases, use casts to force a type that will work through varargs to match the declaration already in trace-events. Signed-off-by: Eric Blake --- cpu-exec.c | 6 +++--- translate-all.c | 2 +- trace-events | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/cpu-exec.c b/cpu-exec.c index d04dd91..109f502 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -210,7 +210,7 @@ static void cpu_exec_nocache(CPUState *cpu, int max_cyc= les, tb_unlock(); /* execute the generated code */ - trace_exec_tb_nocache(tb, tb->pc); + trace_exec_tb_nocache(tb, (uintptr_t) tb->pc); cpu_tb_exec(cpu, tb); tb_lock(); @@ -240,7 +240,7 @@ static void cpu_exec_step(CPUState *cpu) cc->cpu_exec_enter(cpu); /* execute the generated code */ - trace_exec_tb_nocache(tb, pc); + trace_exec_tb_nocache(tb, (uintptr_t) pc); cpu_tb_exec(cpu, tb); cc->cpu_exec_exit(cpu); @@ -571,7 +571,7 @@ static inline void cpu_loop_exec_tb(CPUState *cpu, Tran= slationBlock *tb, uintptr_t ret; int32_t insns_left; - trace_exec_tb(tb, tb->pc); + trace_exec_tb(tb, (uintptr_t) tb->pc); ret =3D cpu_tb_exec(cpu, tb); tb =3D (TranslationBlock *)(ret & ~TB_EXIT_MASK); *tb_exit =3D ret & TB_EXIT_MASK; diff --git a/translate-all.c b/translate-all.c index 34480ae..68f31cd 100644 --- a/translate-all.c +++ b/translate-all.c @@ -1294,7 +1294,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, gen_intermediate_code(env, tb); tcg_ctx.cpu =3D NULL; - trace_translate_block(tb, tb->pc, tb->tc_ptr); + trace_translate_block(tb, (uintptr_t) tb->pc, tb->tc_ptr); /* generate machine code */ tb->jmp_reset_offset[0] =3D TB_JMP_RESET_OFFSET_INVALID; diff --git a/trace-events b/trace-events index b07a09b..4f72cf2 100644 --- a/trace-events +++ b/trace-events @@ -42,7 +42,7 @@ qemu_system_shutdown_request(void) "" qemu_system_powerdown_request(void) "" # spice-qemu-char.c -spice_vmc_write(ssize_t out, int len) "spice wrote %zd of requested %d" +spice_vmc_write(ssize_t out, ssize_t len) "spice wrote %zd of requested %z= d" spice_vmc_read(int bytes, int len) "spice read %d of requested %d" spice_vmc_register_interface(void *scd) "spice vmc registered interface %p" spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interfac= e %p" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435037904918.0514262380318; Mon, 13 Mar 2017 12:57:17 -0700 (PDT) Received: from localhost ([::1]:54103 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW5j-0000k4-I0 for importer@patchew.org; Mon, 13 Mar 2017 15:57:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42938) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4c-0000hQ-57 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4Z-0002Sd-MI for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:06 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41258) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4Z-0002Ri-Ch for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:03 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 435F13DBF9; Mon, 13 Mar 2017 19:56:03 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 512CB2D5C4; Mon, 13 Mar 2017 19:56:02 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:26 -0500 Message-Id: <20170313195547.21466-10-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Mon, 13 Mar 2017 19:56:03 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 09/30] trace: Fix parameter types in linux-user X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Riku Voipio , stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces. In this patch, we can't update the trace definitions, because abi_ulong is not always available; and since that type is variably-sized, the only solution to reliably pass it through printf's varargs is an explicit cast at all callsites. Signed-off-by: Eric Blake --- linux-user/signal.c | 106 ++++++++++++++++++++++++++----------------------= ---- 1 file changed, 53 insertions(+), 53 deletions(-) diff --git a/linux-user/signal.c b/linux-user/signal.c index a67db04..930240b 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -1119,7 +1119,7 @@ static void setup_frame(int sig, struct target_sigact= ion *ka, int i; frame_addr =3D get_sigframe(ka, env, sizeof(*frame)); - trace_user_setup_frame(env, frame_addr); + trace_user_setup_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) goto give_sigsegv; @@ -1182,7 +1182,7 @@ static void setup_rt_frame(int sig, struct target_sig= action *ka, int i; frame_addr =3D get_sigframe(ka, env, sizeof(*frame)); - trace_user_setup_rt_frame(env, frame_addr); + trace_user_setup_rt_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) goto give_sigsegv; @@ -1343,7 +1343,7 @@ long do_sigreturn(CPUX86State *env) sigset_t set; int i; - trace_user_do_sigreturn(env, frame_addr); + trace_user_do_sigreturn(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) goto badframe; /* set blocked signals */ @@ -1375,7 +1375,7 @@ long do_rt_sigreturn(CPUX86State *env) sigset_t set; frame_addr =3D env->regs[R_ESP] - sizeof(abi_ulong); - trace_user_do_rt_sigreturn(env, frame_addr); + trace_user_do_rt_sigreturn(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) goto badframe; target_to_host_sigset(&set, &frame->uc.tuc_sigmask); @@ -1581,7 +1581,7 @@ static void target_setup_frame(int usig, struct targe= t_sigaction *ka, abi_ulong frame_addr, return_addr; frame_addr =3D get_sigframe(ka, env); - trace_user_setup_frame(env, frame_addr); + trace_user_setup_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto give_sigsegv; } @@ -1641,7 +1641,7 @@ long do_rt_sigreturn(CPUARMState *env) struct target_rt_sigframe *frame =3D NULL; abi_ulong frame_addr =3D env->xregs[31]; - trace_user_do_rt_sigreturn(env, frame_addr); + trace_user_do_rt_sigreturn(env, (uint64_t) frame_addr); if (frame_addr & 15) { goto badframe; } @@ -1970,7 +1970,7 @@ static void setup_frame_v1(int usig, struct target_si= gaction *ka, abi_ulong frame_addr =3D get_sigframe(ka, regs, sizeof(*frame)); int i; - trace_user_setup_frame(regs, frame_addr); + trace_user_setup_frame(regs, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto sigsegv; } @@ -1996,7 +1996,7 @@ static void setup_frame_v2(int usig, struct target_si= gaction *ka, struct sigframe_v2 *frame; abi_ulong frame_addr =3D get_sigframe(ka, regs, sizeof(*frame)); - trace_user_setup_frame(regs, frame_addr); + trace_user_setup_frame(regs, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto sigsegv; } @@ -2033,7 +2033,7 @@ static void setup_rt_frame_v1(int usig, struct target= _sigaction *ka, int i; abi_ulong info_addr, uc_addr; - trace_user_setup_rt_frame(env, frame_addr); + trace_user_setup_rt_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto sigsegv; } @@ -2078,7 +2078,7 @@ static void setup_rt_frame_v2(int usig, struct target= _sigaction *ka, abi_ulong frame_addr =3D get_sigframe(ka, env, sizeof(*frame)); abi_ulong info_addr, uc_addr; - trace_user_setup_rt_frame(env, frame_addr); + trace_user_setup_rt_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto sigsegv; } @@ -2158,7 +2158,7 @@ static long do_sigreturn_v1(CPUARMState *env) * not, then the user is trying to mess with us. */ frame_addr =3D env->regs[13]; - trace_user_do_sigreturn(env, frame_addr); + trace_user_do_sigreturn(env, (uint64_t) frame_addr); if (frame_addr & 7) { goto badframe; } @@ -2301,7 +2301,7 @@ static long do_sigreturn_v2(CPUARMState *env) * not, then the user is trying to mess with us. */ frame_addr =3D env->regs[13]; - trace_user_do_sigreturn(env, frame_addr); + trace_user_do_sigreturn(env, (uint64_t) frame_addr); if (frame_addr & 7) { goto badframe; } @@ -2347,7 +2347,7 @@ static long do_rt_sigreturn_v1(CPUARMState *env) * not, then the user is trying to mess with us. */ frame_addr =3D env->regs[13]; - trace_user_do_rt_sigreturn(env, frame_addr); + trace_user_do_rt_sigreturn(env, (uint64_t) frame_addr); if (frame_addr & 7) { goto badframe; } @@ -2391,7 +2391,7 @@ static long do_rt_sigreturn_v2(CPUARMState *env) * not, then the user is trying to mess with us. */ frame_addr =3D env->regs[13]; - trace_user_do_rt_sigreturn(env, frame_addr); + trace_user_do_rt_sigreturn(env, (uint64_t) frame_addr); if (frame_addr & 7) { goto badframe; } @@ -2593,7 +2593,7 @@ static void setup_frame(int sig, struct target_sigact= ion *ka, sigframe_size =3D NF_ALIGNEDSZ; sf_addr =3D get_sigframe(ka, env, sigframe_size); - trace_user_setup_frame(env, sf_addr); + trace_user_setup_frame(env, (uint64_t) sf_addr); sf =3D lock_user(VERIFY_WRITE, sf_addr, sizeof(struct target_signal_frame), 0); @@ -2687,7 +2687,7 @@ long do_sigreturn(CPUSPARCState *env) int err=3D0, i; sf_addr =3D env->regwptr[UREG_FP]; - trace_user_do_sigreturn(env, sf_addr); + trace_user_do_sigreturn(env, (uint64_t) sf_addr); if (!lock_user_struct(VERIFY_READ, sf, sf_addr, 1)) { goto segv_and_exit; } @@ -2752,7 +2752,7 @@ segv_and_exit: long do_rt_sigreturn(CPUSPARCState *env) { - trace_user_do_rt_sigreturn(env, 0); + trace_user_do_rt_sigreturn(env, (uint64_t) 0); fprintf(stderr, "do_rt_sigreturn: not implemented\n"); return -TARGET_ENOSYS; } @@ -3223,7 +3223,7 @@ static void setup_frame(int sig, struct target_sigact= ion * ka, int i; frame_addr =3D get_sigframe(ka, regs, sizeof(*frame)); - trace_user_setup_frame(regs, frame_addr); + trace_user_setup_frame(regs, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto give_sigsegv; } @@ -3272,7 +3272,7 @@ long do_sigreturn(CPUMIPSState *regs) int i; frame_addr =3D regs->active_tc.gpr[29]; - trace_user_do_sigreturn(regs, frame_addr); + trace_user_do_sigreturn(regs, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) goto badframe; @@ -3319,7 +3319,7 @@ static void setup_rt_frame(int sig, struct target_sig= action *ka, int i; frame_addr =3D get_sigframe(ka, env, sizeof(*frame)); - trace_user_setup_rt_frame(env, frame_addr); + trace_user_setup_rt_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto give_sigsegv; } @@ -3379,7 +3379,7 @@ long do_rt_sigreturn(CPUMIPSState *env) sigset_t blocked; frame_addr =3D env->active_tc.gpr[29]; - trace_user_do_rt_sigreturn(env, frame_addr); + trace_user_do_rt_sigreturn(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) { goto badframe; } @@ -3535,7 +3535,7 @@ static void setup_frame(int sig, struct target_sigact= ion *ka, int i; frame_addr =3D get_sigframe(ka, regs->gregs[15], sizeof(*frame)); - trace_user_setup_frame(regs, frame_addr); + trace_user_setup_frame(regs, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto give_sigsegv; } @@ -3584,7 +3584,7 @@ static void setup_rt_frame(int sig, struct target_sig= action *ka, int i; frame_addr =3D get_sigframe(ka, regs->gregs[15], sizeof(*frame)); - trace_user_setup_rt_frame(regs, frame_addr); + trace_user_setup_rt_frame(regs, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto give_sigsegv; } @@ -3645,7 +3645,7 @@ long do_sigreturn(CPUSH4State *regs) int err =3D 0; frame_addr =3D regs->gregs[15]; - trace_user_do_sigreturn(regs, frame_addr); + trace_user_do_sigreturn(regs, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) { goto badframe; } @@ -3679,7 +3679,7 @@ long do_rt_sigreturn(CPUSH4State *regs) sigset_t blocked; frame_addr =3D regs->gregs[15]; - trace_user_do_rt_sigreturn(regs, frame_addr); + trace_user_do_rt_sigreturn(regs, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) { goto badframe; } @@ -3831,7 +3831,7 @@ static void setup_frame(int sig, struct target_sigact= ion *ka, int i; frame_addr =3D get_sigframe(ka, env, sizeof *frame); - trace_user_setup_frame(env, frame_addr); + trace_user_setup_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) goto badframe; @@ -3898,7 +3898,7 @@ long do_sigreturn(CPUMBState *env) int i; frame_addr =3D env->regs[R_SP]; - trace_user_do_sigreturn(env, frame_addr); + trace_user_do_sigreturn(env, (uint64_t) frame_addr); /* Make sure the guest isn't playing games. */ if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 1)) goto badframe; @@ -3925,7 +3925,7 @@ badframe: long do_rt_sigreturn(CPUMBState *env) { - trace_user_do_rt_sigreturn(env, 0); + trace_user_do_rt_sigreturn(env, (uint64_t) 0); fprintf(stderr, "Microblaze do_rt_sigreturn: not implemented\n"); return -TARGET_ENOSYS; } @@ -4015,7 +4015,7 @@ static void setup_frame(int sig, struct target_sigact= ion *ka, int i; frame_addr =3D get_sigframe(env, sizeof *frame); - trace_user_setup_frame(env, frame_addr); + trace_user_setup_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) goto badframe; @@ -4069,7 +4069,7 @@ long do_sigreturn(CPUCRISState *env) int i; frame_addr =3D env->regs[R_SP]; - trace_user_do_sigreturn(env, frame_addr); + trace_user_do_sigreturn(env, (uint64_t) frame_addr); /* Make sure the guest isn't playing games. */ if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 1)) { goto badframe; @@ -4093,7 +4093,7 @@ badframe: long do_rt_sigreturn(CPUCRISState *env) { - trace_user_do_rt_sigreturn(env, 0); + trace_user_do_rt_sigreturn(env, (uint64_t) 0); fprintf(stderr, "CRIS do_rt_sigreturn: not implemented\n"); return -TARGET_ENOSYS; } @@ -4298,7 +4298,7 @@ give_sigsegv: long do_sigreturn(CPUNios2State *env) { - trace_user_do_sigreturn(env, 0); + trace_user_do_sigreturn(env, (uint64_t) 0); fprintf(stderr, "do_sigreturn: not implemented\n"); return -TARGET_ENOSYS; } @@ -4470,7 +4470,7 @@ static void setup_rt_frame(int sig, struct target_sig= action *ka, abi_ulong info_addr, uc_addr; frame_addr =3D get_sigframe(ka, env, sizeof(*frame)); - trace_user_setup_rt_frame(env, frame_addr); + trace_user_setup_rt_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto give_sigsegv; } @@ -4529,14 +4529,14 @@ give_sigsegv: long do_sigreturn(CPUOpenRISCState *env) { - trace_user_do_sigreturn(env, 0); + trace_user_do_sigreturn(env, (uint64_t) 0); fprintf(stderr, "do_sigreturn: not implemented\n"); return -TARGET_ENOSYS; } long do_rt_sigreturn(CPUOpenRISCState *env) { - trace_user_do_rt_sigreturn(env, 0); + trace_user_do_rt_sigreturn(env, (uint64_t) 0); fprintf(stderr, "do_rt_sigreturn: not implemented\n"); return -TARGET_ENOSYS; } @@ -4660,7 +4660,7 @@ static void setup_frame(int sig, struct target_sigact= ion *ka, abi_ulong frame_addr; frame_addr =3D get_sigframe(ka, env, sizeof(*frame)); - trace_user_setup_frame(env, frame_addr); + trace_user_setup_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto give_sigsegv; } @@ -4717,7 +4717,7 @@ static void setup_rt_frame(int sig, struct target_sig= action *ka, abi_ulong frame_addr; frame_addr =3D get_sigframe(ka, env, sizeof *frame); - trace_user_setup_rt_frame(env, frame_addr); + trace_user_setup_rt_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto give_sigsegv; } @@ -4774,8 +4774,8 @@ restore_sigregs(CPUS390XState *env, target_sigregs *s= c) } __get_user(env->psw.mask, &sc->regs.psw.mask); - trace_user_s390x_restore_sigregs(env, (unsigned long long)sc->regs.psw= .addr, - (unsigned long long)env->psw.addr); + trace_user_s390x_restore_sigregs(env, (uint64_t) sc->regs.psw.addr, + (uint64_t) env->psw.addr); __get_user(env->psw.addr, &sc->regs.psw.addr); /* FIXME: 31-bit -> | PSW_ADDR_AMODE */ @@ -4796,7 +4796,7 @@ long do_sigreturn(CPUS390XState *env) target_sigset_t target_set; sigset_t set; - trace_user_do_sigreturn(env, frame_addr); + trace_user_do_sigreturn(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) { goto badframe; } @@ -4823,7 +4823,7 @@ long do_rt_sigreturn(CPUS390XState *env) abi_ulong frame_addr =3D env->regs[15]; sigset_t set; - trace_user_do_rt_sigreturn(env, frame_addr); + trace_user_do_rt_sigreturn(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) { goto badframe; } @@ -5271,7 +5271,7 @@ static void setup_frame(int sig, struct target_sigact= ion *ka, int err =3D 0; frame_addr =3D get_sigframe(ka, env, sizeof(*frame)); - trace_user_setup_frame(env, frame_addr); + trace_user_setup_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 1)) goto sigsegv; sc =3D &frame->sctx; @@ -5634,7 +5634,7 @@ static void setup_frame(int sig, struct target_sigact= ion *ka, int i; frame_addr =3D get_sigframe(ka, env, sizeof *frame); - trace_user_setup_frame(env, frame_addr); + trace_user_setup_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto give_sigsegv; } @@ -5751,7 +5751,7 @@ static void setup_rt_frame(int sig, struct target_sig= action *ka, int i; frame_addr =3D get_sigframe(ka, env, sizeof *frame); - trace_user_setup_rt_frame(env, frame_addr); + trace_user_setup_rt_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto give_sigsegv; } @@ -5820,7 +5820,7 @@ long do_sigreturn(CPUM68KState *env) sigset_t set; int i; - trace_user_do_sigreturn(env, frame_addr); + trace_user_do_sigreturn(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) goto badframe; @@ -5853,7 +5853,7 @@ long do_rt_sigreturn(CPUM68KState *env) abi_ulong frame_addr =3D env->aregs[7] - 4; sigset_t set; - trace_user_do_rt_sigreturn(env, frame_addr); + trace_user_do_rt_sigreturn(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) goto badframe; @@ -5993,7 +5993,7 @@ static void setup_frame(int sig, struct target_sigact= ion *ka, int err =3D 0; frame_addr =3D get_sigframe(ka, env, sizeof(*frame)); - trace_user_setup_frame(env, frame_addr); + trace_user_setup_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto give_sigsegv; } @@ -6036,7 +6036,7 @@ static void setup_rt_frame(int sig, struct target_sig= action *ka, int i, err =3D 0; frame_addr =3D get_sigframe(ka, env, sizeof(*frame)); - trace_user_setup_rt_frame(env, frame_addr); + trace_user_setup_rt_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto give_sigsegv; } @@ -6114,7 +6114,7 @@ long do_rt_sigreturn(CPUAlphaState *env) struct target_rt_sigframe *frame; sigset_t set; - trace_user_do_rt_sigreturn(env, frame_addr); + trace_user_do_rt_sigreturn(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) { goto badframe; } @@ -6228,7 +6228,7 @@ static void setup_rt_frame(int sig, struct target_sig= action *ka, unsigned long restorer; frame_addr =3D get_sigframe(ka, env, sizeof(*frame)); - trace_user_setup_rt_frame(env, frame_addr); + trace_user_setup_rt_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto give_sigsegv; } @@ -6279,7 +6279,7 @@ long do_rt_sigreturn(CPUTLGState *env) struct target_rt_sigframe *frame; sigset_t set; - trace_user_do_rt_sigreturn(env, frame_addr); + trace_user_do_rt_sigreturn(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) { goto badframe; } @@ -6405,7 +6405,7 @@ static void setup_rt_frame(int sig, struct target_sig= action *ka, frame_addr =3D QEMU_ALIGN_UP(sp, 64); sp =3D frame_addr + PARISC_RT_SIGFRAME_SIZE32; - trace_user_setup_rt_frame(env, frame_addr); + trace_user_setup_rt_frame(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { goto give_sigsegv; @@ -6468,7 +6468,7 @@ long do_rt_sigreturn(CPUArchState *env) struct target_rt_sigframe *frame; sigset_t set; - trace_user_do_rt_sigreturn(env, frame_addr); + trace_user_do_rt_sigreturn(env, (uint64_t) frame_addr); if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) { goto badframe; } --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435697821273.71186254130805; Mon, 13 Mar 2017 13:08:17 -0700 (PDT) Received: from localhost ([::1]:54157 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWGN-0001he-C6 for importer@patchew.org; Mon, 13 Mar 2017 16:08:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42911) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4b-0000gj-EK for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4a-0002TY-O6 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:05 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47186) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4a-0002Sa-9z for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:04 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3D39C653A6 for ; Mon, 13 Mar 2017 19:56:04 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5126F2D5C1; Mon, 13 Mar 2017 19:56:03 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:27 -0500 Message-Id: <20170313195547.21466-11-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Mon, 13 Mar 2017 19:56:04 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 10/30] trace: Fix parameter types in hw/acpi X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov , stefanha@redhat.com, "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake --- hw/acpi/trace-events | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/acpi/trace-events b/hw/acpi/trace-events index c379607..91c7313 100644 --- a/hw/acpi/trace-events +++ b/hw/acpi/trace-events @@ -19,10 +19,10 @@ mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%= "PRIx32"] pc-dimm delete # hw/acpi/cpu.c cpuhp_acpi_invalid_idx_selected(uint32_t idx) "0x%"PRIx32 -cpuhp_acpi_read_flags(uint32_t idx, uint8_t flags) "idx[0x%"PRIx32"] flags= : 0x%"PRIx8 +cpuhp_acpi_read_flags(uint32_t idx, uint64_t flags) "idx[0x%"PRIx32"] flag= s: 0x%"PRIx64 cpuhp_acpi_write_idx(uint32_t idx) "set active cpu idx: 0x%"PRIx32 -cpuhp_acpi_write_cmd(uint32_t idx, uint8_t cmd) "idx[0x%"PRIx32"] cmd: 0x%= "PRIx8 -cpuhp_acpi_read_cmd_data(uint32_t idx, uint32_t data) "idx[0x%"PRIx32"] da= ta: 0x%"PRIx32 +cpuhp_acpi_write_cmd(uint32_t idx, uint64_t cmd) "idx[0x%"PRIx32"] cmd: 0x= %"PRIx64 +cpuhp_acpi_read_cmd_data(uint32_t idx, uint64_t data) "idx[0x%"PRIx32"] da= ta: 0x%"PRIx64 cpuhp_acpi_cpu_has_events(uint32_t idx, bool ins, bool rm) "idx[0x%"PRIx32= "] inserting: %d, removing: %d" cpuhp_acpi_clear_inserting_evt(uint32_t idx) "idx[0x%"PRIx32"]" cpuhp_acpi_clear_remove_evt(uint32_t idx) "idx[0x%"PRIx32"]" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435477487485.0439683679813; Mon, 13 Mar 2017 13:04:37 -0700 (PDT) Received: from localhost ([::1]:54139 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWCp-000702-4b for importer@patchew.org; Mon, 13 Mar 2017 16:04:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42942) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4c-0000hf-Df for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4b-0002U4-EG for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:06 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46808) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4b-0002TO-1N for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:05 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 044469FDDE for ; Mon, 13 Mar 2017 19:56:05 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 43BD52D5C4; Mon, 13 Mar 2017 19:56:04 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:28 -0500 Message-Id: <20170313195547.21466-12-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Mon, 13 Mar 2017 19:56:05 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 11/30] trace: Fix parameter types in hw/audio X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann , stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake Reviewed-by: Gerd Hoffmann --- hw/audio/trace-events | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/audio/trace-events b/hw/audio/trace-events index 3210386..ea5f0c2 100644 --- a/hw/audio/trace-events +++ b/hw/audio/trace-events @@ -3,12 +3,12 @@ # hw/audio/cs4231.c cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" -cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg= %d: 0x%08x -> 0x%08x" -cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dr= eg %d: 0x%02x -> 0x%02x" +cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint64_t val) "write reg= %d: 0x%08x -> 0x%08" PRIx64 +cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint64_t val) "write dr= eg %d: 0x%02x -> 0x%02" PRIx64 # hw/audio/milkymist-ac97.c -milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value= %08x" -milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x valu= e %08x" +milkymist_ac97_memory_read(hwaddr addr, uint32_t value) "addr %08" HWADDR_= PRIx " value %08x" +milkymist_ac97_memory_write(hwaddr addr, uint64_t value) "addr %08" HWADDR= _PRIx " value %08" PRIx64 milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request" milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply" milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435373357195.67735447278494; Mon, 13 Mar 2017 13:02:53 -0700 (PDT) Received: from localhost ([::1]:54131 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWB9-0005cP-OH for importer@patchew.org; Mon, 13 Mar 2017 16:02:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42996) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4f-0000jU-PF for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4e-0002Xa-Tx for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:09 -0400 Received: from mx1.redhat.com ([209.132.183.28]:38660) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4c-0002Uc-91; Mon, 13 Mar 2017 15:56:06 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 36A2E81208; Mon, 13 Mar 2017 19:56:06 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 1E6592D5C1; Mon, 13 Mar 2017 19:56:05 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:29 -0500 Message-Id: <20170313195547.21466-13-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Mon, 13 Mar 2017 19:56:06 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 12/30] trace: Fix parameter types in hw/block X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Max Reitz , "open list:virtio-blk" , stefanha@redhat.com, "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; in this patch, switching from '/ BDRV_SECTOR_SIZE' (which changes types to unsigned long long) to '>> BDRV_SECTOR_BITS' (which preserves the type at size_t) is sufficient to match the existing trace definition. Signed-off-by: Eric Blake --- hw/block/virtio-blk.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-blk.c index 98c16a7..b609202 100644 --- a/hw/block/virtio-blk.c +++ b/hw/block/virtio-blk.c @@ -529,11 +529,11 @@ static int virtio_blk_handle_request(VirtIOBlockReq *= req, MultiReqBuffer *mrb) if (is_write) { qemu_iovec_init_external(&req->qiov, iov, out_num); trace_virtio_blk_handle_write(req, req->sector_num, - req->qiov.size / BDRV_SECTOR_SIZ= E); + req->qiov.size >> BDRV_SECTOR_BI= TS); } else { qemu_iovec_init_external(&req->qiov, in_iov, in_num); trace_virtio_blk_handle_read(req, req->sector_num, - req->qiov.size / BDRV_SECTOR_SIZE= ); + req->qiov.size >> BDRV_SECTOR_BIT= S); } if (!virtio_blk_sect_range_ok(req->dev, req->sector_num, --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435619547479.88614376587316; Mon, 13 Mar 2017 13:06:59 -0700 (PDT) Received: from localhost ([::1]:54152 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWF7-0000aZ-7q for importer@patchew.org; Mon, 13 Mar 2017 16:06:57 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42970) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4e-0000iO-BH for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4d-0002WT-9g for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:08 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47210) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4d-0002VX-28 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:07 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id F2ECE65383 for ; Mon, 13 Mar 2017 19:56:06 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 49C042D5C6; Mon, 13 Mar 2017 19:56:06 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:30 -0500 Message-Id: <20170313195547.21466-14-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Mon, 13 Mar 2017 19:56:07 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 13/30] trace: Fix parameter types in hw/char X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces. In most cases, we just update the trace definitions to match the caller types; but in one case, the caller had already done 'val &=3D 0xff' so casting uint64_t val down to the type expected by the trace is sufficient. Signed-off-by: Eric Blake --- hw/char/escc.c | 4 ++-- hw/char/trace-events | 14 +++++++------- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/hw/char/escc.c b/hw/char/escc.c index 9228091..33a4d20 100644 --- a/hw/char/escc.c +++ b/hw/char/escc.c @@ -483,7 +483,7 @@ static void escc_mem_write(void *opaque, hwaddr addr, s =3D &serial->chn[channel]; switch (saddr) { case SERIAL_CTRL: - trace_escc_mem_writeb_ctrl(CHN_C(s), s->reg, val & 0xff); + trace_escc_mem_writeb_ctrl(CHN_C(s), s->reg, (uint8_t) val); newreg =3D 0; switch (s->reg) { case W_CMD: @@ -553,7 +553,7 @@ static void escc_mem_write(void *opaque, hwaddr addr, s->reg =3D 0; break; case SERIAL_DATA: - trace_escc_mem_writeb_data(CHN_C(s), val); + trace_escc_mem_writeb_data(CHN_C(s), (uint8_t) val); s->tx =3D val; if (s->wregs[W_TXCTRL2] & TXCTRL2_TXEN) { // tx enabled if (qemu_chr_fe_get_driver(&s->chr)) { diff --git a/hw/char/trace-events b/hw/char/trace-events index 7fd48bb..361eee0 100644 --- a/hw/char/trace-events +++ b/hw/char/trace-events @@ -13,7 +13,7 @@ virtio_console_chr_event(unsigned int port, int event) "p= ort %u, event %d" # hw/char/grlib_apbuart.c grlib_apbuart_event(int event) "event:%d" -grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx= 64" value 0x%x" +grlib_apbuart_writel_unknown(uint64_t addr, uint64_t value) "addr 0x%"PRIx= 64" value 0x%" PRIx64 grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64 # hw/char/lm32_juart.c @@ -23,13 +23,13 @@ lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x" lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x" # hw/char/lm32_uart.c -lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0= x%08x" -lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x= %08x" +lm32_uart_memory_write(hwaddr addr, uint64_t value) "addr 0x%08" HWADDR_PR= Ix " value 0x%08" PRIx64 +lm32_uart_memory_read(hwaddr addr, uint32_t value) "addr 0x%08" HWADDR_PRI= x " value 0x%08x" lm32_uart_irq_state(int level) "irq state %d" # hw/char/milkymist-uart.c -milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value= %08x" -milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x valu= e %08x" +milkymist_uart_memory_read(hwaddr addr, uint32_t value) "addr %08" HWADDR_= PRIx " value %08x" +milkymist_uart_memory_write(hwaddr addr, uint64_t value) "addr %08" HWADDR= _PRIx " value %08" PRIx64 milkymist_uart_raise_irq(void) "Raise IRQ" milkymist_uart_lower_irq(void) "Lower IRQ" @@ -50,9 +50,9 @@ escc_sunmouse_event(int dx, int dy, int buttons_state) "d= x=3D%d dy=3D%d buttons=3D%01x # hw/char/pl011.c pl011_irq_state(int level) "irq state %d" -pl011_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" +pl011_read(hwaddr addr, uint64_t value) "addr 0x%08" HWADDR_PRIx " value 0= x%08" PRIx64 pl011_read_fifo(int read_count) "FIFO read, read_count now %d" -pl011_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" +pl011_write(hwaddr addr, uint64_t value) "addr 0x%08" HWADDR_PRIx " value = 0x%08" PRIx64 pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR %08x read_coun= t %d returning %d" pl011_put_fifo(uint32_t c, int read_count) "new char 0x%x read_count now %= d" pl011_put_fifo_full(void) "FIFO now full, RXFF set" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 14894358279714.412306871176838; Mon, 13 Mar 2017 13:10:27 -0700 (PDT) Received: from localhost ([::1]:54166 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWIU-0003eI-JW for importer@patchew.org; Mon, 13 Mar 2017 16:10:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42980) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4f-0000iv-39 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4e-0002Wl-3b for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:09 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43302) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4d-0002WD-RS for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:08 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C96E4C05B1D3 for ; Mon, 13 Mar 2017 19:56:07 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 21CCB2D5C9; Mon, 13 Mar 2017 19:56:07 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:31 -0500 Message-Id: <20170313195547.21466-15-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Mon, 13 Mar 2017 19:56:07 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 14/30] trace: Fix parameter types in hw/display X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake --- hw/display/trace-events | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/display/trace-events b/hw/display/trace-events index 3e896d2..515767d 100644 --- a/hw/display/trace-events +++ b/hw/display/trace-events @@ -10,17 +10,17 @@ xenfb_input_connected(void *xendev, int abs_pointer_wan= ted) "%p abs %d" # hw/display/g364fb.c g364fb_read(uint64_t addr, uint32_t val) "read addr=3D0x%"PRIx64": 0x%x" -g364fb_write(uint64_t addr, uint32_t new) "write addr=3D0x%"PRIx64": 0x%x" +g364fb_write(uint64_t addr, uint64_t new) "write addr=3D0x%"PRIx64": 0x%" = PRIx64 # hw/display/milkymist-tmu2.c -milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value= %08x" -milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x valu= e %08x" +milkymist_tmu2_memory_read(hwaddr addr, uint32_t value) "addr %08" HWADDR_= PRIx " value %08x" +milkymist_tmu2_memory_write(hwaddr addr, uint64_t value) "addr %08" HWADDR= _PRIx " value %08" PRIx64 milkymist_tmu2_start(void) "Start TMU" milkymist_tmu2_pulse_irq(void) "Pulse IRQ" # hw/display/milkymist-vgafb.c -milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x valu= e %08x" -milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x val= ue %08x" +milkymist_vgafb_memory_read(hwaddr addr, uint32_t value) "addr %08" HWADDR= _PRIx " value %08x" +milkymist_vgafb_memory_write(hwaddr addr, uint64_t value) "addr %08" HWADD= R_PRIx " value %08" PRIx64 # hw/display/vmware_vga.c vmware_value_read(uint32_t index, uint32_t value) "index %d, value 0x%x" @@ -61,11 +61,11 @@ qxl_create_guest_primary_rest(int qid, int32_t stride, = uint32_t type, uint32_t f qxl_destroy_primary(int qid) "%d" qxl_enter_vga_mode(int qid) "%d" qxl_exit_vga_mode(int qid) "%d" -qxl_hard_reset(int qid, int64_t loadvm) "%d loadvm=3D%"PRId64 +qxl_hard_reset(int qid, int loadvm) "%d loadvm=3D%d" qxl_interface_async_complete_io(int qid, uint32_t current_async, void *coo= kie) "%d current=3D%d cookie=3D%p" qxl_interface_attach_worker(int qid) "%d" qxl_interface_get_init_info(int qid) "%d" -qxl_interface_set_compression_level(int qid, int64_t level) "%d %"PRId64 +qxl_interface_set_compression_level(int qid, int level) "%d %d" qxl_interface_update_area_complete(int qid, uint32_t surface_id, uint32_t = dirty_left, uint32_t dirty_right, uint32_t dirty_top, uint32_t dirty_bottom= ) "%d surface=3D%d [%d,%d,%d,%d]" qxl_interface_update_area_complete_rest(int qid, uint32_t num_updated_rect= s) "%d #=3D%d" qxl_interface_update_area_complete_overflow(int qid, int max) "%d max=3D%d" @@ -112,7 +112,7 @@ qxl_interrupt_client_monitors_config(int qid, int num_h= eads, void *heads) "%d %d qxl_client_monitors_config_unsupported_by_guest(int qid, uint32_t int_mask= , void *client_monitors_config) "%d %X %p" qxl_client_monitors_config_unsupported_by_device(int qid, int revision) "%= d revision=3D%d" qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %= d %d" -qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d= %u %u" +qxl_client_monitors_config_crc(int qid, size_t size, uint32_t crc32) "%d %= zu %u" qxl_set_client_capabilities_unsupported_by_revision(int qid, int revision)= "%d revision=3D%d" # hw/display/qxl-render.c @@ -127,7 +127,7 @@ vga_vbe_read(uint32_t index, uint32_t val) "index 0x%x,= val 0x%x" vga_vbe_write(uint32_t index, uint32_t val) "index 0x%x, val 0x%x" # hw/display/cirrus_vga.c -vga_cirrus_read_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x" -vga_cirrus_write_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x" +vga_cirrus_read_io(hwaddr addr, int val) "addr 0x%" HWADDR_PRIx ", val 0x%= x" +vga_cirrus_write_io(hwaddr addr, uint64_t val) "addr 0x%" HWADDR_PRIx ", v= al 0x%" PRIx64 vga_cirrus_read_blt(uint32_t offset, uint32_t val) "offset 0x%x, val 0x%x" vga_cirrus_write_blt(uint32_t offset, uint32_t val) "offset 0x%x, val 0x%x" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435184503928.9784341583968; Mon, 13 Mar 2017 12:59:44 -0700 (PDT) Received: from localhost ([::1]:54113 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW87-0002wo-8H for importer@patchew.org; Mon, 13 Mar 2017 15:59:43 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42999) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4f-0000jX-Q5 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4e-0002Xe-Tx for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:09 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43308) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4e-0002Wh-NQ for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:08 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9371BC0546E4 for ; Mon, 13 Mar 2017 19:56:08 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id D43BA2D5C3; Mon, 13 Mar 2017 19:56:07 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:32 -0500 Message-Id: <20170313195547.21466-16-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Mon, 13 Mar 2017 19:56:08 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 15/30] trace: Fix parameter types in hw/dma X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake --- hw/dma/trace-events | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/dma/trace-events b/hw/dma/trace-events index 22878df..88dae95 100644 --- a/hw/dma/trace-events +++ b/hw/dma/trace-events @@ -14,16 +14,16 @@ sparc32_dma_set_irq_lower(void) "Lower IRQ" espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x" espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x" sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64":= 0x%08x" -sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write d= mareg %"PRIx64": 0x%08x -> 0x%08x" +sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint64_t val) "write d= mareg %"PRIx64": 0x%08x -> 0x%08" PRIx64 sparc32_dma_enable_raise(void) "Raise DMA enable" sparc32_dma_enable_lower(void) "Lower DMA enable" # hw/dma/sun4m_iommu.c sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = =3D %x" -sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = =3D %x" +sun4m_iommu_mem_writel(uint64_t addr, uint64_t val) "write reg[%"PRIx64"] = =3D %" PRIx64 sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart =3D %"PRIx64 -sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x" -sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x" +sun4m_iommu_mem_writel_tlbflush(uint64_t val) "tlb flush %" PRIx64 +sun4m_iommu_mem_writel_pgflush(uint64_t val) "page flush %" PRIx64 sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get= flags addr %"PRIx64" =3D> pte %"PRIx64", *pte =3D %x" sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlat= e dva %"PRIx64" =3D> pa %"PRIx64" iopte =3D %x" sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64 --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 148943596064412.223002507858837; Mon, 13 Mar 2017 13:12:40 -0700 (PDT) Received: from localhost ([::1]:54181 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWKd-0005d7-CK for importer@patchew.org; Mon, 13 Mar 2017 16:12:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43015) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4g-0000kJ-Gq for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4f-0002YZ-L7 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:10 -0400 Received: from mx1.redhat.com ([209.132.183.28]:32776) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4f-0002XW-El for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:09 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 890CE7B022; Mon, 13 Mar 2017 19:56:09 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 92FBC2D5C6; Mon, 13 Mar 2017 19:56:08 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:33 -0500 Message-Id: <20170313195547.21466-17-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Mon, 13 Mar 2017 19:56:09 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 16/30] trace: Fix parameter types in hw/i386 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson , Eduardo Habkost , stefanha@redhat.com, "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake --- hw/i386/trace-events | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/i386/trace-events b/hw/i386/trace-events index a213bfd..ca6ec22 100644 --- a/hw/i386/trace-events +++ b/hw/i386/trace-events @@ -41,7 +41,7 @@ amdvi_mmio_read_invalid(int max, hwaddr addr, unsigned si= ze) "error: addr outsid amdvi_command_error(uint64_t status) "error: Executing commands with comma= nd buffer disabled 0x%"PRIx64 amdvi_command_read_fail(uint64_t addr, uint32_t head) "error: fail to acce= ss memory at 0x%"PRIx64" + 0x%"PRIx32 amdvi_command_exec(uint32_t head, uint32_t tail, uint64_t buf) "command bu= ffer head at 0x%"PRIx32" command buffer tail at 0x%"PRIx32" command buffer = base at 0x%"PRIx64 -amdvi_unhandled_command(uint8_t type) "unhandled command 0x%"PRIx8 +amdvi_unhandled_command(uint64_t type) "unhandled command 0x%"PRIx64 amdvi_intr_inval(void) "Interrupt table invalidated" amdvi_iotlb_inval(void) "IOTLB pages invalidated" amdvi_prefetch_pages(void) "Pre-fetch of AMD-Vi pages requested" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435323951103.52499332801324; Mon, 13 Mar 2017 13:02:03 -0700 (PDT) Received: from localhost ([::1]:54128 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWAL-0004vX-NM for importer@patchew.org; Mon, 13 Mar 2017 16:02:01 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43046) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4k-0000o0-0Z for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4h-0002ZW-Gx for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:14 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46678) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4h-0002ZB-AU for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:11 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1C27B25E405 for ; Mon, 13 Mar 2017 19:56:11 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id C029E2D655; Mon, 13 Mar 2017 19:56:09 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:34 -0500 Message-Id: <20170313195547.21466-18-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Mon, 13 Mar 2017 19:56:11 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 17/30] trace: Fix parameter types in hw/input X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake --- hw/input/trace-events | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/input/trace-events b/hw/input/trace-events index f3bfbed..8d599ff 100644 --- a/hw/input/trace-events +++ b/hw/input/trace-events @@ -16,8 +16,8 @@ ps2_kbd_init(void *s) "%p" ps2_mouse_init(void *s) "%p" # hw/input/milkymist-softusb.c -milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x va= lue %08x" -milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x v= alue %08x" +milkymist_softusb_memory_read(hwaddr addr, uint32_t value) "addr %08" HWAD= DR_PRIx " value %08x" +milkymist_softusb_memory_write(hwaddr addr, uint64_t value) "addr %08" HWA= DDR_PRIx " value %08" PRIx64 milkymist_softusb_mevt(uint8_t m) "m %d" milkymist_softusb_kevt(uint8_t m) "m %d" milkymist_softusb_pulse_irq(void) "Pulse IRQ" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435658509391.2228650250099; Mon, 13 Mar 2017 13:07:38 -0700 (PDT) Received: from localhost ([::1]:54154 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWFj-00018s-4Q for importer@patchew.org; Mon, 13 Mar 2017 16:07:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43059) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4k-0000oh-IF for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4i-0002Zo-Kv for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:14 -0400 Received: from mx1.redhat.com ([209.132.183.28]:45386) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4i-0002Za-BC for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:12 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2D5AE68E0C for ; Mon, 13 Mar 2017 19:56:12 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 262AA2D5C3; Mon, 13 Mar 2017 19:56:11 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:35 -0500 Message-Id: <20170313195547.21466-19-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Mon, 13 Mar 2017 19:56:12 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 18/30] trace: Fix parameter types in hw/intc X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , stefanha@redhat.com, "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake --- hw/intc/apic_common.c | 2 +- hw/intc/trace-events | 40 ++++++++++++++++++++-------------------- 2 files changed, 21 insertions(+), 21 deletions(-) diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c index 7a6e771..7c41793 100644 --- a/hw/intc/apic_common.c +++ b/hw/intc/apic_common.c @@ -57,7 +57,7 @@ uint64_t cpu_get_apic_base(DeviceState *dev) trace_cpu_get_apic_base((uint64_t)s->apicbase); return s->apicbase; } else { - trace_cpu_get_apic_base(MSR_IA32_APICBASE_BSP); + trace_cpu_get_apic_base((uint64_t) MSR_IA32_APICBASE_BSP); return MSR_IA32_APICBASE_BSP; } } diff --git a/hw/intc/trace-events b/hw/intc/trace-events index 729c128..5e9dc56 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -18,18 +18,18 @@ apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64"= =3D %08x" ioapic_set_remote_irr(int n) "set remote irr for pin %d" ioapic_clear_remote_irr(int n, int vector) "clear remote irr for pin %d ve= ctor %d" ioapic_eoi_broadcast(int vector) "EOI broadcast for vector %d" -ioapic_mem_read(uint8_t addr, uint8_t size, uint32_t val) "ioapic mem read= addr 0x%"PRIx8" size 0x%"PRIx8" retval 0x%"PRIx32 -ioapic_mem_write(uint8_t addr, uint8_t size, uint32_t val) "ioapic mem wri= te addr 0x%"PRIx8" size 0x%"PRIx8" val 0x%"PRIx32 +ioapic_mem_read(hwaddr addr, uint8_t size, uint32_t val) "ioapic mem read = addr 0x%" HWADDR_PRIx " size 0x%"PRIx8" retval 0x%"PRIx32 +ioapic_mem_write(hwaddr addr, uint8_t size, uint64_t val) "ioapic mem writ= e addr 0x%" HWADDR_PRIx " size 0x%"PRIx8" val 0x%" PRIx64 # hw/intc/slavio_intctl.c slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read c= pu %d reg 0x%"PRIx64" =3D %x" -slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write= cpu %d reg 0x%"PRIx64" =3D %x" -slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg= _pending) "Cleared cpu %d irq mask %x, curmask %x" -slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_p= ending) "Set cpu %d irq mask %x, curmask %x" +slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint64_t val) "write= cpu %d reg 0x%"PRIx64" =3D %" PRIx64 +slavio_intctl_mem_writel_clear(uint32_t cpu, uint64_t val, uint32_t intreg= _pending) "Cleared cpu %d irq mask %" PRIx64 ", curmask %x" +slavio_intctl_mem_writel_set(uint32_t cpu, uint64_t val, uint32_t intreg_p= ending) "Set cpu %d irq mask %" PRIx64 ", curmask %x" slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%= "PRIx64" =3D %x" -slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0= x%"PRIx64" =3D %x" -slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) = "Enabled master irq mask %x, curmask %x" -slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled)= "Disabled master irq mask %x, curmask %x" +slavio_intctlm_mem_writel(uint64_t addr, uint64_t val) "write system reg 0= x%"PRIx64" =3D %" PRIx64 +slavio_intctlm_mem_writel_enable(uint64_t val, uint32_t intregm_disabled) = "Enabled master irq mask %" PRIx64 ", curmask %x" +slavio_intctlm_mem_writel_disable(uint64_t val, uint32_t intregm_disabled)= "Disabled master irq mask %" PRIx64 ", curmask %x" slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d" slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pend= ing %x disabled %x" slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set= cpu %d irq %d -> pil %d level %d" @@ -40,7 +40,7 @@ grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uin= t32_t mask, uint32_t lv grlib_irqmp_ack(int intno) "interrupt:%d" grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d" grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64 -grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64= " value 0x%x" +grlib_irqmp_writel_unknown(uint64_t addr, uint64_t value) "addr 0x%"PRIx64= " value 0x%" PRIx64 # hw/intc/lm32_pic.c lm32_pic_raise_irq(void) "Raise CPU interrupt" @@ -77,8 +77,8 @@ flic_reset_failed(int err) "flic: reset failed %d" aspeed_vic_set_irq(int irq, int level) "Enabling IRQ %d: %d" aspeed_vic_update_fiq(int flags) "Raising FIQ: %d" aspeed_vic_update_irq(int flags) "Raising IRQ: %d" -aspeed_vic_read(uint64_t offset, unsigned size, uint32_t value) "From 0x%"= PRIx64 " of size %u: 0x%" PRIx32 -aspeed_vic_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" P= RIx64 " of size %u: 0x%" PRIx32 +aspeed_vic_read(uint64_t offset, unsigned size, uint64_t value) "From 0x%"= PRIx64 " of size %u: 0x%" PRIx64 +aspeed_vic_write(uint64_t offset, unsigned size, uint64_t data) "To 0x%" P= RIx64 " of size %u: 0x%" PRIx64 # hw/intc/arm_gic.c gic_enable_irq(int irq) "irq %d enabled" @@ -89,7 +89,7 @@ gic_update_set_irq(int cpu, const char *name, int level) = "cpu[%d]: %s =3D %d" gic_acknowledge_irq(int cpu, int irq) "cpu %d acknowledged irq %d" # hw/intc/arm_gicv3_cpuif.c -gicv3_icc_pmr_read(uint32_t cpu, uint64_t val) "GICv3 ICC_PMR read cpu %x = value 0x%" PRIx64 +gicv3_icc_pmr_read(uint32_t cpu, uint32_t val) "GICv3 ICC_PMR read cpu %x = value 0x%" PRIx32 gicv3_icc_pmr_write(uint32_t cpu, uint64_t val) "GICv3 ICC_PMR write cpu %= x value 0x%" PRIx64 gicv3_icc_bpr_read(int grp, uint32_t cpu, uint64_t val) "GICv3 ICC_BPR%d r= ead cpu %x value 0x%" PRIx64 gicv3_icc_bpr_write(int grp, uint32_t cpu, uint64_t val) "GICv3 ICC_BPR%d = write cpu %x value 0x%" PRIx64 @@ -105,14 +105,14 @@ gicv3_icc_ctlr_el3_read(uint32_t cpu, uint64_t val) "= GICv3 ICC_CTLR_EL3 read cpu gicv3_icc_ctlr_el3_write(uint32_t cpu, uint64_t val) "GICv3 ICC_CTLR_EL3 w= rite cpu %x value 0x%" PRIx64 gicv3_cpuif_update(uint32_t cpuid, int irq, int grp, int prio) "GICv3 CPU = i/f %x HPPI update: irq %d group %d prio %d" gicv3_cpuif_set_irqs(uint32_t cpuid, int fiqlevel, int irqlevel) "GICv3 CP= U i/f %x HPPI update: setting FIQ %d IRQ %d" -gicv3_icc_generate_sgi(uint32_t cpuid, int irq, int irm, uint32_t aff, uin= t32_t targetlist) "GICv3 CPU i/f %x generating SGI %d IRM %d target affinit= y 0x%xxx targetlist 0x%x" +gicv3_icc_generate_sgi(uint32_t cpuid, int irq, int irm, uint64_t aff, uin= t32_t targetlist) "GICv3 CPU i/f %x generating SGI %d IRM %d target affinit= y 0x%" PRIx64 "xx targetlist 0x%x" gicv3_icc_iar0_read(uint32_t cpu, uint64_t val) "GICv3 ICC_IAR0 read cpu %= x value 0x%" PRIx64 gicv3_icc_iar1_read(uint32_t cpu, uint64_t val) "GICv3 ICC_IAR1 read cpu %= x value 0x%" PRIx64 gicv3_icc_eoir_write(int grp, uint32_t cpu, uint64_t val) "GICv3 ICC_EOIR%= d write cpu %x value 0x%" PRIx64 gicv3_icc_hppir0_read(uint32_t cpu, uint64_t val) "GICv3 ICC_HPPIR0 read c= pu %x value 0x%" PRIx64 gicv3_icc_hppir1_read(uint32_t cpu, uint64_t val) "GICv3 ICC_HPPIR1 read c= pu %x value 0x%" PRIx64 gicv3_icc_dir_write(uint32_t cpu, uint64_t val) "GICv3 ICC_DIR write cpu %= x value 0x%" PRIx64 -gicv3_icc_rpr_read(uint32_t cpu, uint64_t val) "GICv3 ICC_RPR read cpu %x = value 0x%" PRIx64 +gicv3_icc_rpr_read(uint32_t cpu, int val) "GICv3 ICC_RPR read cpu %x value= 0x%x" gicv3_ich_ap_read(int grp, int regno, uint32_t cpu, uint64_t val) "GICv3 I= CH_AP%dR%d read cpu %x value 0x%" PRIx64 gicv3_ich_ap_write(int grp, int regno, uint32_t cpu, uint64_t val) "GICv3 = ICH_AP%dR%d write cpu %x value 0x%" PRIx64 gicv3_ich_hcr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_HCR_EL2 read cpu= %x value 0x%" PRIx64 @@ -120,11 +120,11 @@ gicv3_ich_hcr_write(uint32_t cpu, uint64_t val) "GICv= 3 ICH_HCR_EL2 write cpu %x gicv3_ich_vmcr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 read c= pu %x value 0x%" PRIx64 gicv3_ich_vmcr_write(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 write= cpu %x value 0x%" PRIx64 gicv3_ich_lr_read(int regno, uint32_t cpu, uint64_t val) "GICv3 ICH_LR%d_E= L2 read cpu %x value 0x%" PRIx64 -gicv3_ich_lr32_read(int regno, uint32_t cpu, uint32_t val) "GICv3 ICH_LR%d= read cpu %x value 0x%" PRIx32 -gicv3_ich_lrc_read(int regno, uint32_t cpu, uint32_t val) "GICv3 ICH_LRC%d= read cpu %x value 0x%" PRIx32 +gicv3_ich_lr32_read(int regno, uint32_t cpu, uint64_t val) "GICv3 ICH_LR%d= read cpu %x value 0x%" PRIx64 +gicv3_ich_lrc_read(int regno, uint32_t cpu, uint64_t val) "GICv3 ICH_LRC%d= read cpu %x value 0x%" PRIx64 gicv3_ich_lr_write(int regno, uint32_t cpu, uint64_t val) "GICv3 ICH_LR%d_= EL2 write cpu %x value 0x%" PRIx64 -gicv3_ich_lr32_write(int regno, uint32_t cpu, uint32_t val) "GICv3 ICH_LR%= d write cpu %x value 0x%" PRIx32 -gicv3_ich_lrc_write(int regno, uint32_t cpu, uint32_t val) "GICv3 ICH_LRC%= d write cpu %x value 0x%" PRIx32 +gicv3_ich_lr32_write(int regno, uint32_t cpu, uint64_t val) "GICv3 ICH_LR%= d write cpu %x value 0x%" PRIx64 +gicv3_ich_lrc_write(int regno, uint32_t cpu, uint64_t val) "GICv3 ICH_LRC%= d write cpu %x value 0x%" PRIx64 gicv3_ich_vtr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_VTR read cpu %x = value 0x%" PRIx64 gicv3_ich_misr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_MISR read cpu %= x value 0x%" PRIx64 gicv3_ich_eisr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_EISR read cpu %= x value 0x%" PRIx64 @@ -139,7 +139,7 @@ gicv3_icv_igrpen_read(int grp, uint32_t cpu, uint64_t v= al) "GICv3 ICV_IGRPEN%d r gicv3_icv_igrpen_write(int grp, uint32_t cpu, uint64_t val) "GICv3 ICV_IGR= PEN%d write cpu %x value 0x%" PRIx64 gicv3_icv_ctlr_read(uint32_t cpu, uint64_t val) "GICv3 ICV_CTLR read cpu %= x value 0x%" PRIx64 gicv3_icv_ctlr_write(uint32_t cpu, uint64_t val) "GICv3 ICV_CTLR write cpu= %x value 0x%" PRIx64 -gicv3_icv_rpr_read(uint32_t cpu, uint64_t val) "GICv3 ICV_RPR read cpu %x = value 0x%" PRIx64 +gicv3_icv_rpr_read(uint32_t cpu, int val) "GICv3 ICV_RPR read cpu %x value= 0x%x" gicv3_icv_hppir_read(int grp, uint32_t cpu, uint64_t val) "GICv3 ICV_HPPIR= %d read cpu %x value 0x%" PRIx64 gicv3_icv_dir_write(uint32_t cpu, uint64_t val) "GICv3 ICV_DIR write cpu %= x value 0x%" PRIx64 gicv3_icv_iar_read(int grp, uint32_t cpu, uint64_t val) "GICv3 ICV_IAR%d r= ead cpu %x value 0x%" PRIx64 @@ -175,4 +175,4 @@ nvic_acknowledge_irq(int irq, int prio) "NVIC acknowled= ge IRQ: %d now active (pr nvic_complete_irq(int irq) "NVIC complete IRQ %d" nvic_set_irq_level(int irq, int level) "NVIC external irq %d level set to = %d" nvic_sysreg_read(uint64_t addr, uint32_t value, unsigned size) "NVIC sysre= g read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" -nvic_sysreg_write(uint64_t addr, uint32_t value, unsigned size) "NVIC sysr= eg write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" +nvic_sysreg_write(uint64_t addr, uint64_t value, unsigned size) "NVIC sysr= eg write addr 0x%" PRIx64 " data 0x%" PRIx64 " size %u" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435520097304.40132159609675; Mon, 13 Mar 2017 13:05:20 -0700 (PDT) Received: from localhost ([::1]:54141 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWDU-0007Xi-Vi for importer@patchew.org; Mon, 13 Mar 2017 16:05:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43047) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4k-0000o2-0s for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4j-0002a9-6C for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:14 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43350) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4i-0002Zf-Vf for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:13 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id CE994C05B1D3 for ; Mon, 13 Mar 2017 19:56:12 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 356052D5C1; Mon, 13 Mar 2017 19:56:12 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:36 -0500 Message-Id: <20170313195547.21466-20-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Mon, 13 Mar 2017 19:56:12 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 19/30] trace: Fix parameter types in hw/isa X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake --- hw/isa/trace-events | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/isa/trace-events b/hw/isa/trace-events index 9faca41..58179ef 100644 --- a/hw/isa/trace-events +++ b/hw/isa/trace-events @@ -1,8 +1,8 @@ # See docs/tracing.txt for syntax documentation. # hw/isa/pc87312.c -pc87312_io_read(uint32_t addr, uint32_t val) "read addr=3D%x val=3D%x" -pc87312_io_write(uint32_t addr, uint32_t val) "write addr=3D%x val=3D%x" +pc87312_io_read(hwaddr addr, uint32_t val) "read addr=3D%" HWADDR_PRIx " v= al=3D%x" +pc87312_io_write(hwaddr addr, uint64_t val) "write addr=3D%" HWADDR_PRIx "= val=3D%" PRIx64 pc87312_info_floppy(uint32_t base) "base 0x%x" pc87312_info_ide(uint32_t base) "base 0x%x" pc87312_info_parallel(uint32_t base, uint32_t irq) "base 0x%x, irq %u" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435469007470.7302800415084; Mon, 13 Mar 2017 13:04:29 -0700 (PDT) Received: from localhost ([::1]:54137 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWCh-0006t0-QG for importer@patchew.org; Mon, 13 Mar 2017 16:04:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43073) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4l-0000pH-2Y for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4j-0002aQ-R1 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:15 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43352) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4j-0002a1-J1 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:13 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 873DFC0546E3 for ; Mon, 13 Mar 2017 19:56:13 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id E32C32D655; Mon, 13 Mar 2017 19:56:12 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:37 -0500 Message-Id: <20170313195547.21466-21-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Mon, 13 Mar 2017 19:56:13 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 20/30] trace: Fix parameter types in hw/misc X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake --- hw/misc/trace-events | 44 ++++++++++++++++++++++---------------------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/hw/misc/trace-events b/hw/misc/trace-events index 0cc556c..71c8e3b 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -1,13 +1,13 @@ # See docs/tracing.txt for syntax documentation. # hw/misc/eccmemctl.c -ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x" -ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x" -ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x" -ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x" -ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x" -ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x" -ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x" +ecc_mem_writel_mer(uint64_t val) "Write memory enable %08" PRIx64 +ecc_mem_writel_mdr(uint64_t val) "Write memory delay %08" PRIx64 +ecc_mem_writel_mfsr(uint64_t val) "Write memory fault status %08" PRIx64 +ecc_mem_writel_vcr(uint64_t val) "Write slot configuration %08" PRIx64 +ecc_mem_writel_dr(uint64_t val) "Write diagnostic %08" PRIx64 +ecc_mem_writel_ecr0(uint64_t val) "Write event count 1 %08" PRIx64 +ecc_mem_writel_ecr1(uint64_t val) "Write event count 2 %08" PRIx64 ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x" ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x" ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x" @@ -17,39 +17,39 @@ ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault ad= dress 1 %08x" ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x" ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x" ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x" -ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId6= 4" =3D %02x" +ecc_diag_mem_writeb(uint64_t addr, uint64_t val) "Write diagnostic %"PRId6= 4" =3D %02" PRIx64 ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= =3D %02x" # hw/misc/slavio_misc.c slavio_misc_update_irq_raise(void) "Raise IRQ" slavio_misc_update_irq_lower(void) "Lower IRQ" slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, = config: %d" -slavio_cfg_mem_writeb(uint32_t val) "Write config %02x" +slavio_cfg_mem_writeb(uint64_t val) "Write config %02" PRIx64 slavio_cfg_mem_readb(uint32_t ret) "Read config %02x" -slavio_diag_mem_writeb(uint32_t val) "Write diag %02x" +slavio_diag_mem_writeb(uint64_t val) "Write diag %02" PRIx64 slavio_diag_mem_readb(uint32_t ret) "Read diag %02x" -slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x" +slavio_mdm_mem_writeb(uint64_t val) "Write modem control %02" PRIx64 slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x" -slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x" +slavio_aux1_mem_writeb(uint64_t val) "Write aux1 %02" PRIx64 slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x" -slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x" +slavio_aux2_mem_writeb(uint64_t val) "Write aux2 %02" PRIx64 slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x" -apc_mem_writeb(uint32_t val) "Write power management %02x" +apc_mem_writeb(uint64_t val) "Write power management %02" PRIx64 apc_mem_readb(uint32_t ret) "Read power management %02x" -slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x" +slavio_sysctrl_mem_writel(uint64_t val) "Write system control %08" PRIx64 slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x" -slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x" +slavio_led_mem_writew(uint64_t val) "Write diagnostic LED %04" PRIx64 slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x" # hw/misc/milkymist-hpdmc.c -milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=3D%08x va= lue=3D%08x" -milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=3D%08x v= alue=3D%08x" +milkymist_hpdmc_memory_read(hwaddr addr, uint32_t value) "addr=3D%08" HWAD= DR_PRIx " value=3D%08x" +milkymist_hpdmc_memory_write(hwaddr addr, uint64_t value) "addr=3D%08" HWA= DDR_PRIx " value=3D%08" PRIx64 # hw/misc/milkymist-pfpu.c -milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value= %08x" -milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x valu= e %08x" -milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b= %08x dma_ptr %08x" +milkymist_pfpu_memory_read(hwaddr addr, uint32_t value) "addr %08" HWADDR_= PRIx " value %08x" +milkymist_pfpu_memory_write(hwaddr addr, uint64_t value) "addr %08" HWADDR= _PRIx " value %08" PRIx64 +milkymist_pfpu_vectout(uint32_t a, uint32_t b, hwaddr dma_ptr) "a %08x b %= 08x dma_ptr %08" HWADDR_PRIx milkymist_pfpu_pulse_irq(void) "Pulse IRQ" # hw/misc/aspeed_scu.c -aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" P= RIx64 " of size %u: 0x%" PRIx32 +aspeed_scu_write(uint64_t offset, unsigned size, uint64_t data) "To 0x%" P= RIx64 " of size %u: 0x%" PRIx64 --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435613878552.6224375310176; Mon, 13 Mar 2017 13:06:53 -0700 (PDT) Received: from localhost ([::1]:54151 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWF1-0000VW-CY for importer@patchew.org; Mon, 13 Mar 2017 16:06:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43104) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4m-0000qo-NA for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4k-0002b7-Pf for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:16 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41358) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4k-0002aW-Hx for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:14 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 884193D942; Mon, 13 Mar 2017 19:56:14 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9D7292D655; Mon, 13 Mar 2017 19:56:13 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:38 -0500 Message-Id: <20170313195547.21466-22-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Mon, 13 Mar 2017 19:56:14 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 21/30] trace: Fix parameter types in hw/net X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Dmitry Fleytman , Jason Wang , stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. In one case, the trace file wants to print bools; update the callers to coerce bit operations into appropriate boolean values. Signed-off-by: Eric Blake Reviewed-by: Dmitry Fleytman --- hw/net/e1000e_core.c | 10 ++++----- hw/net/trace-events | 58 ++++++++++++++++++++++++++----------------------= ---- 2 files changed, 34 insertions(+), 34 deletions(-) diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c index 28c5be1..3b3c231 100644 --- a/hw/net/e1000e_core.c +++ b/hw/net/e1000e_core.c @@ -507,8 +507,8 @@ e1000e_rss_get_hash_type(E1000ECore *core, struct NetRx= Pkt *pkt) bool fragment =3D net_rx_pkt_get_ip4_info(pkt)->fragment; trace_e1000e_rx_rss_ip4(fragment, istcp, core->mac[MRQC], - E1000_MRQC_EN_TCPIPV4(core->mac[MRQC]), - E1000_MRQC_EN_IPV4(core->mac[MRQC])); + !!E1000_MRQC_EN_TCPIPV4(core->mac[MRQC]), + !!E1000_MRQC_EN_IPV4(core->mac[MRQC])); if (!fragment && istcp && E1000_MRQC_EN_TCPIPV4(core->mac[MRQC])) { return E1000_MRQ_RSS_TYPE_IPV4TCP; @@ -536,9 +536,9 @@ e1000e_rss_get_hash_type(E1000ECore *core, struct NetRx= Pkt *pkt) ip6info->rss_ex_dst_valid, ip6info->rss_ex_src_valid, core->mac[MRQC], - E1000_MRQC_EN_TCPIPV6(core->mac[MRQC]), - E1000_MRQC_EN_IPV6EX(core->mac[MRQC]), - E1000_MRQC_EN_IPV6(core->mac[MRQC])); + !!E1000_MRQC_EN_TCPIPV6(core->mac[MRQC]), + !!E1000_MRQC_EN_IPV6EX(core->mac[MRQC]), + !!E1000_MRQC_EN_IPV6(core->mac[MRQC])); if ((!ex_dis || !ip6info->has_ext_hdrs) && (!new_ex_dis || !(ip6info->rss_ex_dst_valid || diff --git a/hw/net/trace-events b/hw/net/trace-events index c714805..317fad4 100644 --- a/hw/net/trace-events +++ b/hw/net/trace-events @@ -2,23 +2,23 @@ # hw/net/lance.c lance_mem_readw(uint64_t addr, uint32_t ret) "addr=3D%"PRIx64"val=3D0x%04x" -lance_mem_writew(uint64_t addr, uint32_t val) "addr=3D%"PRIx64"val=3D0x%04= x" +lance_mem_writew(uint64_t addr, uint64_t val) "addr=3D%"PRIx64"val=3D0x%04= " PRIx64 # hw/net/milkymist-minimac2.c -milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x v= alue %08x" -milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x = value %08x" +milkymist_minimac2_memory_read(hwaddr addr, uint32_t value) "addr %08" HWA= DDR_PRIx " value %08x" +milkymist_minimac2_memory_write(hwaddr addr, uint64_t value) "addr %08" HW= ADDR_PRIx " value %08" PRIx64 milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t val= ue) "phy_addr %02x addr %02x value %04x" milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t valu= e) "phy_addr %02x addr %02x value %04x" milkymist_minimac2_tx_frame(uint32_t length) "length %u" -milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p leng= th %u" -milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p l= ength %d" +milkymist_minimac2_rx_frame(const void *buf, size_t length) "buf %p length= %zu" +milkymist_minimac2_rx_transfer(const void *buf, size_t length) "buf %p len= gth %zd" milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX" milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX" milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX" # hw/net/mipsnet.c mipsnet_send(uint32_t size) "sending len=3D%u" -mipsnet_receive(uint32_t size) "receiving len=3D%u" +mipsnet_receive(size_t size) "receiving len=3D%zu" mipsnet_read(uint64_t addr, uint32_t val) "read addr=3D0x%" PRIx64 " val= =3D0x%x" mipsnet_write(uint64_t addr, uint64_t val) "write addr=3D0x%" PRIx64 " val= =3D0x%" PRIx64 mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)" @@ -41,7 +41,7 @@ open_eth_desc_write(uint32_t addr, uint32_t v) "DESC[%04x= ] <- %08x" pcnet_s_reset(void *s) "s=3D%p" pcnet_user_int(void *s) "s=3D%p" pcnet_isr_change(void *s, uint32_t isr, uint32_t isr_old) "s=3D%p INTA=3D%= d<=3D%d" -pcnet_init(void *s, uint64_t init_addr) "s=3D%p init_addr=3D%#"PRIx64 +pcnet_init(void *s, uint32_t init_addr) "s=3D%p init_addr=3D%#"PRIx32 pcnet_rlen_tlen(void *s, uint32_t rlen, uint32_t tlen) "s=3D%p rlen=3D%d t= len=3D%d" pcnet_ss32_rdra_tdra(void *s, uint32_t ss32, uint32_t rdra, uint32_t rcvrl= , uint32_t tdra, uint32_t xmtrl) "s=3D%p ss32=3D%d rdra=3D0x%08x[%d] tdra= =3D0x%08x[%d]" @@ -79,7 +79,7 @@ net_rx_pkt_l4_csum_fix_udp(uint32_t l4_cso) "UDP packet, = L4 cso: %u" net_rx_pkt_l4_csum_fix_not_xxp(void) "Not an IP4 packet" net_rx_pkt_l4_csum_fix_ip4_fragment(void) "IP4 fragment" net_rx_pkt_l4_csum_fix_udp_with_no_checksum(void) "UDP packet without chec= ksum" -net_rx_pkt_l4_csum_fix_csum(uint32_t cso, uint16_t csum) "L4 Checksum: Off= set: %u, value 0x%X" +net_rx_pkt_l4_csum_fix_csum(size_t cso, uint16_t csum) "L4 Checksum: Offse= t: %zu, value 0x%X" net_rx_pkt_l3_csum_validate_entry(void) "Starting L3 checksum validation" net_rx_pkt_l3_csum_validate_not_ip4(void) "Not an IP4 packet" @@ -107,13 +107,13 @@ e1000x_link_negotiation_start(void) "Start link auto = negotiation" e1000x_link_negotiation_done(void) "Auto negotiation is completed" # hw/net/e1000e_core.c -e1000e_core_write(uint64_t index, uint32_t size, uint64_t val) "Write to r= egister 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 -e1000e_core_read(uint64_t index, uint32_t size, uint64_t val) "Read from r= egister 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 +e1000e_core_write(int index, unsigned size, uint64_t val) "Write to regist= er 0x%x, %d byte(s), value: 0x%"PRIx64 +e1000e_core_read(int index, unsigned size, uint64_t val) "Read from regist= er 0x%x, %d byte(s), value: 0x%"PRIx64 e1000e_core_mdic_read(uint8_t page, uint32_t addr, uint32_t data) "MDIC RE= AD: PHY[%u][%u] =3D 0x%x" e1000e_core_mdic_read_unhandled(uint8_t page, uint32_t addr) "MDIC READ: P= HY[%u][%u] UNHANDLED" e1000e_core_mdic_write(uint8_t page, uint32_t addr, uint32_t data) "MDIC W= RITE: PHY[%u][%u] =3D 0x%x" e1000e_core_mdic_write_unhandled(uint8_t page, uint32_t addr) "MDIC WRITE:= PHY[%u][%u] UNHANDLED" -e1000e_core_ctrl_write(uint64_t index, uint32_t val) "Write CTRL register = 0x%"PRIx64", value: 0x%X" +e1000e_core_ctrl_write(int index, uint32_t val) "Write CTRL register 0x%x,= value: 0x%X" e1000e_core_ctrl_sw_reset(void) "Doing SW reset" e1000e_core_ctrl_phy_reset(void) "Doing PHY reset" @@ -124,9 +124,9 @@ e1000e_link_set_ext_params(bool asd_check, bool speed_s= elect_bypass) "Set extend e1000e_link_status(bool link_up, bool full_dplx, uint32_t speed, uint32_t = asdv) "Link up: %d, Duplex: %d, Speed: %d, ASDV: %d" e1000e_link_status_changed(bool status) "New link status: %d" -e1000e_wrn_regs_write_ro(uint64_t index, uint32_t size, uint64_t val) "WAR= NING: Write to RO register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 -e1000e_wrn_regs_write_unknown(uint64_t index, uint32_t size, uint64_t val)= "WARNING: Write to unknown register 0x%"PRIx64", %d byte(s), value: 0x%"PR= Ix64 -e1000e_wrn_regs_read_unknown(uint64_t index, uint32_t size) "WARNING: Read= from unknown register 0x%"PRIx64", %d byte(s)" +e1000e_wrn_regs_write_ro(int index, unsigned size, uint64_t val) "WARNING:= Write to RO register 0x%x, %d byte(s), value: 0x%"PRIx64 +e1000e_wrn_regs_write_unknown(int index, unsigned size, uint64_t val) "WAR= NING: Write to unknown register 0x%x, %d byte(s), value: 0x%"PRIx64 +e1000e_wrn_regs_read_unknown(int index, unsigned size) "WARNING: Read from= unknown register 0x%x, %d byte(s)" e1000e_wrn_regs_read_trivial(uint32_t index) "WARNING: Reading register at= offset: 0x%05x. It is not fully implemented." e1000e_wrn_regs_write_trivial(uint32_t index) "WARNING: Writing to registe= r at offset: 0x%05x. It is not fully implemented." e1000e_wrn_no_ts_support(void) "WARNING: Guest requested TX timestamping w= hich is not supported" @@ -166,10 +166,10 @@ e1000e_rx_start_recv(void) e1000e_rx_rss_started(void) "Starting RSS processing" e1000e_rx_rss_disabled(void) "RSS is disabled" -e1000e_rx_rss_type(uint32_t type) "RSS type is %u" -e1000e_rx_rss_ip4(bool isfragment, bool istcp, uint32_t mrqc, bool tcpipv4= _enabled, bool ipv4_enabled) "RSS IPv4: fragment %d, tcp %d, mrqc 0x%X, tcp= ipv4 enabled %d, ipv4 enabled %d" -e1000e_rx_rss_ip6_rfctl(uint32_t rfctl) "RSS IPv6: rfctl 0x%X" -e1000e_rx_rss_ip6(bool ex_dis, bool new_ex_dis, bool istcp, bool has_ext_h= eaders, bool ex_dst_valid, bool ex_src_valid, uint32_t mrqc, bool tcpipv6_e= nabled, bool ipv6ex_enabled, bool ipv6_enabled) "RSS IPv6: ex_dis: %d, new_= ex_dis: %d, tcp %d, has_ext_headers %d, ex_dst_valid %d, ex_src_valid %d, m= rqc 0x%X, tcpipv6 enabled %d, ipv6ex enabled %d, ipv6 enabled %d" +e1000e_rx_rss_type(uint32_t type) "RSS type is %" PRIu32 +e1000e_rx_rss_ip4(bool isfragment, bool istcp, uint32_t mrqc, bool tcpipv4= _enabled, bool ipv4_enabled) "RSS IPv4: fragment %d, tcp %d, mrqc 0x%" PRIX= 32 ", tcpipv4 enabled %d, ipv4 enabled %d" +e1000e_rx_rss_ip6_rfctl(uint32_t rfctl) "RSS IPv6: rfctl 0x%" PRIX32 +e1000e_rx_rss_ip6(bool ex_dis, bool new_ex_dis, bool istcp, bool has_ext_h= eaders, bool ex_dst_valid, bool ex_src_valid, uint32_t mrqc, bool tcpipv6_e= nabled, bool ipv6ex_enabled, bool ipv6_enabled) "RSS IPv6: ex_dis: %d, new_= ex_dis: %d, tcp %d, has_ext_headers %d, ex_dst_valid %d, ex_src_valid %d, m= rqc 0x%" PRIX32 ", tcpipv6 enabled %d, ipv6ex enabled %d, ipv6 enabled %d" e1000e_rx_rss_dispatched_to_queue(int queue_idx) "Packet being dispatched = to queue %d" e1000e_rx_metadata_protocols(bool isip4, bool isip6, bool isudp, bool istc= p) "protocols: ip4: %d, ip6: %d, udp: %d, tcp: %d" @@ -244,15 +244,15 @@ e1000e_cb_qdev_reset(void) "E1000E qdev reset entry" e1000e_cb_pre_save(void) "E1000E pre save entry" e1000e_cb_post_load(void) "E1000E post load entry" -e1000e_io_write_addr(uint64_t addr) "IOADDR write 0x%"PRIx64 -e1000e_io_write_data(uint64_t addr, uint64_t val) "IODATA write 0x%"PRIx64= ", value: 0x%"PRIx64 -e1000e_io_read_addr(uint64_t addr) "IOADDR read 0x%"PRIx64 -e1000e_io_read_data(uint64_t addr, uint64_t val) "IODATA read 0x%"PRIx64",= value: 0x%"PRIx64 -e1000e_wrn_io_write_unknown(uint64_t addr) "IO write unknown address 0x%"P= RIx64 -e1000e_wrn_io_read_unknown(uint64_t addr) "IO read unknown address 0x%"PRI= x64 -e1000e_wrn_io_addr_undefined(uint64_t addr) "IO undefined register 0x%"PRI= x64 -e1000e_wrn_io_addr_flash(uint64_t addr) "IO flash access (0x%"PRIx64") not= implemented" -e1000e_wrn_io_addr_unknown(uint64_t addr) "IO unknown register 0x%"PRIx64 +e1000e_io_write_addr(hwaddr addr) "IOADDR write 0x%" HWADDR_PRIx +e1000e_io_write_data(uint32_t addr, uint64_t val) "IODATA write 0x%"PRIx32= ", value: 0x%"PRIx64 +e1000e_io_read_addr(uint32_t addr) "IOADDR read 0x%"PRIx32 +e1000e_io_read_data(uint32_t addr, uint64_t val) "IODATA read 0x%"PRIx32",= value: 0x%"PRIx64 +e1000e_wrn_io_write_unknown(hwaddr addr) "IO write unknown address 0x%" HW= ADDR_PRIx +e1000e_wrn_io_read_unknown(hwaddr addr) "IO read unknown address 0x%" HWAD= DR_PRIx +e1000e_wrn_io_addr_undefined(uint32_t addr) "IO undefined register 0x%"PRI= x32 +e1000e_wrn_io_addr_flash(uint32_t addr) "IO flash access (0x%"PRIx32") not= implemented" +e1000e_wrn_io_addr_unknown(uint32_t addr) "IO unknown register 0x%"PRIx32 e1000e_msi_init_fail(int32_t res) "Failed to initialize MSI, error %d" e1000e_msix_init_fail(int32_t res) "Failed to initialize MSI-X, error %d" @@ -270,8 +270,8 @@ spapr_vlan_get_rx_bd_from_page_found(uint32_t use_buf_p= tr, uint32_t rx_bufs) "pt spapr_vlan_receive(const char *id, uint32_t rx_bufs) "[%s] rx_bufs=3D%"PRI= u32 spapr_vlan_receive_dma_completed(void) "DMA write completed" spapr_vlan_receive_wrote(uint64_t ptr, uint64_t hi, uint64_t lo) "rxq entr= y (ptr=3D0x%"PRIx64"): 0x%016"PRIx64" 0x%016"PRIx64 -spapr_vlan_add_rxbuf_to_pool_create(int pool, uint64_t len) "created RX po= ol %d for size %"PRIu64 -spapr_vlan_add_rxbuf_to_pool(int pool, uint64_t len, int32_t count) "add b= uf using pool %d (size %"PRIu64", count=3D%"PRId32")" +spapr_vlan_add_rxbuf_to_pool_create(int pool, unsigned long long len) "cre= ated RX pool %d for size %llu" +spapr_vlan_add_rxbuf_to_pool(int pool, unsigned long long len, int32_t cou= nt) "add buf using pool %d (size %llu, count=3D%"PRId32")" spapr_vlan_add_rxbuf_to_page(uint32_t ptr, uint32_t rx_bufs, uint64_t bd) = "added buf ptr=3D%"PRIu32" rx_bufs=3D%"PRIu32" bd=3D0x%016"PRIx64 spapr_vlan_h_add_logical_lan_buffer(uint64_t reg, uint64_t buf) "H_ADD_LOG= ICAL_LAN_BUFFER(0x%"PRIx64", 0x%"PRIx64")" spapr_vlan_h_send_logical_lan(uint64_t reg, uint64_t continue_token) "H_SE= ND_LOGICAL_LAN(0x%"PRIx64", , 0x%"PRIx64")" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435751155446.3497664286307; Mon, 13 Mar 2017 13:09:11 -0700 (PDT) Received: from localhost ([::1]:54160 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWHF-0002WH-Pz for importer@patchew.org; Mon, 13 Mar 2017 16:09:09 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43096) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4m-0000qJ-75 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4l-0002be-GH for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:16 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46906) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4l-0002av-BK for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:15 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4BBC7A0B50 for ; Mon, 13 Mar 2017 19:56:15 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 985B32D5C1; Mon, 13 Mar 2017 19:56:14 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:39 -0500 Message-Id: <20170313195547.21466-23-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Mon, 13 Mar 2017 19:56:15 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 22/30] trace: Fix parameter types in hw/nvram X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the traces to use types matching the callers, and in this case, make sure all callers pass the same width type. Signed-off-by: Eric Blake --- hw/nvram/fw_cfg.c | 2 +- hw/nvram/trace-events | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index 316fca9..5c328c8 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -435,7 +435,7 @@ static void fw_cfg_dma_transfer(FWCfgState *s) stl_be_dma(s->dma_as, dma_addr + offsetof(FWCfgDmaAccess, control), dma.control); - trace_fw_cfg_read(s, 0); + trace_fw_cfg_read(s, (uint64_t) 0); } static uint64_t fw_cfg_dma_mem_read(void *opaque, hwaddr addr, diff --git a/hw/nvram/trace-events b/hw/nvram/trace-events index 1f1e05a..32d67c2 100644 --- a/hw/nvram/trace-events +++ b/hw/nvram/trace-events @@ -1,8 +1,8 @@ # See docs/tracing.txt for syntax documentation. # hw/nvram/ds1225y.c -nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x" -nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%= 02x -> 0x%02x" +nvram_read(hwaddr addr, uint32_t ret) "read addr %" HWADDR_PRId ": 0x%02x" +nvram_write(hwaddr addr, uint32_t old, uint64_t val) "write addr %" HWADDR= _PRId ": 0x%02x -> 0x%02" PRIx64 # hw/nvram/fw_cfg.c fw_cfg_select(void *s, uint16_t key, int ret) "%p key %d =3D %d" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489436056252648.8830665438855; Mon, 13 Mar 2017 13:14:16 -0700 (PDT) Received: from localhost ([::1]:54197 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWMB-00074D-2c for importer@patchew.org; Mon, 13 Mar 2017 16:14:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43119) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4n-0000rG-Fb for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4m-0002c9-Dz for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:17 -0400 Received: from mx1.redhat.com ([209.132.183.28]:32824) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4m-0002bk-6B; Mon, 13 Mar 2017 15:56:16 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 45F8580F7B; Mon, 13 Mar 2017 19:56:16 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 50DF92D655; Mon, 13 Mar 2017 19:56:15 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:40 -0500 Message-Id: <20170313195547.21466-24-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Mon, 13 Mar 2017 19:56:16 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 23/30] trace: Fix parameter types in hw/ppc X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:PowerPC" , Alexander Graf , stefanha@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake --- hw/ppc/trace-events | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events index 43d265f..3414c46 100644 --- a/hw/ppc/trace-events +++ b/hw/ppc/trace-events @@ -20,18 +20,18 @@ spapr_cas_pvr(uint32_t cur_pvr, bool explicit_match, ui= nt32_t new_pvr) "current=3D # hw/ppc/spapr_iommu.c spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret)= "liobn=3D%"PRIx64" ioba=3D0x%"PRIx64" tce=3D0x%"PRIx64" ret=3D%"PRId64 spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce)= "liobn=3D%"PRIx64" ioba=3D0x%"PRIx64" ret=3D%"PRId64" tce=3D0x%"PRIx64 -spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t= iobaN, uint64_t tceN, uint64_t ret) "liobn=3D%"PRIx64" ioba=3D0x%"PRIx64" = tcelist=3D0x%"PRIx64" iobaN=3D0x%"PRIx64" tceN=3D0x%"PRIx64" ret=3D%"PRId64 +spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, int ioba= N, uint64_t tceN, uint64_t ret) "liobn=3D%"PRIx64" ioba=3D0x%"PRIx64" tceli= st=3D0x%"PRIx64" iobaN=3D0x%x tceN=3D0x%"PRIx64" ret=3D%"PRId64 spapr_iommu_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint6= 4_t npages, uint64_t ret) "liobn=3D%"PRIx64" ioba=3D0x%"PRIx64" tcevalue=3D= 0x%"PRIx64" npages=3D%"PRId64" ret=3D%"PRId64 spapr_iommu_pci_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t = ret) "liobn=3D%"PRIx64" ioba=3D0x%"PRIx64" tce=3D0x%"PRIx64" ret=3D%"PRId64 spapr_iommu_pci_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t = tce) "liobn=3D%"PRIx64" ioba=3D0x%"PRIx64" ret=3D%"PRId64" tce=3D0x%"PRIx64 -spapr_iommu_pci_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint= 64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=3D%"PRIx64" ioba=3D0x%"PRIx= 64" tcelist=3D0x%"PRIx64" iobaN=3D0x%"PRIx64" tceN=3D0x%"PRIx64" ret=3D%"PR= Id64 +spapr_iommu_pci_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, int = iobaN, uint64_t tceN, uint64_t ret) "liobn=3D%"PRIx64" ioba=3D0x%"PRIx64" t= celist=3D0x%"PRIx64" iobaN=3D0x%x tceN=3D0x%"PRIx64" ret=3D%"PRId64 spapr_iommu_pci_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, u= int64_t npages, uint64_t ret) "liobn=3D%"PRIx64" ioba=3D0x%"PRIx64" tcevalu= e=3D0x%"PRIx64" npages=3D%"PRId64" ret=3D%"PRId64 -spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned pe= rm, unsigned pgsize) "liobn=3D%"PRIx64" 0x%"PRIx64" -> 0x%"PRIx64" perm=3D%= u mask=3D%x" -spapr_iommu_new_table(uint64_t liobn, void *table, int fd) "liobn=3D%"PRIx= 64" table=3D%p fd=3D%d" -spapr_iommu_pre_save(uint64_t liobn, uint32_t nb, uint64_t offs, uint32_t = ps) "liobn=3D%"PRIx64" %"PRIx32" bus_offset=3D%"PRIx64" ps=3D%"PRIu32 -spapr_iommu_post_load(uint64_t liobn, uint32_t pre_nb, uint32_t post_nb, u= int64_t offs, uint32_t ps) "liobn=3D%"PRIx64" %"PRIx32" =3D> %"PRIx32" bus_= offset=3D%"PRIx64" ps=3D%"PRIu32 +spapr_iommu_xlate(uint32_t liobn, uint64_t ioba, uint64_t tce, unsigned pe= rm, hwaddr pgsize) "liobn=3D%"PRIx32" 0x%"PRIx64" -> 0x%"PRIx64" perm=3D%u = mask=3D%" HWADDR_PRIx +spapr_iommu_new_table(uint32_t liobn, void *table, int fd) "liobn=3D%"PRIx= 32" table=3D%p fd=3D%d" +spapr_iommu_pre_save(uint32_t liobn, uint32_t nb, uint64_t offs, uint32_t = ps) "liobn=3D%"PRIx32" %"PRIx32" bus_offset=3D%"PRIx64" ps=3D%"PRIu32 +spapr_iommu_post_load(uint32_t liobn, uint32_t pre_nb, uint32_t post_nb, u= int64_t offs, uint32_t ps) "liobn=3D%"PRIx32" %"PRIx32" =3D> %"PRIx32" bus_= offset=3D%"PRIx64" ps=3D%"PRIu32 spapr_iommu_ddw_query(uint64_t buid, uint32_t cfgaddr, unsigned wa, uint64= _t win_size, uint32_t pgmask) "buid=3D%"PRIx64" addr=3D%"PRIx32", %u window= s available, max window size=3D%"PRIx64", mask=3D%"PRIx32 -spapr_iommu_ddw_create(uint64_t buid, uint32_t cfgaddr, uint64_t pg_size, = uint64_t req_size, uint64_t start, uint32_t liobn) "buid=3D%"PRIx64" addr= =3D%"PRIx32", page size=3D0x%"PRIx64", requested=3D0x%"PRIx64", start addr= =3D%"PRIx64", liobn=3D%"PRIx32 +spapr_iommu_ddw_create(uint64_t buid, uint32_t cfgaddr, unsigned long long= pg_size, unsigned long long req_size, uint64_t start, uint32_t liobn) "bui= d=3D%"PRIx64" addr=3D%"PRIx32", page size=3D0x%llx, requested=3D0x%llx, sta= rt addr=3D%"PRIx64", liobn=3D%"PRIx32 spapr_iommu_ddw_remove(uint32_t liobn) "liobn=3D%"PRIx32 spapr_iommu_ddw_reset(uint64_t buid, uint32_t cfgaddr) "buid=3D%"PRIx64" a= ddr=3D%"PRIx32 @@ -92,7 +92,7 @@ rs6000mc_parity_read(uint32_t addr, uint32_t val) "read a= ddr=3D%x val=3D%x" # hw/ppc/mac_newworld.c mac99_uninorth_write(uint64_t addr, uint64_t value) "addr=3D0x%" PRIx64 " = val=3D0x%"PRIx64 -mac99_uninorth_read(uint64_t addr, uint64_t value) "addr=3D0x%" PRIx64 " v= al=3D0x%"PRIx64 +mac99_uninorth_read(uint64_t addr, uint32_t value) "addr=3D0x%" PRIx64 " v= al=3D0x%"PRIx32 # hw/ppc/ppc4xx_pci.c ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn %x irq %d = -> %d" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489436142148710.3993478117773; Mon, 13 Mar 2017 13:15:42 -0700 (PDT) Received: from localhost ([::1]:54207 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWNZ-00086Y-1H for importer@patchew.org; Mon, 13 Mar 2017 16:15:41 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43128) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4n-0000rP-UT for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4n-0002cT-8Z for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:18 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43378) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4n-0002cD-2X for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:17 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2264FC05493A for ; Mon, 13 Mar 2017 19:56:17 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7CF622D655; Mon, 13 Mar 2017 19:56:16 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:41 -0500 Message-Id: <20170313195547.21466-25-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Mon, 13 Mar 2017 19:56:17 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 24/30] trace: Fix parameter types in hw/sd X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake --- hw/sd/trace-events | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/sd/trace-events b/hw/sd/trace-events index b17e7ba..b835ae4 100644 --- a/hw/sd/trace-events +++ b/hw/sd/trace-events @@ -1,5 +1,5 @@ # See docs/tracing.txt for syntax documentation. # hw/sd/milkymist-memcard.c -milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x va= lue %08x" -milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x v= alue %08x" +milkymist_memcard_memory_read(hwaddr addr, uint32_t value) "addr %08" HWAD= DR_PRIx " value %08x" +milkymist_memcard_memory_write(hwaddr addr, uint64_t value) "addr %08" HWA= DDR_PRIx " value %08" PRIx64 --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435902751415.03969696259355; Mon, 13 Mar 2017 13:11:42 -0700 (PDT) Received: from localhost ([::1]:54177 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWJh-0004jO-EU for importer@patchew.org; Mon, 13 Mar 2017 16:11:41 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43247) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4v-00012B-O3 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4t-0002fx-Hg for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:25 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47328) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4o-0002ce-3Z; Mon, 13 Mar 2017 15:56:18 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2F72E63B1E; Mon, 13 Mar 2017 19:56:18 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 38CA22D5C1; Mon, 13 Mar 2017 19:56:17 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:42 -0500 Message-Id: <20170313195547.21466-26-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Mon, 13 Mar 2017 19:56:18 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 25/30] trace: Fix parameter types in hw/scsi X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "open list:megasas" , Hannes Reinecke , stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Also update some callers to avoid variable-sized dma_addr_t (which cannot be easily used in trace headers) and needless casts for values used in tracing. Signed-off-by: Eric Blake Reviewed-by: Hannes Reinecke --- hw/scsi/esp-pci.c | 2 +- hw/scsi/megasas.c | 8 ++-- hw/scsi/trace-events | 114 +++++++++++++++++++++++++----------------------= ---- 3 files changed, 63 insertions(+), 61 deletions(-) diff --git a/hw/scsi/esp-pci.c b/hw/scsi/esp-pci.c index e295d88..b0f4231 100644 --- a/hw/scsi/esp-pci.c +++ b/hw/scsi/esp-pci.c @@ -206,7 +206,7 @@ static void esp_pci_io_write(void *opaque, hwaddr addr, trace_esp_pci_sbac_write(pci->sbac, val); pci->sbac =3D val; } else { - trace_esp_pci_error_invalid_write((int)addr); + trace_esp_pci_error_invalid_write(addr); } } diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index 84b8caf..c060a79 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -271,7 +271,8 @@ static int megasas_map_sgl(MegasasState *s, MegasasCmd = *cmd, union mfi_sgl *sgl) } pci_dma_sglist_init(&cmd->qsg, PCI_DEVICE(s), iov_count); for (i =3D 0; i < iov_count; i++) { - dma_addr_t iov_pa, iov_size_p; + dma_addr_t iov_pa; + uint32_t iov_size_p; if (!sgl) { trace_megasas_iovec_sgl_underflow(cmd->index, i); @@ -658,7 +659,7 @@ static int megasas_init_firmware(MegasasState *s, Megas= asCmd *cmd) if (flags & MFI_QUEUE_FLAG_CONTEXT64) { s->flags |=3D MEGASAS_MASK_USE_QUEUE64; } - trace_megasas_init_queue((unsigned long)s->reply_queue_pa, + trace_megasas_init_queue(s->reply_queue_pa, s->reply_queue_len, s->reply_queue_head, s->reply_queue_tail, flags); megasas_reset_frames(s); @@ -945,7 +946,8 @@ static int megasas_dcmd_pd_get_list(MegasasState *s, Me= gasasCmd *cmd) struct mfi_pd_list info; size_t dcmd_size =3D sizeof(info); BusChild *kid; - uint32_t offset, dcmd_limit, num_pd_disks =3D 0, max_pd_disks; + size_t dcmd_limit; + uint32_t offset, num_pd_disks =3D 0, max_pd_disks; memset(&info, 0, dcmd_size); offset =3D 8; diff --git a/hw/scsi/trace-events b/hw/scsi/trace-events index 4a2e5d6..11842a1 100644 --- a/hw/scsi/trace-events +++ b/hw/scsi/trace-events @@ -8,7 +8,7 @@ scsi_req_data_canceled(int target, int lun, int tag, int le= n) "target %d lun %d scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d" scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d" scsi_req_continue_canceled(int target, int lun, int tag) "target %d lun %d= tag %d" -scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer)= "target %d lun %d tag %d command %d dir %d length %d" +scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, size_t xf= er) "target %d lun %d tag %d command %d dir %d length %zd" scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "= target %d lun %d tag %d command %d lba %"PRIu64 scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %= d tag %d command %d" scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int a= scq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x" @@ -19,20 +19,20 @@ scsi_test_unit_ready(int target, int lun, int tag) "tar= get %d lun %d tag %d" scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d" # hw/scsi/mptsas.c -mptsas_command_complete(void *dev, uint32_t ctx, uint32_t status, uint32_t= resid) "dev %p context 0x%08x status %x resid %d" -mptsas_diag_read(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%0= 8x value 0x%08x" -mptsas_diag_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%= 08x value 0x%08x" +mptsas_command_complete(void *dev, uint32_t ctx, uint32_t status, size_t r= esid) "dev %p context 0x%08x status %x resid %zd" +mptsas_diag_read(void *dev, hwaddr addr, uint32_t val) "dev %p addr 0x%08"= HWADDR_PRIx " value 0x%08x" +mptsas_diag_write(void *dev, hwaddr addr, uint64_t val) "dev %p addr 0x%08= " HWADDR_PRIx " value 0x%08" PRIx64 mptsas_irq_intx(void *dev, int level) "dev %p level %d" mptsas_irq_msi(void *dev) "dev %p " -mptsas_mmio_read(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%0= 8x value 0x%x" -mptsas_mmio_unhandled_read(void *dev, uint32_t addr) "dev %p addr 0x%08x" -mptsas_mmio_unhandled_write(void *dev, uint32_t addr, uint32_t val) "dev %= p addr 0x%08x value 0x%x" -mptsas_mmio_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%= 08x value 0x%x" +mptsas_mmio_read(void *dev, hwaddr addr, uint32_t val) "dev %p addr 0x%08"= HWADDR_PRIx " value 0x%x" +mptsas_mmio_unhandled_read(void *dev, hwaddr addr) "dev %p addr 0x%08" HWA= DDR_PRIx +mptsas_mmio_unhandled_write(void *dev, hwaddr addr, uint64_t val) "dev %p = addr 0x%08" HWADDR_PRIx " value 0x%" PRIx64 +mptsas_mmio_write(void *dev, hwaddr addr, uint64_t val) "dev %p addr 0x%08= " HWADDR_PRIx " value 0x%" PRIx64 mptsas_process_message(void *dev, int msg, uint32_t ctx) "dev %p cmd %d co= ntext 0x%08x\n" -mptsas_process_scsi_io_request(void *dev, int bus, int target, int lun, ui= nt64_t len) "dev %p dev %d:%d:%d length %"PRIu64"" +mptsas_process_scsi_io_request(void *dev, int bus, int target, int lun, ui= nt32_t len) "dev %p dev %d:%d:%d length %"PRIu32"" mptsas_reset(void *dev) "dev %p " -mptsas_scsi_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found= ) "dev %p context 0x%08x: %"PRIu64"/%"PRIu64"" -mptsas_sgl_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found)= "dev %p context 0x%08x: %"PRIu64"/%"PRIu64"" +mptsas_scsi_overflow(void *dev, uint32_t ctx, uint64_t req, uint32_t found= ) "dev %p context 0x%08x: %"PRIu64"/%"PRIu32"" +mptsas_sgl_overflow(void *dev, uint32_t ctx, uint32_t req, uint64_t found)= "dev %p context 0x%08x: %"PRIu32"/%"PRIu64"" mptsas_unhandled_cmd(void *dev, uint32_t ctx, uint8_t msg_cmd) "dev %p con= text 0x%08x: Unhandled cmd %x" mptsas_unhandled_doorbell_cmd(void *dev, int cmd) "dev %p value 0x%08x" @@ -42,56 +42,56 @@ mptsas_config_sas_phy(void *dev, int address, int port,= int phy_handle, int dev_ # hw/scsi/megasas.c megasas_init_firmware(uint64_t pa) "pa %" PRIx64 " " -megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64= _t tail, uint32_t flags) "queue at %" PRIx64 " len %d head %" PRIx64 " tail= %" PRIx64 " flags %x" +megasas_init_queue(uint64_t queue_pa, int queue_len, int head, int tail, u= int32_t flags) "queue at %" PRIx64 " len %d head %d tail %d flags %x" megasas_initq_map_failed(int frame) "scmd %d: failed to map queue" megasas_initq_mapped(uint64_t pa) "queue already mapped at %" PRIx64 megasas_initq_mismatch(int queue_len, int fw_cmds) "queue size %d max fw c= mds %d" -megasas_qf_mapped(unsigned int index) "skip mapped frame %x" -megasas_qf_new(unsigned int index, uint64_t frame) "frame %x addr %" PRIx64 -megasas_qf_busy(unsigned long pa) "all frames busy for frame %lx" -megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t contex= t, unsigned int head, unsigned int tail, int busy) "frame %x count %d conte= xt %" PRIx64 " head %x tail %x busy %d" +megasas_qf_mapped(unsigned long index) "skip mapped frame %lx" +megasas_qf_new(unsigned long index, uint64_t frame) "frame %lx addr %" PRI= x64 +megasas_qf_busy(hwaddr pa) "all frames busy for frame %" HWADDR_PRIx +megasas_qf_enqueue(uint32_t index, unsigned int count, uint64_t context, u= nsigned int head, unsigned int tail, int busy) "frame %" PRIx32 " count %d = context %" PRIx64 " head %x tail %x busy %d" megasas_qf_update(unsigned int head, unsigned int tail, unsigned int busy)= "head %x tail %x busy %d" megasas_qf_map_failed(int cmd, unsigned long frame) "scmd %d: frame %lu" megasas_qf_complete_noirq(uint64_t context) "context %" PRIx64 " " megasas_qf_complete(uint64_t context, unsigned int head, unsigned int tail= , int busy) "context %" PRIx64 " head %x tail %x busy %d" megasas_frame_busy(uint64_t addr) "frame %" PRIx64 " busy" megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) "scmd %d: MFI cmd = %x" -megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sd= ev, unsigned long size) "%s dev %x/%x/%x sdev %p xfer %lu" +megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sd= ev, size_t size) "%s dev %x/%x/%x sdev %p xfer %zu" megasas_scsi_target_not_present(const char *frame, int bus, int dev, int l= un) "%s dev %x/%x/%x" megasas_scsi_invalid_cdb_len(const char *frame, int bus, int dev, int lun,= int len) "%s dev %x/%x/%x invalid cdb len %d" -megasas_iov_read_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d byt= es" -megasas_iov_write_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d by= tes" -megasas_iov_read_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d by= tes" -megasas_iov_write_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d b= ytes" +megasas_iov_read_overflow(int cmd, int bytes, size_t len) "scmd %d: %d/%zd= bytes" +megasas_iov_write_overflow(int cmd, int bytes, size_t len) "scmd %d: %d/%z= d bytes" +megasas_iov_read_underflow(int cmd, int bytes, size_t len) "scmd %d: %d/%z= d bytes" +megasas_iov_write_underflow(int cmd, int bytes, size_t len) "scmd %d: %d/%= zd bytes" megasas_scsi_req_alloc_failed(const char *frame, int dev, int lun) "%s dev= %x/%x" -megasas_scsi_read_start(int cmd, int len) "scmd %d: transfer %d bytes of d= ata" -megasas_scsi_write_start(int cmd, int len) "scmd %d: transfer %d bytes of = data" +megasas_scsi_read_start(int cmd, size_t len) "scmd %d: transfer %zd bytes = of data" +megasas_scsi_write_start(int cmd, size_t len) "scmd %d: transfer %zd bytes= of data" megasas_scsi_nodata(int cmd) "scmd %d: no data to be transferred" -megasas_scsi_complete(int cmd, uint32_t status, int len, int xfer) "scmd %= d: status %x, len %u/%u" -megasas_command_complete(int cmd, uint32_t status, uint32_t resid) "scmd %= d: status %x, residual %d" +megasas_scsi_complete(int cmd, uint32_t status, size_t len, size_t xfer) "= scmd %d: status %x, len %zu/%zu" +megasas_command_complete(int cmd, uint32_t status, size_t resid) "scmd %d:= status %x, residual %zd" megasas_handle_io(int cmd, const char *frame, int dev, int lun, unsigned l= ong lba, unsigned long count) "scmd %d: %s dev %x/%x lba %lx count %lu" megasas_io_target_not_present(int cmd, const char *frame, int dev, int lun= ) "scmd %d: %s dev 1/%x/%x LUN not present" -megasas_io_read_start(int cmd, unsigned long lba, unsigned long count, uns= igned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)" -megasas_io_write_start(int cmd, unsigned long lba, unsigned long count, un= signed long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)" +megasas_io_read_start(int cmd, uint64_t lba, uint32_t count, int len) "scm= d %d: start LBA %" PRIx64 " %" PRIu32 " blocks (%u bytes)" +megasas_io_write_start(int cmd, uint64_t lba, uint32_t count, int len) "sc= md %d: start LBA %" PRIx64 " %" PRIu32 " blocks (%u bytes)" megasas_io_complete(int cmd, uint32_t len) "scmd %d: %d bytes" megasas_iovec_sgl_overflow(int cmd, int index, int limit) "scmd %d: iovec = count %d limit %d" megasas_iovec_sgl_underflow(int cmd, int index) "scmd %d: iovec count %d" megasas_iovec_sgl_invalid(int cmd, int index, uint64_t pa, uint32_t len) "= scmd %d: element %d pa %" PRIx64 " len %u" -megasas_iovec_overflow(int cmd, int len, int limit) "scmd %d: len %d limit= %d" -megasas_iovec_underflow(int cmd, int len, int limit) "scmd %d: len %d limi= t %d" +megasas_iovec_overflow(int cmd, size_t len, size_t limit) "scmd %d: len %z= d limit %zd" +megasas_iovec_underflow(int cmd, size_t len, size_t limit) "scmd %d: len %= zd limit %zd" megasas_handle_dcmd(int cmd, int opcode) "scmd %d: MFI DCMD opcode %x" megasas_finish_dcmd(int cmd, int size) "scmd %d: MFI DCMD wrote %d bytes" megasas_dcmd_req_alloc_failed(int cmd, const char *desc) "scmd %d: %s" megasas_dcmd_internal_submit(int cmd, const char *desc, int dev) "scmd %d:= %s to dev %d" megasas_dcmd_internal_finish(int cmd, int opcode, int lun) "scmd %d: cmd %= x lun %d" megasas_dcmd_internal_invalid(int cmd, int opcode) "scmd %d: DCMD %x" -megasas_dcmd_unhandled(int cmd, int opcode, int len) "scmd %d: opcode %x, = len %d" +megasas_dcmd_unhandled(int cmd, int opcode, size_t len) "scmd %d: opcode %= x, len %zd" megasas_dcmd_zero_sge(int cmd) "scmd %d: zero DCMD sge count" megasas_dcmd_invalid_sge(int cmd, int count) "scmd %d: DCMD sge count %d" -megasas_dcmd_invalid_xfer_len(int cmd, unsigned long size, unsigned long m= ax) "scmd %d: xfer len %ld, max %ld" -megasas_dcmd_enter(int cmd, const char *dcmd, int len) "scmd %d: DCMD %s l= en %d" -megasas_dcmd_dummy(int cmd, unsigned long size) "scmd %d: xfer len %ld" -megasas_dcmd_set_fw_time(int cmd, unsigned long time) "scmd %d: Set FW tim= e %lx" +megasas_dcmd_invalid_xfer_len(int cmd, size_t size, size_t max) "scmd %d: = xfer len %zd, max %zd" +megasas_dcmd_enter(int cmd, const char *dcmd, size_t len) "scmd %d: DCMD %= s len %zd" +megasas_dcmd_dummy(int cmd, size_t size) "scmd %d: xfer len %zd" +megasas_dcmd_set_fw_time(int cmd, uint64_t time) "scmd %d: Set FW time %" = PRIx64 megasas_dcmd_pd_get_list(int cmd, int num, int max, int offset) "scmd %d: = DCMD PD get list: %d / %d PDs, size %d" megasas_dcmd_ld_get_list(int cmd, int num, int max) "scmd %d: DCMD LD get = list: found %d / %d LDs" megasas_dcmd_ld_get_info(int cmd, int ld_id) "scmd %d: dev %d" @@ -99,7 +99,7 @@ megasas_dcmd_ld_list_query(int cmd, int flags) "scmd %d: = query flags %x" megasas_dcmd_pd_get_info(int cmd, int pd_id) "scmd %d: dev %d" megasas_dcmd_pd_list_query(int cmd, int flags) "scmd %d: query flags %x" megasas_dcmd_reset_ld(int cmd, int target_id) "scmd %d: dev %d" -megasas_dcmd_unsupported(int cmd, unsigned long size) "scmd %d: set proper= ties len %ld" +megasas_dcmd_unsupported(int cmd, size_t size) "scmd %d: set properties le= n %zd" megasas_abort_frame(int cmd, int abort_cmd) "scmd %d: frame %x" megasas_abort_no_cmd(int cmd, uint64_t context) "scmd %d: no active comman= d for frame context %" PRIx64 megasas_abort_invalid_context(int cmd, uint64_t context, int abort_cmd) "s= cmd %d: invalid frame context %" PRIx64 " for abort frame %x" @@ -114,9 +114,9 @@ megasas_intr_disabled(void) "Interrupts disabled" megasas_msix_enabled(int vector) "vector %d" megasas_msi_enabled(int vector) "vector %d" megasas_mmio_readl(const char *reg, uint32_t val) "reg %s: 0x%x" -megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx" -megasas_mmio_writel(const char *reg, uint32_t val) "reg %s: 0x%x" -megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x" +megasas_mmio_invalid_readl(hwaddr addr) "addr 0x%" HWADDR_PRIx +megasas_mmio_writel(const char *reg, uint64_t val) "reg %s: 0x%" PRIx64 +megasas_mmio_invalid_writel(hwaddr addr, uint64_t val) "addr 0x%" HWADDR_P= RIx ": 0x%" PRIx64 # hw/scsi/vmw_pvscsi.c pvscsi_ring_init_data(uint32_t txr_len_log2, uint32_t rxr_len_log2) "TX/RX= rings logarithms set to %d/%d" @@ -155,8 +155,8 @@ pvscsi_tx_rings_num_pages(const char* label, uint32_t n= um) "Number of %s pages: # hw/scsi/esp.c esp_error_fifo_overrun(void) "FIFO overrun" -esp_error_unhandled_command(uint32_t val) "unhandled command (%2.2x)" -esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%= 02x at [0x%x]" +esp_error_unhandled_command(uint64_t val) "unhandled command (%2.2" PRIx64= ")" +esp_error_invalid_write(uint64_t val, uint32_t addr) "invalid write of 0x%= 02" PRIx64 " at [0x%x]" esp_raise_irq(void) "Raise IRQ" esp_lower_irq(void) "Lower IRQ" esp_dma_enable(void) "Raise enable" @@ -173,26 +173,26 @@ esp_transfer_data(uint32_t dma_left, int32_t ti_size)= "transfer %d/%d" esp_handle_ti(uint32_t minlen) "Transfer Information len %d" esp_handle_ti_cmd(uint32_t cmdlen) "command len %d" esp_mem_readb(uint32_t saddr, uint8_t reg) "reg[%d]: 0x%2.2x" -esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2= x -> 0x%2.2x" -esp_mem_writeb_cmd_nop(uint32_t val) "NOP (%2.2x)" -esp_mem_writeb_cmd_flush(uint32_t val) "Flush FIFO (%2.2x)" -esp_mem_writeb_cmd_reset(uint32_t val) "Chip reset (%2.2x)" -esp_mem_writeb_cmd_bus_reset(uint32_t val) "Bus reset (%2.2x)" -esp_mem_writeb_cmd_iccs(uint32_t val) "Initiator Command Complete Sequence= (%2.2x)" -esp_mem_writeb_cmd_msgacc(uint32_t val) "Message Accepted (%2.2x)" -esp_mem_writeb_cmd_pad(uint32_t val) "Transfer padding (%2.2x)" -esp_mem_writeb_cmd_satn(uint32_t val) "Set ATN (%2.2x)" -esp_mem_writeb_cmd_rstatn(uint32_t val) "Reset ATN (%2.2x)" -esp_mem_writeb_cmd_sel(uint32_t val) "Select without ATN (%2.2x)" -esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)" -esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)" -esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)" -esp_mem_writeb_cmd_dissel(uint32_t val) "Disable selection (%2.2x)" +esp_mem_writeb(uint32_t saddr, uint8_t reg, uint64_t val) "reg[%d]: 0x%2.2= x -> 0x%2.2" PRIx64 +esp_mem_writeb_cmd_nop(uint64_t val) "NOP (%2.2" PRIx64 ")" +esp_mem_writeb_cmd_flush(uint64_t val) "Flush FIFO (%2.2" PRIx64 ")" +esp_mem_writeb_cmd_reset(uint64_t val) "Chip reset (%2.2" PRIx64 ")" +esp_mem_writeb_cmd_bus_reset(uint64_t val) "Bus reset (%2.2" PRIx64 ")" +esp_mem_writeb_cmd_iccs(uint64_t val) "Initiator Command Complete Sequence= (%2.2" PRIx64 ")" +esp_mem_writeb_cmd_msgacc(uint64_t val) "Message Accepted (%2.2" PRIx64 ")" +esp_mem_writeb_cmd_pad(uint64_t val) "Transfer padding (%2.2" PRIx64 ")" +esp_mem_writeb_cmd_satn(uint64_t val) "Set ATN (%2.2" PRIx64 ")" +esp_mem_writeb_cmd_rstatn(uint64_t val) "Reset ATN (%2.2" PRIx64 ")" +esp_mem_writeb_cmd_sel(uint64_t val) "Select without ATN (%2.2" PRIx64 ")" +esp_mem_writeb_cmd_selatn(uint64_t val) "Select with ATN (%2.2" PRIx64 ")" +esp_mem_writeb_cmd_selatns(uint64_t val) "Select with ATN & stop (%2.2" PR= Ix64 ")" +esp_mem_writeb_cmd_ensel(uint64_t val) "Enable selection (%2.2" PRIx64 ")" +esp_mem_writeb_cmd_dissel(uint64_t val) "Disable selection (%2.2" PRIx64 "= )" # hw/scsi/esp-pci.c esp_pci_error_invalid_dma_direction(void) "invalid DMA transfer direction" esp_pci_error_invalid_read(uint32_t reg) "read access outside bounds (reg = 0x%x)" -esp_pci_error_invalid_write(uint32_t reg) "write access outside bounds (re= g 0x%x)" +esp_pci_error_invalid_write(hwaddr reg) "write access outside bounds (reg = 0x%" HWADDR_PRIx ")" esp_pci_error_invalid_write_dma(uint32_t val, uint32_t addr) "invalid writ= e of 0x%02x at [0x%x]" esp_pci_dma_read(uint32_t saddr, uint32_t reg) "reg[%d]: 0x%8.8x" esp_pci_dma_write(uint32_t saddr, uint32_t reg, uint32_t val) "reg[%d]: 0x= %8.8x -> 0x%8.8x" @@ -201,7 +201,7 @@ esp_pci_dma_blast(uint32_t val) "BLAST (%.8x)" esp_pci_dma_abort(uint32_t val) "ABORT (%.8x)" esp_pci_dma_start(uint32_t val) "START (%.8x)" esp_pci_sbac_read(uint32_t reg) "sbac: 0x%8.8x" -esp_pci_sbac_write(uint32_t reg, uint32_t val) "sbac: 0x%8.8x -> 0x%8.8x" +esp_pci_sbac_write(uint32_t reg, uint64_t val) "sbac: 0x%8.8x -> 0x%8.8" P= RIx64 # hw/scsi/spapr_vscsi.c spapr_vscsi_send_rsp(uint8_t status, int32_t res_in, int32_t res_out) "sta= tus: 0x%x, res_in: %"PRId32", res_out: %"PRId32 --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489436223584180.44483439443582; Mon, 13 Mar 2017 13:17:03 -0700 (PDT) Received: from localhost ([::1]:54218 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWOs-0000hC-DD for importer@patchew.org; Mon, 13 Mar 2017 16:17:02 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43184) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4s-0000y0-ON for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4q-0002e1-O2 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:22 -0400 Received: from mx1.redhat.com ([209.132.183.28]:45510) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4q-0002dm-FV for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:20 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 63D9F2976D; Mon, 13 Mar 2017 19:56:20 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 650DF2D5C1; Mon, 13 Mar 2017 19:56:18 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:43 -0500 Message-Id: <20170313195547.21466-27-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Mon, 13 Mar 2017 19:56:20 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 26/30] trace: Fix parameter types in hw/timer X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fabien Chouteau , stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite, as well as updating callers to use a consistent type. Signed-off-by: Eric Blake --- hw/timer/grlib_gptimer.c | 6 +++--- hw/timer/trace-events | 14 +++++++------- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c index 4ed96e9..96a5864 100644 --- a/hw/timer/grlib_gptimer.c +++ b/hw/timer/grlib_gptimer.c @@ -235,19 +235,19 @@ static void grlib_gptimer_write(void *opaque, hwaddr = addr, case SCALER_OFFSET: value &=3D 0xFFFF; /* clean up the value */ unit->scaler =3D value; - trace_grlib_gptimer_writel(-1, addr, unit->scaler); + trace_grlib_gptimer_writel(-1, addr, (uint64_t) unit->scaler); return; case SCALER_RELOAD_OFFSET: value &=3D 0xFFFF; /* clean up the value */ unit->reload =3D value; - trace_grlib_gptimer_writel(-1, addr, unit->reload); + trace_grlib_gptimer_writel(-1, addr, (uint64_t) unit->reload); grlib_gptimer_set_scaler(unit, value); return; case CONFIG_OFFSET: /* Read Only (disable timer freeze not supported) */ - trace_grlib_gptimer_writel(-1, addr, 0); + trace_grlib_gptimer_writel(-1, addr, (uint64_t) 0); return; default: diff --git a/hw/timer/trace-events b/hw/timer/trace-events index d17cfe6..dc4c89c 100644 --- a/hw/timer/trace-events +++ b/hw/timer/trace-events @@ -5,7 +5,7 @@ slavio_timer_get_out(uint64_t limit, uint32_t counthigh, ui= nt32_t count) "limit slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%0= 8x" slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx= 64 slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" =3D %0= 8x" -slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" =3D = %08x" +slavio_timer_mem_writel(uint64_t addr, uint64_t val) "write %"PRIx64" =3D = %08" PRIx64 slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "p= rocessor %d user timer set to %016"PRIx64 slavio_timer_mem_writel_counter_invalid(void) "not user timer" slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor = %d user timer started" @@ -22,17 +22,17 @@ grlib_gptimer_restart(int id, uint32_t reload) "timer:%= d reload val: 0x%x" grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq= : 0x%x" grlib_gptimer_hit(int id) "timer:%d HIT" grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x= %"PRIx64" 0x%x" -grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0= x%"PRIx64" 0x%x" +grlib_gptimer_writel(int id, uint64_t addr, uint64_t val) "timer:%d addr 0= x%"PRIx64" 0x%" PRIx64 # hw/timer/lm32_timer.c -lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value = 0x%08x" -lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0= x%08x" +lm32_timer_memory_write(hwaddr addr, uint64_t value) "addr 0x%08" HWADDR_P= RIx " value 0x%08" PRIx64 +lm32_timer_memory_read(hwaddr addr, uint32_t value) "addr 0x%08" HWADDR_PR= Ix " value 0x%08x" lm32_timer_hit(void) "timer hit" lm32_timer_irq_state(int level) "irq state %d" # hw/timer/milkymist-sysctl.c -milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x val= ue %08x" -milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x va= lue %08x" +milkymist_sysctl_memory_read(hwaddr addr, uint32_t value) "addr %08" HWADD= R_PRIx " value %08x" +milkymist_sysctl_memory_write(hwaddr addr, uint64_t value) "addr %08" HWAD= DR_PRIx " value %08" PRIx64 milkymist_sysctl_icap_write(uint32_t value) "value %08x" milkymist_sysctl_start_timer0(void) "Start timer0" milkymist_sysctl_stop_timer0(void) "Stop timer0" @@ -54,4 +54,4 @@ aspeed_timer_read(uint64_t offset, unsigned size, uint64_= t value) "From 0x%" PRI systick_reload(void) "systick reload" systick_timer_tick(void) "systick reload" systick_read(uint64_t addr, uint32_t value, unsigned size) "systick read a= ddr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" -systick_write(uint64_t addr, uint32_t value, unsigned size) "systick write= addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" +systick_write(uint64_t addr, uint64_t value, unsigned size) "systick write= addr 0x%" PRIx64 " data 0x%" PRIx64 " size %u" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435792262607.491127540868; Mon, 13 Mar 2017 13:09:52 -0700 (PDT) Received: from localhost ([::1]:54163 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWHv-00035o-00 for importer@patchew.org; Mon, 13 Mar 2017 16:09:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43199) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4t-0000yy-Az for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4r-0002eJ-9m for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:23 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47404) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4r-0002dx-18 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:21 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 230FD65383 for ; Mon, 13 Mar 2017 19:56:21 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7928E2D655; Mon, 13 Mar 2017 19:56:20 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:44 -0500 Message-Id: <20170313195547.21466-28-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Mon, 13 Mar 2017 19:56:21 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 27/30] trace: Fix parameter types in hw/usb X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann , stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite, as well as updating a couple of callers to use consistent typing to common trace calls. Signed-off-by: Eric Blake Reviewed-by: Gerd Hoffmann --- hw/usb/hcd-ehci.c | 9 +++--- hw/usb/hcd-xhci.c | 4 +-- hw/usb/trace-events | 84 ++++++++++++++++++++++++++-----------------------= ---- 3 files changed, 49 insertions(+), 48 deletions(-) diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index 50ef817..43ba980 100644 --- a/hw/usb/hcd-ehci.c +++ b/hw/usb/hcd-ehci.c @@ -924,10 +924,11 @@ static uint64_t ehci_port_read(void *ptr, hwaddr addr, unsigned size) { EHCIState *s =3D ptr; + int port =3D addr >> 2; uint32_t val; - val =3D s->portsc[addr >> 2]; - trace_usb_ehci_portsc_read(addr + s->portscbase, addr >> 2, val); + val =3D s->portsc[port]; + trace_usb_ehci_portsc_read(addr + s->portscbase, port, val); return val; } @@ -968,7 +969,7 @@ static void ehci_port_write(void *ptr, hwaddr addr, uint32_t old =3D *portsc; USBDevice *dev =3D s->ports[port].dev; - trace_usb_ehci_portsc_write(addr + s->portscbase, addr >> 2, val); + trace_usb_ehci_portsc_write(addr + s->portscbase, port, val); /* Clear rwc bits */ *portsc &=3D ~(val & PORTSC_RWC_MASK); @@ -1009,7 +1010,7 @@ static void ehci_port_write(void *ptr, hwaddr addr, *portsc &=3D ~PORTSC_RO_MASK; *portsc |=3D val; - trace_usb_ehci_portsc_change(addr + s->portscbase, addr >> 2, *portsc,= old); + trace_usb_ehci_portsc_change(addr + s->portscbase, port, *portsc, old); } static void ehci_opreg_write(void *ptr, hwaddr addr, diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index f0af852..c74095d 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -2016,7 +2016,7 @@ static int xhci_submit(XHCIState *xhci, XHCITransfer = *xfer, XHCIEPContext *epctx } break; default: - trace_usb_xhci_unimplemented("endpoint type", epctx->type); + trace_usb_xhci_unimplemented("endpoint type", (hwaddr) epctx->type= ); return -1; } @@ -2742,7 +2742,7 @@ static void xhci_process_commands(XHCIState *xhci) } break; default: - trace_usb_xhci_unimplemented("command", type); + trace_usb_xhci_unimplemented("command", (hwaddr) type); event.ccode =3D CC_TRB_ERROR; break; } diff --git a/hw/usb/trace-events b/hw/usb/trace-events index 0c323d4..ea0d1da 100644 --- a/hw/usb/trace-events +++ b/hw/usb/trace-events @@ -55,10 +55,10 @@ usb_ohci_ed_read_error(uint32_t addr) "ED read error at= %x" usb_ohci_ed_pkt(uint32_t cur, int h, int c, uint32_t head, uint32_t tail, = uint32_t next) "ED @ 0x%.8x h=3D%u c=3D%u\n head=3D0x%.8x tailp=3D0x%.8x n= ext=3D0x%.8x" usb_ohci_ed_pkt_flags(uint32_t fa, uint32_t en, uint32_t d, int s, int k, = int f, uint32_t mps) "fa=3D%u en=3D%u d=3D%u s=3D%u k=3D%u f=3D%u mps=3D%u" usb_ohci_hcca_read_error(uint32_t addr) "HCCA read error at %x" -usb_ohci_mem_read_unaligned(uint32_t addr) "at %x" -usb_ohci_mem_read_bad_offset(uint32_t addr) "%x" -usb_ohci_mem_write_unaligned(uint32_t addr) "at %x" -usb_ohci_mem_write_bad_offset(uint32_t addr) "%x" +usb_ohci_mem_read_unaligned(hwaddr addr) "at %" HWADDR_PRIx +usb_ohci_mem_read_bad_offset(hwaddr addr) "%" HWADDR_PRIx +usb_ohci_mem_write_unaligned(hwaddr addr) "at %" HWADDR_PRIx +usb_ohci_mem_write_bad_offset(hwaddr addr) "%" HWADDR_PRIx usb_ohci_process_lists(uint32_t head, uint32_t cur) "head %x, cur %x" usb_ohci_set_frame_interval(const char *name, uint16_t fi_x, uint16_t fi_u= ) "%s: FrameInterval =3D 0x%x (%u)" usb_ohci_hub_power_up(void) "powered up all ports" @@ -70,22 +70,22 @@ usb_ohci_async_complete(void) "" # hw/usb/hcd-ehci.c usb_ehci_reset(void) "=3D=3D=3D RESET =3D=3D=3D" usb_ehci_unrealize(void) "=3D=3D=3D UNREALIZE =3D=3D=3D" -usb_ehci_opreg_read(uint32_t addr, const char *str, uint32_t val) "rd mmio= %04x [%s] =3D %x" -usb_ehci_opreg_write(uint32_t addr, const char *str, uint32_t val) "wr mmi= o %04x [%s] =3D %x" -usb_ehci_opreg_change(uint32_t addr, const char *str, uint32_t new, uint32= _t old) "ch mmio %04x [%s] =3D %x (old: %x)" -usb_ehci_portsc_read(uint32_t addr, uint32_t port, uint32_t val) "rd mmio = %04x [port %d] =3D %x" -usb_ehci_portsc_write(uint32_t addr, uint32_t port, uint32_t val) "wr mmio= %04x [port %d] =3D %x" -usb_ehci_portsc_change(uint32_t addr, uint32_t port, uint32_t new, uint32_= t old) "ch mmio %04x [port %d] =3D %x (old: %x)" +usb_ehci_opreg_read(hwaddr addr, const char *str, uint32_t val) "rd mmio %= 04" HWADDR_PRIx " [%s] =3D %x" +usb_ehci_opreg_write(hwaddr addr, const char *str, uint64_t val) "wr mmio = %04" HWADDR_PRIx " [%s] =3D %" PRIx64 +usb_ehci_opreg_change(hwaddr addr, const char *str, uint32_t new, uint32_t= old) "ch mmio %04" HWADDR_PRIx " [%s] =3D %x (old: %x)" +usb_ehci_portsc_read(hwaddr addr, int port, uint32_t val) "rd mmio %04" HW= ADDR_PRIx " [port %d] =3D %x" +usb_ehci_portsc_write(hwaddr addr, int port, uint64_t val) "wr mmio %04" H= WADDR_PRIx " [port %d] =3D %" PRIx64 +usb_ehci_portsc_change(hwaddr addr, uint32_t port, uint32_t new, uint32_t = old) "ch mmio %04" HWADDR_PRIx " [port %d] =3D %x (old: %x)" usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d" usb_ehci_state(const char *schedule, const char *state) "%s schedule %s" -usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uin= t32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%0= 8x" -usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int = devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d" -usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x -= c %d, h %d, dtc %d, i %d" -usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) = "q %p - QTD @ %08x: next %08x altnext %08x" -usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pi= d) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d" -usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble= , int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr= %d" -usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, u= int32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, e= p %d, dev %d" -usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ %08x: n= ext %08x - active %d" +usb_ehci_qh_ptrs(void *q, hwaddr addr, uint32_t nxt, uint32_t c_qtd, uint3= 2_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08" HWADDR_PRIx ": next %08x qtds = %08x,%08x,%08x" +usb_ehci_qh_fields(hwaddr addr, int rl, int mplen, int eps, int ep, int de= vaddr) "QH @ %08" HWADDR_PRIx " - rl %d, mplen %d, eps %d, ep %d, dev %d" +usb_ehci_qh_bits(hwaddr addr, int c, int h, int dtc, int i) "QH @ %08" HWA= DDR_PRIx " - c %d, h %d, dtc %d, i %d" +usb_ehci_qtd_ptrs(void *q, hwaddr addr, uint32_t nxt, uint32_t altnext) "q= %p - QTD @ %08" HWADDR_PRIx ": next %08x altnext %08x" +usb_ehci_qtd_fields(hwaddr addr, int tbytes, int cpage, int cerr, int pid)= "QTD @ %08" HWADDR_PRIx " - tbytes %d, cpage %d, cerr %d, pid %d" +usb_ehci_qtd_bits(hwaddr addr, int ioc, int active, int halt, int babble, = int xacterr) "QTD @ %08" HWADDR_PRIx " - ioc %d, active %d, halt %d, babble= %d, xacterr %d" +usb_ehci_itd(hwaddr addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uin= t32_t ep, uint32_t devaddr) "ITD @ %08" HWADDR_PRIx ": next %08x - mplen %d= , mult %d, ep %d, dev %d" +usb_ehci_sitd(hwaddr addr, uint32_t nxt, uint32_t active) "ITD @ %08" HWAD= DR_PRIx ": next %08x - active %d" usb_ehci_port_attach(uint32_t port, const char *owner, const char *device)= "attach port #%d, owner %s, device %s" usb_ehci_port_detach(uint32_t port, const char *owner) "detach port #%d, o= wner %s" usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d" @@ -109,8 +109,8 @@ usb_uhci_frame_start(uint32_t num) "nr %d" usb_uhci_frame_stop_bandwidth(void) "" usb_uhci_frame_loop_stop_idle(void) "" usb_uhci_frame_loop_continue(void) "" -usb_uhci_mmio_readw(uint32_t addr, uint32_t val) "addr 0x%04x, ret 0x%04x" -usb_uhci_mmio_writew(uint32_t addr, uint32_t val) "addr 0x%04x, val 0x%04x" +usb_uhci_mmio_readw(hwaddr addr, uint32_t val) "addr 0x%04" HWADDR_PRIx ",= ret 0x%04x" +usb_uhci_mmio_writew(hwaddr addr, uint64_t val) "addr 0x%04" HWADDR_PRIx "= , val 0x%04" PRIx64 usb_uhci_queue_add(uint32_t token) "token 0x%x" usb_uhci_queue_del(uint32_t token, const char *reason) "token 0x%x: %s" usb_uhci_packet_add(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" @@ -135,15 +135,15 @@ usb_xhci_reset(void) "=3D=3D=3D RESET =3D=3D=3D" usb_xhci_exit(void) "=3D=3D=3D EXIT =3D=3D=3D" usb_xhci_run(void) "" usb_xhci_stop(void) "" -usb_xhci_cap_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" -usb_xhci_oper_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" -usb_xhci_port_read(uint32_t port, uint32_t off, uint32_t val) "port %d, of= f 0x%04x, ret 0x%08x" -usb_xhci_runtime_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" -usb_xhci_doorbell_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" -usb_xhci_oper_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x" -usb_xhci_port_write(uint32_t port, uint32_t off, uint32_t val) "port %d, o= ff 0x%04x, val 0x%08x" -usb_xhci_runtime_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x" -usb_xhci_doorbell_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08= x" +usb_xhci_cap_read(hwaddr off, uint32_t val) "off 0x%04" HWADDR_PRIx ", ret= 0x%08x" +usb_xhci_oper_read(hwaddr off, uint32_t val) "off 0x%04" HWADDR_PRIx ", re= t 0x%08x" +usb_xhci_port_read(uint32_t port, hwaddr off, uint32_t val) "port %d, off = 0x%04" HWADDR_PRIx ", ret 0x%08x" +usb_xhci_runtime_read(hwaddr off, uint32_t val) "off 0x%04" HWADDR_PRIx ",= ret 0x%08x" +usb_xhci_doorbell_read(hwaddr off, uint32_t val) "off 0x%04" HWADDR_PRIx "= , ret 0x%08x" +usb_xhci_oper_write(hwaddr off, uint64_t val) "off 0x%04" HWADDR_PRIx ", v= al 0x%08" PRIx64 +usb_xhci_port_write(uint32_t port, hwaddr off, uint64_t val) "port %d, off= 0x%04" HWADDR_PRIx ", val 0x%08" PRIx64 +usb_xhci_runtime_write(hwaddr off, uint64_t val) "off 0x%04" HWADDR_PRIx "= , val 0x%08" PRIx64 +usb_xhci_doorbell_write(hwaddr off, uint64_t val) "off 0x%04" HWADDR_PRIx = ", val 0x%08" PRIx64 usb_xhci_irq_intx(uint32_t level) "level %d" usb_xhci_irq_msi(uint32_t nr) "nr %d" usb_xhci_irq_msix(uint32_t nr) "nr %d" @@ -173,16 +173,16 @@ usb_xhci_xfer_nak(void *xfer) "%p" usb_xhci_xfer_retry(void *xfer) "%p" usb_xhci_xfer_success(void *xfer, uint32_t bytes) "%p: len %d" usb_xhci_xfer_error(void *xfer, uint32_t ret) "%p: ret %d" -usb_xhci_unimplemented(const char *item, int nr) "%s (0x%x)" +usb_xhci_unimplemented(const char *item, hwaddr nr) "%s (0x%" HWADDR_PRIx = ")" usb_xhci_enforced_limit(const char *item) "%s" # hw/usb/desc.c -usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, = ret %d" -usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device= qualifier, len %d, ret %d" -usb_desc_config(int addr, int index, int len, int ret) "dev %d query confi= g %d, len %d, ret %d" -usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d= query config %d, len %d, ret %d" -usb_desc_string(int addr, int index, int len, int ret) "dev %d query strin= g %d, len %d, ret %d" -usb_desc_bos(int addr, int len, int ret) "dev %d bos, len %d, ret %d" +usb_desc_device(int addr, size_t len, int ret) "dev %d query device, len %= zd, ret %d" +usb_desc_device_qualifier(int addr, size_t len, int ret) "dev %d query dev= ice qualifier, len %zd, ret %d" +usb_desc_config(int addr, int index, size_t len, int ret) "dev %d query co= nfig %d, len %zd, ret %d" +usb_desc_other_speed_config(int addr, int index, size_t len, int ret) "dev= %d query config %d, len %zd, ret %d" +usb_desc_string(int addr, int index, size_t len, int ret) "dev %d query st= ring %d, len %zd, ret %d" +usb_desc_bos(int addr, size_t len, int ret) "dev %d bos, len %zd, ret %d" usb_desc_msos(int addr, int index, int len, int ret) "dev %d msos, index 0= x%x, len %d, ret %d" usb_set_addr(int addr) "dev %d" usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d" @@ -202,14 +202,14 @@ usb_hub_status_report(int addr, int status) "dev %d, = status 0x%x" # hw/usb/dev-uas.c usb_uas_reset(int addr) "dev %d" -usb_uas_command(int addr, uint16_t tag, int lun, uint32_t lun64_1, uint32_= t lun64_2) "dev %d, tag 0x%x, lun %d, lun64 %08x-%08x" +usb_uas_command(int addr, uint16_t tag, int lun, uint64_t lun64_1, uint64_= t lun64_2) "dev %d, tag 0x%x, lun %d, lun64 %08" PRIx64 "-%08" PRIx64 usb_uas_response(int addr, uint16_t tag, uint8_t code) "dev %d, tag 0x%x, = code 0x%x" usb_uas_sense(int addr, uint16_t tag, uint8_t status) "dev %d, tag 0x%x, s= tatus 0x%x" usb_uas_read_ready(int addr, uint16_t tag) "dev %d, tag 0x%x" usb_uas_write_ready(int addr, uint16_t tag) "dev %d, tag 0x%x" -usb_uas_xfer_data(int addr, uint16_t tag, uint32_t copy, uint32_t uoff, ui= nt32_t usize, uint32_t soff, uint32_t ssize) "dev %d, tag 0x%x, copy %d, us= b-pkt %d/%d, scsi-buf %d/%d" +usb_uas_xfer_data(int addr, uint16_t tag, uint32_t copy, uint32_t uoff, si= ze_t usize, uint32_t soff, uint32_t ssize) "dev %d, tag 0x%x, copy %d, usb-= pkt %d/%zd, scsi-buf %d/%d" usb_uas_scsi_data(int addr, uint16_t tag, uint32_t bytes) "dev %d, tag 0x%= x, bytes %d" -usb_uas_scsi_complete(int addr, uint16_t tag, uint32_t status, uint32_t re= sid) "dev %d, tag 0x%x, status 0x%x, residue %d" +usb_uas_scsi_complete(int addr, uint16_t tag, uint32_t status, size_t resi= d) "dev %d, tag 0x%x, status 0x%x, residue %zd" usb_uas_tmf_abort_task(int addr, uint16_t tag, uint16_t task_tag) "dev %d,= tag 0x%x, task-tag 0x%x" usb_uas_tmf_logical_unit_reset(int addr, uint16_t tag, int lun) "dev %d, t= ag 0x%x, lun %d" usb_uas_tmf_unsupported(int addr, uint16_t tag, uint32_t function) "dev %d= , tag 0x%x, function 0x%x" @@ -219,8 +219,8 @@ usb_mtp_reset(int addr) "dev %d" usb_mtp_command(int dev, uint16_t code, uint32_t trans, uint32_t arg0, uin= t32_t arg1, uint32_t arg2, uint32_t arg3, uint32_t arg4) "dev %d, code 0x%x= , trans 0x%x, args 0x%x, 0x%x, 0x%x, 0x%x, 0x%x" usb_mtp_success(int dev, uint32_t trans, uint32_t arg0, uint32_t arg1) "de= v %d, trans 0x%x, args 0x%x, 0x%x" usb_mtp_error(int dev, uint16_t code, uint32_t trans, uint32_t arg0, uint3= 2_t arg1) "dev %d, code 0x%x, trans 0x%x, args 0x%x, 0x%x" -usb_mtp_data_in(int dev, uint32_t trans, uint32_t len) "dev %d, trans 0x%x= , len %d" -usb_mtp_xfer(int dev, uint32_t ep, uint32_t dlen, uint32_t plen) "dev %d, = ep %d, %d/%d" +usb_mtp_data_in(int dev, uint32_t trans, uint64_t len) "dev %d, trans 0x%x= , len %" PRId64 +usb_mtp_xfer(int dev, uint32_t ep, uint32_t dlen, size_t plen) "dev %d, ep= %d, %d/%zd" usb_mtp_nak(int dev, uint32_t ep) "dev %d, ep %d" usb_mtp_stall(int dev, const char *reason) "dev %d, reason: %s" usb_mtp_op_get_device_info(int dev) "dev %d" @@ -252,7 +252,7 @@ usb_host_set_interface(int bus, int addr, int interface= , int alt) "dev %d:%d, in usb_host_claim_interface(int bus, int addr, int config, int interface) "de= v %d:%d, config %d, if %d" usb_host_release_interface(int bus, int addr, int interface) "dev %d:%d, i= f %d" usb_host_req_control(int bus, int addr, void *p, int req, int value, int i= ndex) "dev %d:%d, packet %p, req 0x%x, value %d, index %d" -usb_host_req_data(int bus, int addr, void *p, int in, int ep, int size) "d= ev %d:%d, packet %p, in %d, ep %d, size %d" +usb_host_req_data(int bus, int addr, void *p, int in, int ep, size_t size)= "dev %d:%d, packet %p, in %d, ep %d, size %zd" usb_host_req_complete(int bus, int addr, void *p, int status, int length) = "dev %d:%d, packet %p, status %d, length %d" usb_host_req_emulated(int bus, int addr, void *p, int status) "dev %d:%d, = packet %p, status %d" usb_host_req_canceled(int bus, int addr, void *p) "dev %d:%d, packet %p" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435764593489.3308325733367; Mon, 13 Mar 2017 13:09:24 -0700 (PDT) Received: from localhost ([::1]:54161 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWHR-0002hm-AG for importer@patchew.org; Mon, 13 Mar 2017 16:09:21 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43196) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4t-0000ye-5j for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4s-0002eb-5a for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:23 -0400 Received: from mx1.redhat.com ([209.132.183.28]:32962) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4r-0002eN-TO for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:22 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 05B837B025 for ; Mon, 13 Mar 2017 19:56:22 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5AC2B2D655; Mon, 13 Mar 2017 19:56:21 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:45 -0500 Message-Id: <20170313195547.21466-29-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Mon, 13 Mar 2017 19:56:22 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 28/30] trace: Fix parameter types in hw/vfio X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alex Williamson , stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake --- hw/vfio/pci.c | 3 ++- hw/vfio/trace-events | 14 +++++++------- 2 files changed, 9 insertions(+), 8 deletions(-) diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 03a3d01..6b4f588 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -1313,7 +1313,8 @@ static void vfio_pci_fixup_msix_region(VFIOPCIDevice = *vdev) g_free(region->mmaps); region->mmaps =3D NULL; trace_vfio_msix_fixup(vdev->vbasedev.name, - vdev->msix->table_bar, 0, 0); + vdev->msix->table_bar, (uint64_t) 0, + (uint64_t) 0); } else { region->mmaps[0].offset =3D end; region->mmaps[0].size =3D region->size - end; diff --git a/hw/vfio/trace-events b/hw/vfio/trace-events index 2561c6d..cac65ef 100644 --- a/hw/vfio/trace-events +++ b/hw/vfio/trace-events @@ -67,7 +67,7 @@ vfio_quirk_nvidia_bar0_msi_ack(const char *name) "%s" vfio_quirk_nvidia_bar0_probe(const char *name) "%s" vfio_quirk_rtl8168_fake_latch(const char *name, uint64_t val) "%s 0x%"PRIx= 64 vfio_quirk_rtl8168_msix_write(const char *name, uint16_t offset, uint64_t = val) "%s MSI-X table write[0x%x]: 0x%"PRIx64 -vfio_quirk_rtl8168_msix_read(const char *name, uint16_t offset, uint64_t v= al) "%s MSI-X table read[0x%x]: 0x%"PRIx64 +vfio_quirk_rtl8168_msix_read(const char *name, hwaddr offset, uint64_t val= ) "%s MSI-X table read[0x%" HWADDR_PRIx "]: 0x%"PRIx64 vfio_quirk_rtl8168_probe(const char *name) "%s" vfio_quirk_ati_bonaire_reset_skipped(const char *name) "%s" @@ -75,7 +75,7 @@ vfio_quirk_ati_bonaire_reset_no_smc(const char *name) "%s" vfio_quirk_ati_bonaire_reset_timeout(const char *name) "%s" vfio_quirk_ati_bonaire_reset_done(const char *name) "%s" vfio_quirk_ati_bonaire_reset(const char *name) "%s" -vfio_pci_igd_bar4_write(const char *name, uint32_t index, uint32_t data, u= int32_t base) "%s [%03x] %08x -> %08x" +vfio_pci_igd_bar4_write(const char *name, uint32_t index, uint64_t data, u= int64_t base) "%s [%03x] %08" PRIx64 " -> %08" PRIx64 vfio_pci_igd_bdsm_enabled(const char *name, int size) "%s %dMB" vfio_pci_igd_opregion_enabled(const char *name) "%s" vfio_pci_igd_host_bridge_enabled(const char *name) "%s" @@ -94,14 +94,14 @@ vfio_disconnect_container(int fd) "close container->fd= =3D%d" vfio_put_group(int fd) "close group->fd=3D%d" vfio_get_device(const char * name, unsigned int flags, unsigned int num_re= gions, unsigned int num_irqs) "Device %s flags: %u, regions: %u, irqs: %u" vfio_put_base_device(int fd) "close vdev->fd=3D%d" -vfio_region_setup(const char *dev, int index, const char *name, unsigned l= ong flags, unsigned long offset, unsigned long size) "Device %s, region %d = \"%s\", flags: %lx, offset: %lx, size: %lx" +vfio_region_setup(const char *dev, int index, const char *name, uint32_t f= lags, unsigned long offset, unsigned long size) "Device %s, region %d \"%s\= ", flags: %" PRIx32 ", offset: %lx, size: %lx" vfio_region_mmap_fault(const char *name, int index, unsigned long offset, = unsigned long size, int fault) "Region %s mmaps[%d], [%lx - %lx], fault: %d" vfio_region_mmap(const char *name, unsigned long offset, unsigned long end= ) "Region %s [%lx - %lx]" vfio_region_exit(const char *name, int index) "Device %s, region %d" vfio_region_finalize(const char *name, int index) "Device %s, region %d" vfio_region_mmaps_set_enabled(const char *name, bool enabled) "Region %s m= maps enabled: %d" vfio_region_sparse_mmap_header(const char *name, int index, int nr_areas) = "Device %s region %d: %d sparse mmap entries" -vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long en= d) "sparse entry %d [0x%lx - 0x%lx]" +vfio_region_sparse_mmap_entry(int i, unsigned long long start, unsigned lo= ng long end) "sparse entry %d [0x%llx - 0x%llx]" vfio_get_dev_region(const char *name, int index, uint32_t type, uint32_t s= ubtype) "%s index %d, %08x/%0x8" # hw/vfio/platform.c @@ -119,7 +119,7 @@ vfio_platform_start_edge_irqfd_injection(int index, int= fd) "IRQ index=3D%d, fd =3D # hw/vfio/spapr.c vfio_prereg_listener_region_add_skip(uint64_t start, uint64_t end) "%"PRIx= 64" - %"PRIx64 vfio_prereg_listener_region_del_skip(uint64_t start, uint64_t end) "%"PRIx= 64" - %"PRIx64 -vfio_prereg_register(uint64_t va, uint64_t size, int ret) "va=3D%"PRIx64" = size=3D%"PRIx64" ret=3D%d" -vfio_prereg_unregister(uint64_t va, uint64_t size, int ret) "va=3D%"PRIx64= " size=3D%"PRIx64" ret=3D%d" -vfio_spapr_create_window(int ps, uint64_t ws, uint64_t off) "pageshift=3D0= x%x winsize=3D0x%"PRIx64" offset=3D0x%"PRIx64 +vfio_prereg_register(unsigned long long va, unsigned long long size, int r= et) "va=3D%llx size=3D%llx ret=3D%d" +vfio_prereg_unregister(unsigned long long va, unsigned long long size, int= ret) "va=3D%llx size=3D%llx ret=3D%d" +vfio_spapr_create_window(int ps, unsigned long long ws, unsigned long long= off) "pageshift=3D0x%x winsize=3D0x%llx offset=3D0x%llx" vfio_spapr_remove_window(uint64_t off) "offset=3D%"PRIx64 --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489435887860209.75270185228203; Mon, 13 Mar 2017 13:11:27 -0700 (PDT) Received: from localhost ([::1]:54175 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWJR-0004YI-HT for importer@patchew.org; Mon, 13 Mar 2017 16:11:25 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43213) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4t-0000zZ-T3 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4t-0002fi-9l for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:23 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47024) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4t-0002ew-49 for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:23 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id EF3F7A0B46 for ; Mon, 13 Mar 2017 19:56:22 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 32B4B2D5CB; Mon, 13 Mar 2017 19:56:22 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:46 -0500 Message-Id: <20170313195547.21466-30-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Mon, 13 Mar 2017 19:56:23 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 29/30] trace: Fix parameter types in hw/virtio X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stefanha@redhat.com, "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" An upcoming patch will let the compiler warn us when we are silently losing precision in traces; update the trace definitions to pass through the full value at the callsite. Signed-off-by: Eric Blake --- hw/virtio/trace-events | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events index 6926eed..7b3743d 100644 --- a/hw/virtio/trace-events +++ b/hw/virtio/trace-events @@ -4,7 +4,7 @@ virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int = idx) "vq %p elem %p len %u idx %u" virtqueue_flush(void *vq, unsigned int count) "vq %p count %u" virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_= num) "vq %p elem %p in_num %u out_num %u" -virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p" +virtio_queue_notify(void *vdev, ptrdiff_t n, void *vq) "vdev %p n %td vq %= p" virtio_notify_irqfd(void *vdev, void *vq) "vdev %p vq %p" virtio_notify(void *vdev, void *vq) "vdev %p vq %p" virtio_set_status(void *vdev, uint8_t val) "vdev %p val %u" --=20 2.9.3 From nobody Sun Oct 5 19:07:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 148943628769876.73451545727494; Mon, 13 Mar 2017 13:18:07 -0700 (PDT) Received: from localhost ([::1]:54221 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnWPs-0001ET-VQ for importer@patchew.org; Mon, 13 Mar 2017 16:18:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43232) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cnW4u-00010j-Qa for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cnW4t-0002gK-Sm for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:24 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41510) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cnW4t-0002fP-LZ for qemu-devel@nongnu.org; Mon, 13 Mar 2017 15:56:23 -0400 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A83943D967 for ; Mon, 13 Mar 2017 19:56:23 +0000 (UTC) Received: from red.redhat.com (unknown [10.10.121.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id 0D1B72D5C4; Mon, 13 Mar 2017 19:56:22 +0000 (UTC) From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 13 Mar 2017 14:55:47 -0500 Message-Id: <20170313195547.21466-31-eblake@redhat.com> In-Reply-To: <20170313195547.21466-1-eblake@redhat.com> References: <20170313195547.21466-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Mon, 13 Mar 2017 19:56:23 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC PATCH v2 30/30] trace: Force compiler warnings on trace parameter type mismatches X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Our traces are processed through a function call (even though the function is static inline). While we could turn up compiler warnings to flag cases of implicit narrowing through a function parameter (such as a caller doing foo(my_uint64_t) to a function prototyped as void foo(int)), it would make the build very noisy as we have a lot of code that relies on that C-mandated behavior. Using the attribute printf marking of qemu_log_mask (when the log trace backend is enabled) is too late to catch scalar type changes (it does catch that the format string matches the parameters of the trace_foo() function, but does not detect format mismatches at the callsite). Completely emitting the traces as a macro is a possibility since they are already marked static inline, but doing so in a way that does not evaluate side effects more than once, and uses proper \ line continuation for a (lengthy) macro, is a more invasive change to the generator than I'm willing to make. So this patch introduces a compromise solution: almost[1] every trace_foo() is generated both as an inline function (unchanged from before, with the bulk of the code) and a forwarding macro (new in this patch) that uses a dead-code call to printf to trigger -Wformat type mismatch warnings from the compiler. The end result does not change the size of emitted code, but does enable us to get better checking; particularly useful since the format string in trace-events is distant from the callsites to trace_foo in the normal .c files. Note that the generated macro has to insert a trailing "\n" to shut up gcc's warning about an empty format string, and we have to use the gcc/clang extension of ##__VA_ARGS__ for comma elision since there are a few 0-arg traces. [1]The macro trick is NOT done for vcpu traces, because those trace calls are special; the format string associated with those events is in a different order than the resulting parameters to the function call, due to the additional logic generated for determining whether the vcpu needs filtering. Earlier patches show scenarios that this patch was able to catch, most of which just needed a tweak to the parameter types declared in trace-events, but some which were actual bugs in the code being traced. Note that there is a missing dependency in the makefiles; although trace/Makefile.objs defines $(tracetool-y) to include all .py files, the change to h.py does NOT force a rebuild of any of the generated trace.h files; and it probably has something to do with how our trace files are themselves considered a prerequisite of Makefile being up-to-date. I was unable to figure out the Makefile magic necessary to fix the dependency, but was able to manually work around the problem by running make -B block/trace.h-timestamp which forced a rerun of the tracetool, and therefore regenerated all of the trace.h files. Signed-off-by: Eric Blake --- RFC for two reasons: 1. the Makefile issue documented above means that incremental builds won't benefit from this patch without manual intervention (fresh builds, including docker, manage to test it, though) 2. there are still failures under 'make docker-test-mingw@fedora' due to more type mismatches that still need to be squashed. I'm still working on fixing those, but wanted to at least post this series for initial review, especially so the maintainer can weigh in on how much (or little) belongs in 2.9 scripts/tracetool/format/h.py | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/scripts/tracetool/format/h.py b/scripts/tracetool/format/h.py index 3682f4e..491fd6e 100644 --- a/scripts/tracetool/format/h.py +++ b/scripts/tracetool/format/h.py @@ -73,6 +73,19 @@ def generate(events, backend, group): out(' }', '}') + if "vcpu" not in e.properties: + out('', + '#define %(api)s(...) \\', + ' do { \\', + ' if (0) { \\', + ' printf(%(fmt)s "\\n", ## __VA_ARGS__); \\', + ' } \\', + ' %(api)s(__VA_ARGS__); \\', + ' } while (0)', + api=3De.api(), + fmt=3De.fmt.rstrip("\n") + ) + backend.generate_end(events, group) out('#endif /* TRACE_%s_GENERATED_TRACERS_H */' % group.upper()) --=20 2.9.3