From nobody Thu Nov 6 16:07:06 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489171639797912.3271865875878; Fri, 10 Mar 2017 10:47:19 -0800 (PST) Received: from localhost ([::1]:40534 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cmPZO-0005hG-IG for importer@patchew.org; Fri, 10 Mar 2017 13:47:18 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56670) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cmPYK-0005du-2s for qemu-devel@nongnu.org; Fri, 10 Mar 2017 13:46:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cmPYJ-0006AR-07 for qemu-devel@nongnu.org; Fri, 10 Mar 2017 13:46:12 -0500 Received: from mx1.redhat.com ([209.132.183.28]:36904) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cmPYI-00069Q-Qd for qemu-devel@nongnu.org; Fri, 10 Mar 2017 13:46:10 -0500 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D5F27209218; Fri, 10 Mar 2017 18:46:10 +0000 (UTC) Received: from localhost (ovpn-116-55.gru2.redhat.com [10.97.116.55]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id v2AIk88v005884; Fri, 10 Mar 2017 13:46:09 -0500 From: Eduardo Habkost To: Peter Maydell Date: Fri, 10 Mar 2017 15:45:51 -0300 Message-Id: <20170310184552.1481-3-ehabkost@redhat.com> In-Reply-To: <20170310184552.1481-1-ehabkost@redhat.com> References: <20170310184552.1481-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Fri, 10 Mar 2017 18:46:10 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 2/3] i386/kvm: Blacklist TSX on known broken hosts X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , qemu-devel@nongnu.org, Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Some Intel CPUs are known to have a broken TSX implementation. A microcode update from Intel disabled TSX on those CPUs, but GET_SUPPORTED_CPUID might be reporting it as supported if the hosts were not updated yet. Manually fixup the GET_SUPPORTED_CPUID data to ensure we will never enable TSX when running on those hosts. Reference: * glibc commit 2702856bf45c82cf8e69f2064f5aa15c0ceb6359: https://sourceware.org/git/?p=3Dglibc.git;a=3Dcommit;h=3D2702856bf45c82cf= 8e69f2064f5aa15c0ceb6359 Signed-off-by: Eduardo Habkost Message-Id: <20170309181212.18864-3-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- target/i386/kvm.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 887a81268f..472399fb2c 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -266,6 +266,19 @@ static int get_para_features(KVMState *s) return features; } =20 +static bool host_tsx_blacklisted(void) +{ + int family, model, stepping;\ + char vendor[CPUID_VENDOR_SZ + 1]; + + host_vendor_fms(vendor, &family, &model, &stepping); + + /* Check if we are running on a Haswell host known to have broken TSX = */ + return !strcmp(vendor, CPUID_VENDOR_INTEL) && + (family =3D=3D 6) && + ((model =3D=3D 63 && stepping < 4) || + model =3D=3D 60 || model =3D=3D 69 || model =3D=3D 70); +} =20 /* Returns the value for a specific register on the cpuid entry */ @@ -349,6 +362,10 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uin= t32_t function, } } else if (function =3D=3D 6 && reg =3D=3D R_EAX) { ret |=3D CPUID_6_EAX_ARAT; /* safe to allow because of emulated AP= IC */ + } else if (function =3D=3D 7 && index =3D=3D 0 && reg =3D=3D R_EBX) { + if (host_tsx_blacklisted()) { + ret &=3D ~(CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_HLE); + } } else if (function =3D=3D 0x80000001 && reg =3D=3D R_EDX) { /* On Intel, kvm returns cpuid according to the Intel spec, * so add missing bits according to the AMD spec: --=20 2.11.0.259.g40922b1