From nobody Thu Nov 6 19:12:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1488344534505140.03919540584093; Tue, 28 Feb 2017 21:02:14 -0800 (PST) Received: from localhost ([::1]:38431 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ciwOz-0006ls-5F for importer@patchew.org; Wed, 01 Mar 2017 00:02:13 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46547) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ciw7p-000853-S1 for qemu-devel@nongnu.org; Tue, 28 Feb 2017 23:44:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ciw7m-000071-50 for qemu-devel@nongnu.org; Tue, 28 Feb 2017 23:44:29 -0500 Received: from ozlabs.org ([103.22.144.67]:53133) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ciw7l-0008WO-DW; Tue, 28 Feb 2017 23:44:25 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vY2sS71NNz9sNv; Wed, 1 Mar 2017 15:44:11 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1488343452; bh=XtEO3AsgtitJhOkJ9/dKdRfobfliD9BYFOYWHhJdWF4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=f5YunwXHHQJUyahwDh7+2jlcRbctJcuiw/7IhdrwZq+3/zy5Fmt+DXWKzSodxXq1j E5LpYlHGECuigVzLyH2oRrDY917Zo9uNe2lVfQvO0ieQMrxs27xHqtdk0A04XpQEPb L6HE464/gJ/CHO4lWAtyArgl+NKO/W1OIqO9pJl8= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 1 Mar 2017 15:43:43 +1100 Message-Id: <20170301044405.1792-29-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170301044405.1792-1-david@gibson.dropbear.id.au> References: <20170301044405.1792-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 28/50] ppc/xics: store the ICS object under the sPAPR machine X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, aik@ozlabs.ru, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: C=C3=A9dric Le Goater A list of ICS objects was introduced under the XICS object for the PowerNV machine but, for the sPAPR machine, it brings extra complexity as there is only a single ICS. To simplify the code, let's add the ICS pointer under the sPAPR machine and try to reduce the use of this list where possible. Also, change the xics_spapr_*() routines to use an ICS object instead of an XICSState and change their name to reflect that these are specific to the sPAPR ICS object. Signed-off-by: C=C3=A9dric Le Goater Signed-off-by: David Gibson --- hw/intc/xics_spapr.c | 22 +++++++++------------- hw/ppc/spapr.c | 14 +++++++++----- hw/ppc/spapr_events.c | 4 ++-- hw/ppc/spapr_pci.c | 8 ++++---- hw/ppc/spapr_vio.c | 2 +- include/hw/ppc/spapr.h | 1 + include/hw/ppc/xics.h | 6 +++--- 7 files changed, 29 insertions(+), 28 deletions(-) diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c index 859b567..1501e79 100644 --- a/hw/intc/xics_spapr.c +++ b/hw/intc/xics_spapr.c @@ -118,7 +118,7 @@ static void rtas_set_xive(PowerPCCPU *cpu, sPAPRMachine= State *spapr, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets) { - ICSState *ics =3D QLIST_FIRST(&spapr->xics->ics); + ICSState *ics =3D spapr->ics; uint32_t nr, srcno, server, priority; =20 if ((nargs !=3D 3) || (nret !=3D 1)) { @@ -151,7 +151,7 @@ static void rtas_get_xive(PowerPCCPU *cpu, sPAPRMachine= State *spapr, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets) { - ICSState *ics =3D QLIST_FIRST(&spapr->xics->ics); + ICSState *ics =3D spapr->ics; uint32_t nr, srcno; =20 if ((nargs !=3D 1) || (nret !=3D 3)) { @@ -181,7 +181,7 @@ static void rtas_int_off(PowerPCCPU *cpu, sPAPRMachineS= tate *spapr, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets) { - ICSState *ics =3D QLIST_FIRST(&spapr->xics->ics); + ICSState *ics =3D spapr->ics; uint32_t nr, srcno; =20 if ((nargs !=3D 1) || (nret !=3D 1)) { @@ -212,7 +212,7 @@ static void rtas_int_on(PowerPCCPU *cpu, sPAPRMachineSt= ate *spapr, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets) { - ICSState *ics =3D QLIST_FIRST(&spapr->xics->ics); + ICSState *ics =3D spapr->ics; uint32_t nr, srcno; =20 if ((nargs !=3D 1) || (nret !=3D 1)) { @@ -294,9 +294,8 @@ static int ics_find_free_block(ICSState *ics, int num, = int alignnum) return -1; } =20 -int xics_spapr_alloc(XICSState *xics, int irq_hint, bool lsi, Error **errp) +int spapr_ics_alloc(ICSState *ics, int irq_hint, bool lsi, Error **errp) { - ICSState *ics =3D QLIST_FIRST(&xics->ics); int irq; =20 if (!ics) { @@ -327,10 +326,9 @@ int xics_spapr_alloc(XICSState *xics, int irq_hint, bo= ol lsi, Error **errp) * Allocate block of consecutive IRQs, and return the number of the first = IRQ in * the block. If align=3D=3Dtrue, aligns the first IRQ number to num. */ -int xics_spapr_alloc_block(XICSState *xics, int num, bool lsi, bool align, - Error **errp) +int spapr_ics_alloc_block(ICSState *ics, int num, bool lsi, + bool align, Error **errp) { - ICSState *ics =3D QLIST_FIRST(&xics->ics); int i, first =3D -1; =20 if (!ics) { @@ -380,11 +378,9 @@ static void ics_free(ICSState *ics, int srcno, int num) } } =20 -void xics_spapr_free(XICSState *xics, int irq, int num) +void spapr_ics_free(ICSState *ics, int irq, int num) { - ICSState *ics =3D xics_find_source(xics, irq); - - if (ics) { + if (ics_valid_irq(ics, irq)) { trace_xics_ics_free(0, irq, num); ics_free(ics, irq - ics->offset, num); } diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 9897898..153aab4 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -95,7 +95,8 @@ =20 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift)) =20 -static XICSState *try_create_xics(const char *type, const char *type_ics, +static XICSState *try_create_xics(sPAPRMachineState *spapr, + const char *type, const char *type_ics, const char *type_icp, int nr_servers, int nr_irqs, Error **errp) { @@ -112,7 +113,7 @@ static XICSState *try_create_xics(const char *type, con= st char *type_ics, } =20 ics =3D ICS_SIMPLE(object_new(type_ics)); - object_property_add_child(OBJECT(xics), "ics", OBJECT(ics), NULL); + object_property_add_child(OBJECT(spapr), "ics", OBJECT(ics), NULL); object_property_set_int(OBJECT(ics), nr_irqs, "nr-irqs", &err); object_property_add_const_link(OBJECT(ics), "xics", OBJECT(xics), NULL= ); object_property_set_bool(OBJECT(ics), true, "realized", &local_err); @@ -138,6 +139,7 @@ static XICSState *try_create_xics(const char *type, con= st char *type_ics, object_unref(OBJECT(icp)); } =20 + spapr->ics =3D ics; return xics; =20 error: @@ -158,7 +160,8 @@ static XICSState *xics_system_init(MachineState *machin= e, Error *err =3D NULL; =20 if (machine_kernel_irqchip_allowed(machine)) { - xics =3D try_create_xics(TYPE_XICS_SPAPR_KVM, TYPE_ICS_KVM, + xics =3D try_create_xics(SPAPR_MACHINE(machine), + TYPE_XICS_SPAPR_KVM, TYPE_ICS_KVM, TYPE_KVM_ICP, nr_servers, nr_irqs, &err= ); } if (machine_kernel_irqchip_required(machine) && !xics) { @@ -170,8 +173,9 @@ static XICSState *xics_system_init(MachineState *machin= e, } =20 if (!xics) { - xics =3D try_create_xics(TYPE_XICS_SPAPR, TYPE_ICS_SIMPLE, TYPE_IC= P, - nr_servers, nr_irqs, errp); + xics =3D try_create_xics(SPAPR_MACHINE(machine), + TYPE_XICS_SPAPR, TYPE_ICS_SIMPLE, + TYPE_ICP, nr_servers, nr_irqs, errp); } =20 return xics; diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c index f85a9c3..38b4258 100644 --- a/hw/ppc/spapr_events.c +++ b/hw/ppc/spapr_events.c @@ -752,7 +752,7 @@ void spapr_events_init(sPAPRMachineState *spapr) spapr->event_sources =3D spapr_event_sources_new(); =20 spapr_event_sources_register(spapr->event_sources, EVENT_CLASS_EPOW, - xics_spapr_alloc(spapr->xics, 0, false, + spapr_ics_alloc(spapr->ics, 0, false, &error_fatal)); =20 /* NOTE: if machine supports modern/dedicated hotplug event source, @@ -765,7 +765,7 @@ void spapr_events_init(sPAPRMachineState *spapr) */ if (spapr->use_hotplug_event_source) { spapr_event_sources_register(spapr->event_sources, EVENT_CLASS_HOT= _PLUG, - xics_spapr_alloc(spapr->xics, 0, fals= e, + spapr_ics_alloc(spapr->ics, 0, false, &error_fatal)); } =20 diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 84a0f31..f371f4e 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -326,7 +326,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRM= achineState *spapr, return; } =20 - xics_spapr_free(spapr->xics, msi->first_irq, msi->num); + spapr_ics_free(spapr->ics, msi->first_irq, msi->num); if (msi_present(pdev)) { spapr_msi_setmsg(pdev, 0, false, 0, 0); } @@ -364,7 +364,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRM= achineState *spapr, } =20 /* Allocate MSIs */ - irq =3D xics_spapr_alloc_block(spapr->xics, req_num, false, + irq =3D spapr_ics_alloc_block(spapr->ics, req_num, false, ret_intr_type =3D=3D RTAS_TYPE_MSI, &err); if (err) { error_reportf_err(err, "Can't allocate MSIs for device %x: ", @@ -375,7 +375,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRM= achineState *spapr, =20 /* Release previous MSIs */ if (msi) { - xics_spapr_free(spapr->xics, msi->first_irq, msi->num); + spapr_ics_free(spapr->ics, msi->first_irq, msi->num); g_hash_table_remove(phb->msi, &config_addr); } =20 @@ -1747,7 +1747,7 @@ static void spapr_phb_realize(DeviceState *dev, Error= **errp) uint32_t irq; Error *local_err =3D NULL; =20 - irq =3D xics_spapr_alloc_block(spapr->xics, 1, true, false, &local= _err); + irq =3D spapr_ics_alloc_block(spapr->ics, 1, true, false, &local_e= rr); if (local_err) { error_propagate(errp, local_err); error_prepend(errp, "can't allocate LSIs: "); diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c index 8bfc5f9..a0ee4fd 100644 --- a/hw/ppc/spapr_vio.c +++ b/hw/ppc/spapr_vio.c @@ -454,7 +454,7 @@ static void spapr_vio_busdev_realize(DeviceState *qdev,= Error **errp) dev->qdev.id =3D id; } =20 - dev->irq =3D xics_spapr_alloc(spapr->xics, dev->irq, false, &local_err= ); + dev->irq =3D spapr_ics_alloc(spapr->ics, dev->irq, false, &local_err); if (local_err) { error_propagate(errp, local_err); return; diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index f9b17d8..21e506b 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -59,6 +59,7 @@ struct sPAPRMachineState { QLIST_HEAD(, sPAPRPHBState) phbs; struct sPAPRNVRAM *nvram; XICSState *xics; + ICSState *ics; DeviceState *rtc; =20 void *htab; diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index e79a707..37d4d9c 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -181,10 +181,10 @@ struct ICSIRQState { #define XICS_IRQS_SPAPR 1024 =20 qemu_irq xics_get_qirq(XICSState *icp, int irq); -int xics_spapr_alloc(XICSState *icp, int irq_hint, bool lsi, Error **errp); -int xics_spapr_alloc_block(XICSState *icp, int num, bool lsi, bool align, +int spapr_ics_alloc(ICSState *ics, int irq_hint, bool lsi, Error **errp); +int spapr_ics_alloc_block(ICSState *ics, int num, bool lsi, bool align, Error **errp); -void xics_spapr_free(XICSState *icp, int irq, int num); +void spapr_ics_free(ICSState *ics, int irq, int num); void spapr_dt_xics(XICSState *xics, void *fdt, uint32_t phandle); =20 void xics_cpu_setup(XICSState *icp, PowerPCCPU *cpu); --=20 2.9.3