From nobody Thu Nov 6 20:31:52 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487745876591622.7864117477952; Tue, 21 Feb 2017 22:44:36 -0800 (PST) Received: from localhost ([::1]:50167 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQfD-0004sp-ER for importer@patchew.org; Wed, 22 Feb 2017 01:44:35 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37569) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV1-0002x6-Mh for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV0-0007w9-DN for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:03 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:53385) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQUz-0007px-Va; Wed, 22 Feb 2017 01:34:02 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndG5rXZz9s7p; Wed, 22 Feb 2017 17:33:54 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745234; bh=v6OKEQkuDBv71g4dsU9JYYpPZbKNMzmsRF8U5jp+/wg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FN9EueXWxaO1q5pswdYgxgnBTp/vJqXDZfd7vnrC34aiy9vTENIBTBV3mLmz+50Y2 227cGuT/t0V2F/MpfeFjf+6B9OYPtlzxxMKzGUoBnVGXa4JHClDR+eWAomxEbgyFPM KUOQAf0kf1TcXP4VMeDXCMjWJ8yiduFSTQK1iV3A= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:11 +1100 Message-Id: <20170222063348.32176-7-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 06/43] ppc: implement xssqrtqp instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, Jose Ricardo Ziviani , mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Jose Ricardo Ziviani xssqrtqp: VSX Scalar Square Root Quad-Precision. Signed-off-by: Jose Ricardo Ziviani Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 38 +++++++++++++++++++++++++++++++++= ++++ target/ppc/helper.h | 1 + target/ppc/translate/vsx-impl.inc.c | 1 + target/ppc/translate/vsx-ops.inc.c | 1 + 4 files changed, 41 insertions(+) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index b422442..5c34438 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -3392,3 +3392,41 @@ void helper_xsrqpxp(CPUPPCState *env, uint32_t opcod= e) putVSR(rD(opcode) + 32, &xt, env); float_check_status(env); } + +void helper_xssqrtqp(CPUPPCState *env, uint32_t opcode) +{ + ppc_vsr_t xb; + ppc_vsr_t xt; + float_status tstat; + + getVSR(rB(opcode) + 32, &xb, env); + memset(&xt, 0, sizeof(xt)); + helper_reset_fpstatus(env); + + if (unlikely(Rc(opcode) !=3D 0)) { + /* TODO: Support xsadddpo after round-to-odd is implemented */ + abort(); + } + + tstat =3D env->fp_status; + set_float_exception_flags(0, &tstat); + xt.f128 =3D float128_sqrt(xb.f128, &tstat); + env->fp_status.float_exception_flags |=3D tstat.float_exception_flags; + + if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { + if (float128_is_signaling_nan(xb.f128, &tstat)) { + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); + xt.f128 =3D float128_snan_to_qnan(xb.f128); + } else if (float128_is_quiet_nan(xb.f128, &tstat)) { + xt.f128 =3D xb.f128; + } else if (float128_is_neg(xb.f128) && !float128_is_zero(xb.f128))= { + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, 1); + set_snan_bit_is_one(0, &env->fp_status); + xt.f128 =3D float128_default_nan(&env->fp_status); + } + } + + helper_compute_fprf_float128(env, xt.f128); + putVSR(rD(opcode) + 32, &xt, env); + float_check_status(env); +} diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 9ce2e58..fbf80a7 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -461,6 +461,7 @@ DEF_HELPER_2(xsrdpip, void, env, i32) DEF_HELPER_2(xsrdpiz, void, env, i32) DEF_HELPER_2(xsrqpi, void, env, i32) DEF_HELPER_2(xsrqpxp, void, env, i32) +DEF_HELPER_2(xssqrtqp, void, env, i32) =20 DEF_HELPER_2(xsaddsp, void, env, i32) DEF_HELPER_2(xssubsp, void, env, i32) diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx= -impl.inc.c index 91be201..bbd7d1a 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -835,6 +835,7 @@ GEN_VSX_HELPER_XT_XB_ENV(xsrsp, 0x12, 0x11, 0, PPC2_VSX= 207) =20 GEN_VSX_HELPER_2(xsrqpi, 0x05, 0x00, 0, PPC2_ISA300) GEN_VSX_HELPER_2(xsrqpxp, 0x05, 0x01, 0, PPC2_ISA300) +GEN_VSX_HELPER_2(xssqrtqp, 0x04, 0x19, 0x1B, PPC2_ISA300) =20 GEN_VSX_HELPER_2(xsaddsp, 0x00, 0x00, 0, PPC2_VSX207) GEN_VSX_HELPER_2(xssubsp, 0x00, 0x01, 0, PPC2_VSX207) diff --git a/target/ppc/translate/vsx-ops.inc.c b/target/ppc/translate/vsx-= ops.inc.c index e58740b..bac3db2 100644 --- a/target/ppc/translate/vsx-ops.inc.c +++ b/target/ppc/translate/vsx-ops.inc.c @@ -115,6 +115,7 @@ GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x18, opc4 | 0x= 1, inval) =20 GEN_VSX_Z23FORM_300(xsrqpi, 0x05, 0x0, 0x0, 0x0), GEN_VSX_Z23FORM_300(xsrqpxp, 0x05, 0x1, 0x0, 0x0), +GEN_VSX_XFORM_300_EO(xssqrtqp, 0x04, 0x19, 0x1B, 0x00000001), =20 GEN_XX2FORM(xsabsdp, 0x12, 0x15, PPC2_VSX), GEN_XX2FORM(xsnabsdp, 0x12, 0x16, PPC2_VSX), --=20 2.9.3