From nobody Thu Nov 6 20:38:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487746638755817.1069445637025; Tue, 21 Feb 2017 22:57:18 -0800 (PST) Received: from localhost ([::1]:50243 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQrV-0008I5-8F for importer@patchew.org; Wed, 22 Feb 2017 01:57:17 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37675) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV3-0002yV-Qr for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV0-0007wc-Q9 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:05 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:52421) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV0-0007qF-B8; Wed, 22 Feb 2017 01:34:02 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndH0bMCz9s83; Wed, 22 Feb 2017 17:33:54 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745235; bh=2ULJSjarPD9dit20lRF7l2gk+fIqx5WztMe/WraaFOQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Q3a5rUDEdOCUCKwkcDTGZAYTRkKLXyH5GsCaHrIYu+vtbsgiS8wlYv0+6n1EeCr6S v6vbBVu23QyDQK0DM3x0dfRm2Cyc6yiItzv+COB3UQRiFsb0qGRfodk9TvyB5OgF+F W3J1OoWYmzr5EQjXTIcH/iLIjfNVTYzKghMS8SAc= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:09 +1100 Message-Id: <20170222063348.32176-5-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 04/43] ppc: implement xsrqpi[x] instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, Jose Ricardo Ziviani , mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Jose Ricardo Ziviani xsrqpi[x]: VSX Scalar Round to Quad-Precision Integer [with Inexact]. Signed-off-by: Jose Ricardo Ziviani Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 59 +++++++++++++++++++++++++++++++++= ++++ target/ppc/helper.h | 1 + target/ppc/internal.h | 1 + target/ppc/translate/vsx-impl.inc.c | 2 ++ target/ppc/translate/vsx-ops.inc.c | 12 ++++++++ 5 files changed, 75 insertions(+) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 9f5cafd..1ca384c 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -3277,3 +3277,62 @@ void helper_xststdcsp(CPUPPCState *env, uint32_t opc= ode) env->fpscr |=3D cc << FPSCR_FPRF; env->crf[BF(opcode)] =3D cc; } + +void helper_xsrqpi(CPUPPCState *env, uint32_t opcode) +{ + ppc_vsr_t xb; + ppc_vsr_t xt; + uint8_t r =3D Rrm(opcode); + uint8_t ex =3D Rc(opcode); + uint8_t rmc =3D RMC(opcode); + uint8_t rmode =3D 0; + float_status tstat; + + getVSR(rB(opcode) + 32, &xb, env); + memset(&xt, 0, sizeof(xt)); + helper_reset_fpstatus(env); + + if (r =3D=3D 0 && rmc =3D=3D 0) { + rmode =3D float_round_ties_away; + } else if (r =3D=3D 0 && rmc =3D=3D 0x3) { + rmode =3D fpscr_rn; + } else if (r =3D=3D 1) { + switch (rmc) { + case 0: + rmode =3D float_round_nearest_even; + break; + case 1: + rmode =3D float_round_to_zero; + break; + case 2: + rmode =3D float_round_up; + break; + case 3: + rmode =3D float_round_down; + break; + default: + abort(); + } + } + + tstat =3D env->fp_status; + set_float_exception_flags(0, &tstat); + set_float_rounding_mode(rmode, &tstat); + xt.f128 =3D float128_round_to_int(xb.f128, &tstat); + env->fp_status.float_exception_flags |=3D tstat.float_exception_flags; + + if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { + if (float128_is_signaling_nan(xb.f128, &tstat)) { + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); + xt.f128 =3D float128_snan_to_qnan(xt.f128); + } + } + + if (ex =3D=3D 0 && (tstat.float_exception_flags & float_flag_inexact))= { + env->fp_status.float_exception_flags &=3D ~float_flag_inexact; + } + + helper_compute_fprf_float128(env, xt.f128); + float_check_status(env); + putVSR(rD(opcode) + 32, &xt, env); +} diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 85af9df..6a53ae0 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -459,6 +459,7 @@ DEF_HELPER_2(xsrdpic, void, env, i32) DEF_HELPER_2(xsrdpim, void, env, i32) DEF_HELPER_2(xsrdpip, void, env, i32) DEF_HELPER_2(xsrdpiz, void, env, i32) +DEF_HELPER_2(xsrqpi, void, env, i32) =20 DEF_HELPER_2(xsaddsp, void, env, i32) DEF_HELPER_2(xssubsp, void, env, i32) diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 5a2fd68..5b5b180 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -186,6 +186,7 @@ EXTRACT_HELPER(DCM, 10, 6) =20 /* DFP Z23-form */ EXTRACT_HELPER(RMC, 9, 2) +EXTRACT_HELPER(Rrm, 16, 1) =20 EXTRACT_HELPER_SPLIT(DQxT, 3, 1, 21, 5); EXTRACT_HELPER_SPLIT(xT, 0, 1, 21, 5); diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx= -impl.inc.c index a44c003..9868f01 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -833,6 +833,8 @@ GEN_VSX_HELPER_2(xsrdpip, 0x12, 0x06, 0, PPC2_VSX) GEN_VSX_HELPER_2(xsrdpiz, 0x12, 0x05, 0, PPC2_VSX) GEN_VSX_HELPER_XT_XB_ENV(xsrsp, 0x12, 0x11, 0, PPC2_VSX207) =20 +GEN_VSX_HELPER_2(xsrqpi, 0x05, 0x00, 0, PPC2_ISA300) + GEN_VSX_HELPER_2(xsaddsp, 0x00, 0x00, 0, PPC2_VSX207) GEN_VSX_HELPER_2(xssubsp, 0x00, 0x01, 0, PPC2_VSX207) GEN_VSX_HELPER_2(xsmulsp, 0x00, 0x02, 0, PPC2_VSX207) diff --git a/target/ppc/translate/vsx-ops.inc.c b/target/ppc/translate/vsx-= ops.inc.c index 7dc9f6f..b095508 100644 --- a/target/ppc/translate/vsx-ops.inc.c +++ b/target/ppc/translate/vsx-ops.inc.c @@ -103,6 +103,18 @@ GEN_HANDLER_E(name, 0x3F, opc2, opc3, inval, PPC_NONE,= PPC2_ISA300) #define GEN_VSX_XFORM_300_EO(name, opc2, opc3, opc4, inval) \ GEN_HANDLER_E_2(name, 0x3F, opc2, opc3, opc4, inval, PPC_NONE, PPC2_ISA300) =20 +#define GEN_VSX_Z23FORM_300(name, opc2, opc3, opc4, inval) \ +GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x00, opc4 | 0x0, inval), \ +GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x08, opc4 | 0x0, inval), \ +GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x10, opc4 | 0x0, inval), \ +GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x18, opc4 | 0x0, inval), \ +GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x00, opc4 | 0x1, inval), \ +GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x08, opc4 | 0x1, inval), \ +GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x10, opc4 | 0x1, inval), \ +GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x18, opc4 | 0x1, inval) + +GEN_VSX_Z23FORM_300(xsrqpi, 0x05, 0x0, 0x0, 0x0), + GEN_XX2FORM(xsabsdp, 0x12, 0x15, PPC2_VSX), GEN_XX2FORM(xsnabsdp, 0x12, 0x16, PPC2_VSX), GEN_XX2FORM(xsnegdp, 0x12, 0x17, PPC2_VSX), --=20 2.9.3