From nobody Thu Nov 6 20:33:18 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487746225217369.1029349906613; Tue, 21 Feb 2017 22:50:25 -0800 (PST) Received: from localhost ([::1]:50201 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQkp-00025Q-JK for importer@patchew.org; Wed, 22 Feb 2017 01:50:23 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37720) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV5-00030F-0L for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:11 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV2-0007z0-V1 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:06 -0500 Received: from ozlabs.org ([103.22.144.67]:42875) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV2-0007wk-G3; Wed, 22 Feb 2017 01:34:04 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndJ3WQdz9sCg; Wed, 22 Feb 2017 17:33:55 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745236; bh=pLTtZk9StpqnWwbRt/EciJ0DPo+cnEKOP2wszwJ6vJo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dtqA0fRbi23H7T7+yqRriP4pQcAj0/E0NgKFtcnH0xq9RFByEQMvEun7rbl86B0Kz iejhRdaJ0M83D3Bq4eVGHv7aPXk2/BhzAC4/GkFUCDjizQEV6ypeiIxD06H/H4WXml 7OfF7pgoC56neFyRo1IessHYheKgfF4IvMC01zBE= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:18 +1100 Message-Id: <20170222063348.32176-14-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 13/43] target-ppc: implement store atomic instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, Harish S , thuth@redhat.com, Athira Rajeev , Nikunj A Dadhania , qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, Balamuruhan S , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Balamuruhan S stwat: Store Word Atomic stdat: Store Doubleword Atomic The instruction includes as function code (5 bits) which gives a detail on the operation to be performed. The patch implements five such functions. Signed-off-by: Balamuruhan S Signed-off-by: Harish S Signed-off-by: Athira Rajeev [ implement stdat, use macro and combine both implementation ] Signed-off-by: Nikunj A Dadhania Signed-off-by: David Gibson --- target/ppc/translate.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 52 insertions(+) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index ea2ec44..255735a 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -3033,6 +3033,56 @@ LD_ATOMIC(lwat, DEF_MEMOP(MO_UL), i32, trunc_tl_i32,= extu_i32_tl) LD_ATOMIC(ldat, DEF_MEMOP(MO_Q), i64, mov_i64, mov_i64) #endif =20 +#define ST_ATOMIC(name, memop, tp, op) \ +static void gen_##name(DisasContext *ctx) \ +{ \ + int len =3D MEMOP_GET_SIZE(memop); \ + uint32_t gpr_FC =3D FC(ctx->opcode); \ + TCGv EA =3D tcg_temp_local_new(); \ + TCGv_##tp t0, t1; \ + \ + gen_addr_register(ctx, EA); \ + if (len > 1) { \ + gen_check_align(ctx, EA, len - 1); \ + } \ + t0 =3D tcg_temp_new_##tp(); \ + t1 =3D tcg_temp_new_##tp(); \ + tcg_gen_##op(t0, cpu_gpr[rD(ctx->opcode) + 1]); \ + \ + switch (gpr_FC) { \ + case 0: /* add and Store */ \ + tcg_gen_atomic_add_fetch_##tp(t1, EA, t0, ctx->mem_idx, memop); \ + break; \ + case 1: /* xor and Store */ \ + tcg_gen_atomic_xor_fetch_##tp(t1, EA, t0, ctx->mem_idx, memop); \ + break; \ + case 2: /* Or and Store */ \ + tcg_gen_atomic_or_fetch_##tp(t1, EA, t0, ctx->mem_idx, memop); \ + break; \ + case 3: /* 'and' and Store */ \ + tcg_gen_atomic_and_fetch_##tp(t1, EA, t0, ctx->mem_idx, memop); \ + break; \ + case 4: /* Store max unsigned */ \ + case 5: /* Store max signed */ \ + case 6: /* Store min unsigned */ \ + case 7: /* Store min signed */ \ + case 24: /* Store twin */ \ + gen_invalid(ctx); \ + break; \ + default: \ + /* invoke data storage error handler */ \ + gen_exception_err(ctx, POWERPC_EXCP_DSI, POWERPC_EXCP_INVAL); \ + } \ + tcg_temp_free_##tp(t0); \ + tcg_temp_free_##tp(t1); \ + tcg_temp_free(EA); \ +} + +ST_ATOMIC(stwat, DEF_MEMOP(MO_UL), i32, trunc_tl_i32) +#if defined(TARGET_PPC64) +ST_ATOMIC(stdat, DEF_MEMOP(MO_Q), i64, mov_i64) +#endif + #if defined(CONFIG_USER_ONLY) static void gen_conditional_store(DisasContext *ctx, TCGv EA, int reg, int memop) @@ -6288,11 +6338,13 @@ GEN_HANDLER_E(lbarx, 0x1F, 0x14, 0x01, 0, PPC_NONE,= PPC2_ATOMIC_ISA206), GEN_HANDLER_E(lharx, 0x1F, 0x14, 0x03, 0, PPC_NONE, PPC2_ATOMIC_ISA206), GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000000, PPC_RES), GEN_HANDLER_E(lwat, 0x1F, 0x06, 0x12, 0x00000001, PPC_NONE, PPC2_ISA300), +GEN_HANDLER_E(stwat, 0x1F, 0x06, 0x16, 0x00000001, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(stbcx_, 0x1F, 0x16, 0x15, 0, PPC_NONE, PPC2_ATOMIC_ISA206), GEN_HANDLER_E(sthcx_, 0x1F, 0x16, 0x16, 0, PPC_NONE, PPC2_ATOMIC_ISA206), GEN_HANDLER2(stwcx_, "stwcx.", 0x1F, 0x16, 0x04, 0x00000000, PPC_RES), #if defined(TARGET_PPC64) GEN_HANDLER_E(ldat, 0x1F, 0x06, 0x13, 0x00000001, PPC_NONE, PPC2_ISA300), +GEN_HANDLER_E(stdat, 0x1F, 0x06, 0x17, 0x00000001, PPC_NONE, PPC2_ISA300), GEN_HANDLER(ldarx, 0x1F, 0x14, 0x02, 0x00000000, PPC_64B), GEN_HANDLER_E(lqarx, 0x1F, 0x14, 0x08, 0, PPC_NONE, PPC2_LSQ_ISA207), GEN_HANDLER2(stdcx_, "stdcx.", 0x1F, 0x16, 0x06, 0x00000000, PPC_64B), --=20 2.9.3