From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487745366313952.4383935778642; Tue, 21 Feb 2017 22:36:06 -0800 (PST) Received: from localhost ([::1]:50125 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQWy-0004SW-Nu for importer@patchew.org; Wed, 22 Feb 2017 01:36:04 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37515) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV0-0002wx-4m for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQUw-0007og-V4 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:02 -0500 Received: from ozlabs.org ([103.22.144.67]:35403) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQUw-0007nG-IT; Wed, 22 Feb 2017 01:33:58 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndG4HgPz9s7k; Wed, 22 Feb 2017 17:33:54 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745234; bh=3MsvUKMYwxiY50Me+s4I9JP8Jq22tEt0WJ9CtaimjK0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iK7xH/PmOoWMqH9n4GAUkD5Gbf7jSUo6Qe5YBp2Iefz/6RKpGdjPriIAcVPVUp1pI GiZRo+br31dhVtwYzevIrr49tWvSlpspLKPHtWIyr1VSw4oNUoegh5r4u7DaE2O+UH 7l6dpoHDLG1eEpZGcHKU0G5qIbhCAI4WZN2dlKMQ= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:06 +1100 Message-Id: <20170222063348.32176-2-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 01/43] spapr: cpu core: separate child threads destruction from machine state operations X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov Split off destroying VCPU threads from drc callback spapr_core_release() into new spapr_cpu_core_unrealizefn() which takes care of internal cpu core state cleanup (i.e. VCPU threads) and is called when object_unparent(core) is called. That leaves spapr_core_release() only with board mgmt code, which will be moved to board related file in follow up patch along with the rest on hotplug callbacks. Signed-off-by: Igor Mammedov Reviewed-by: Bharata B Rao Signed-off-by: David Gibson --- hw/ppc/spapr_cpu_core.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 9dddaeb..b9e5f80 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -111,11 +111,19 @@ char *spapr_get_cpu_core_type(const char *model) =20 static void spapr_core_release(DeviceState *dev, void *opaque) { + sPAPRMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); + CPUCore *cc =3D CPU_CORE(dev); + + spapr->cores[cc->core_id / smp_threads] =3D NULL; + object_unparent(OBJECT(dev)); +} + +static void spapr_cpu_core_unrealizefn(DeviceState *dev, Error **errp) +{ sPAPRCPUCore *sc =3D SPAPR_CPU_CORE(OBJECT(dev)); sPAPRCPUCoreClass *scc =3D SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev)); const char *typename =3D object_class_get_name(scc->cpu_class); size_t size =3D object_type_get_instance_size(typename); - sPAPRMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); CPUCore *cc =3D CPU_CORE(dev); int i; =20 @@ -129,11 +137,7 @@ static void spapr_core_release(DeviceState *dev, void = *opaque) cpu_remove_sync(cs); object_unparent(obj); } - - spapr->cores[cc->core_id / smp_threads] =3D NULL; - g_free(sc->threads); - object_unparent(OBJECT(dev)); } =20 void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *dev, @@ -368,6 +372,7 @@ void spapr_cpu_core_class_init(ObjectClass *oc, void *d= ata) sPAPRCPUCoreClass *scc =3D SPAPR_CPU_CORE_CLASS(oc); =20 dc->realize =3D spapr_cpu_core_realize; + dc->unrealize =3D spapr_cpu_core_unrealizefn; scc->cpu_class =3D cpu_class_by_name(TYPE_POWERPC_CPU, data); g_assert(scc->cpu_class); } --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487745871811988.935784118787; Tue, 21 Feb 2017 22:44:31 -0800 (PST) Received: from localhost ([::1]:50165 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQf8-0004mu-C3 for importer@patchew.org; Wed, 22 Feb 2017 01:44:30 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37511) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV0-0002wu-3F for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQUx-0007pN-52 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:02 -0500 Received: from ozlabs.org ([103.22.144.67]:56499) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQUw-0007nE-Hk; Wed, 22 Feb 2017 01:33:59 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndG3YGkz9s7d; Wed, 22 Feb 2017 17:33:54 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745234; bh=/yrLDJBF62KfQpCsXKJoyvT8ezaUjpGShYRsMkrKLsM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DKOXUogLlMP1h61+kF3tCWo9NMigUJe8imOVbsbxm9LefG0etnWRTxAhsNz9GzTQ+ jicmPRmJqgGavwLyy487KcaEMRRk4nes8fjnw8UM4ysHv5s5sJs7b46oC1DR7uKfct EyWKtUT7x4WFWI1Z/rneibzB/OzefteR9i2719pE= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:07 +1100 Message-Id: <20170222063348.32176-3-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 02/43] spapr: move spapr_core_[foo]plug() callbacks close to machine code in spapr.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov spapr_core_pre_plug/spapr_core_plug/spapr_core_unplug() are managing wiring CPU core into spapr machine state and not internal CPU core state. So move them from spapr_cpu_core.c to spapr.c where other similar (spapr_memory_[foo]plug()) callbacks are located, which also matches x86 target practice. Signed-off-by: Igor Mammedov Signed-off-by: David Gibson --- hw/ppc/spapr.c | 138 ++++++++++++++++++++++++++++++++++++= ++++ hw/ppc/spapr_cpu_core.c | 138 ------------------------------------= ---- include/hw/ppc/spapr_cpu_core.h | 6 -- 3 files changed, 138 insertions(+), 144 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index e465d7a..8c2efd8 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2488,6 +2488,144 @@ void *spapr_populate_hotplug_cpu_dt(CPUState *cs, i= nt *fdt_offset, return fdt; } =20 +static void spapr_core_release(DeviceState *dev, void *opaque) +{ + sPAPRMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); + CPUCore *cc =3D CPU_CORE(dev); + + spapr->cores[cc->core_id / smp_threads] =3D NULL; + object_unparent(OBJECT(dev)); +} + +static void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *de= v, + Error **errp) +{ + CPUCore *cc =3D CPU_CORE(dev); + int smt =3D kvmppc_smt_threads(); + int index =3D cc->core_id / smp_threads; + sPAPRDRConnector *drc =3D + spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * smt); + sPAPRDRConnectorClass *drck; + Error *local_err =3D NULL; + + if (index =3D=3D 0) { + error_setg(errp, "Boot CPU core may not be unplugged"); + return; + } + + g_assert(drc); + + drck =3D SPAPR_DR_CONNECTOR_GET_CLASS(drc); + drck->detach(drc, dev, spapr_core_release, NULL, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + spapr_hotplug_req_remove_by_index(drc); +} + +static void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev, + Error **errp) +{ + sPAPRMachineState *spapr =3D SPAPR_MACHINE(OBJECT(hotplug_dev)); + MachineClass *mc =3D MACHINE_GET_CLASS(spapr); + sPAPRCPUCore *core =3D SPAPR_CPU_CORE(OBJECT(dev)); + CPUCore *cc =3D CPU_CORE(dev); + CPUState *cs =3D CPU(core->threads); + sPAPRDRConnector *drc; + Error *local_err =3D NULL; + void *fdt =3D NULL; + int fdt_offset =3D 0; + int index =3D cc->core_id / smp_threads; + int smt =3D kvmppc_smt_threads(); + + drc =3D spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * = smt); + spapr->cores[index] =3D OBJECT(dev); + + g_assert(drc || !mc->query_hotpluggable_cpus); + + /* + * Setup CPU DT entries only for hotplugged CPUs. For boot time or + * coldplugged CPUs DT entries are setup in spapr_build_fdt(). + */ + if (dev->hotplugged) { + fdt =3D spapr_populate_hotplug_cpu_dt(cs, &fdt_offset, spapr); + } + + if (drc) { + sPAPRDRConnectorClass *drck =3D SPAPR_DR_CONNECTOR_GET_CLASS(drc); + drck->attach(drc, dev, fdt, fdt_offset, !dev->hotplugged, &local_e= rr); + if (local_err) { + g_free(fdt); + spapr->cores[index] =3D NULL; + error_propagate(errp, local_err); + return; + } + } + + if (dev->hotplugged) { + /* + * Send hotplug notification interrupt to the guest only in case + * of hotplugged CPUs. + */ + spapr_hotplug_req_add_by_index(drc); + } else { + /* + * Set the right DRC states for cold plugged CPU. + */ + if (drc) { + sPAPRDRConnectorClass *drck =3D SPAPR_DR_CONNECTOR_GET_CLASS(d= rc); + drck->set_allocation_state(drc, SPAPR_DR_ALLOCATION_STATE_USAB= LE); + drck->set_isolation_state(drc, SPAPR_DR_ISOLATION_STATE_UNISOL= ATED); + } + } +} + +static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *= dev, + Error **errp) +{ + MachineState *machine =3D MACHINE(OBJECT(hotplug_dev)); + MachineClass *mc =3D MACHINE_GET_CLASS(hotplug_dev); + sPAPRMachineState *spapr =3D SPAPR_MACHINE(OBJECT(hotplug_dev)); + int spapr_max_cores =3D max_cpus / smp_threads; + int index; + Error *local_err =3D NULL; + CPUCore *cc =3D CPU_CORE(dev); + char *base_core_type =3D spapr_get_cpu_core_type(machine->cpu_model); + const char *type =3D object_get_typename(OBJECT(dev)); + + if (dev->hotplugged && !mc->query_hotpluggable_cpus) { + error_setg(&local_err, "CPU hotplug not supported for this machine= "); + goto out; + } + + if (strcmp(base_core_type, type)) { + error_setg(&local_err, "CPU core type should be %s", base_core_typ= e); + goto out; + } + + if (cc->core_id % smp_threads) { + error_setg(&local_err, "invalid core id %d", cc->core_id); + goto out; + } + + index =3D cc->core_id / smp_threads; + if (index < 0 || index >=3D spapr_max_cores) { + error_setg(&local_err, "core id %d out of range", cc->core_id); + goto out; + } + + if (spapr->cores[index]) { + error_setg(&local_err, "core %d already populated", cc->core_id); + goto out; + } + +out: + g_free(base_core_type); + error_propagate(errp, local_err); +} + static void spapr_machine_device_plug(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index b9e5f80..55cd045 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -109,15 +109,6 @@ char *spapr_get_cpu_core_type(const char *model) return core_type; } =20 -static void spapr_core_release(DeviceState *dev, void *opaque) -{ - sPAPRMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); - CPUCore *cc =3D CPU_CORE(dev); - - spapr->cores[cc->core_id / smp_threads] =3D NULL; - object_unparent(OBJECT(dev)); -} - static void spapr_cpu_core_unrealizefn(DeviceState *dev, Error **errp) { sPAPRCPUCore *sc =3D SPAPR_CPU_CORE(OBJECT(dev)); @@ -140,135 +131,6 @@ static void spapr_cpu_core_unrealizefn(DeviceState *d= ev, Error **errp) g_free(sc->threads); } =20 -void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *dev, - Error **errp) -{ - CPUCore *cc =3D CPU_CORE(dev); - int smt =3D kvmppc_smt_threads(); - int index =3D cc->core_id / smp_threads; - sPAPRDRConnector *drc =3D - spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * smt); - sPAPRDRConnectorClass *drck; - Error *local_err =3D NULL; - - if (index =3D=3D 0) { - error_setg(errp, "Boot CPU core may not be unplugged"); - return; - } - - g_assert(drc); - - drck =3D SPAPR_DR_CONNECTOR_GET_CLASS(drc); - drck->detach(drc, dev, spapr_core_release, NULL, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } - - spapr_hotplug_req_remove_by_index(drc); -} - -void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev, - Error **errp) -{ - sPAPRMachineState *spapr =3D SPAPR_MACHINE(OBJECT(hotplug_dev)); - MachineClass *mc =3D MACHINE_GET_CLASS(spapr); - sPAPRCPUCore *core =3D SPAPR_CPU_CORE(OBJECT(dev)); - CPUCore *cc =3D CPU_CORE(dev); - CPUState *cs =3D CPU(core->threads); - sPAPRDRConnector *drc; - Error *local_err =3D NULL; - void *fdt =3D NULL; - int fdt_offset =3D 0; - int index =3D cc->core_id / smp_threads; - int smt =3D kvmppc_smt_threads(); - - drc =3D spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * = smt); - spapr->cores[index] =3D OBJECT(dev); - - g_assert(drc || !mc->query_hotpluggable_cpus); - - /* - * Setup CPU DT entries only for hotplugged CPUs. For boot time or - * coldplugged CPUs DT entries are setup in spapr_build_fdt(). - */ - if (dev->hotplugged) { - fdt =3D spapr_populate_hotplug_cpu_dt(cs, &fdt_offset, spapr); - } - - if (drc) { - sPAPRDRConnectorClass *drck =3D SPAPR_DR_CONNECTOR_GET_CLASS(drc); - drck->attach(drc, dev, fdt, fdt_offset, !dev->hotplugged, &local_e= rr); - if (local_err) { - g_free(fdt); - spapr->cores[index] =3D NULL; - error_propagate(errp, local_err); - return; - } - } - - if (dev->hotplugged) { - /* - * Send hotplug notification interrupt to the guest only in case - * of hotplugged CPUs. - */ - spapr_hotplug_req_add_by_index(drc); - } else { - /* - * Set the right DRC states for cold plugged CPU. - */ - if (drc) { - sPAPRDRConnectorClass *drck =3D SPAPR_DR_CONNECTOR_GET_CLASS(d= rc); - drck->set_allocation_state(drc, SPAPR_DR_ALLOCATION_STATE_USAB= LE); - drck->set_isolation_state(drc, SPAPR_DR_ISOLATION_STATE_UNISOL= ATED); - } - } -} - -void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, - Error **errp) -{ - MachineState *machine =3D MACHINE(OBJECT(hotplug_dev)); - MachineClass *mc =3D MACHINE_GET_CLASS(hotplug_dev); - sPAPRMachineState *spapr =3D SPAPR_MACHINE(OBJECT(hotplug_dev)); - int spapr_max_cores =3D max_cpus / smp_threads; - int index; - Error *local_err =3D NULL; - CPUCore *cc =3D CPU_CORE(dev); - char *base_core_type =3D spapr_get_cpu_core_type(machine->cpu_model); - const char *type =3D object_get_typename(OBJECT(dev)); - - if (dev->hotplugged && !mc->query_hotpluggable_cpus) { - error_setg(&local_err, "CPU hotplug not supported for this machine= "); - goto out; - } - - if (strcmp(base_core_type, type)) { - error_setg(&local_err, "CPU core type should be %s", base_core_typ= e); - goto out; - } - - if (cc->core_id % smp_threads) { - error_setg(&local_err, "invalid core id %d", cc->core_id); - goto out; - } - - index =3D cc->core_id / smp_threads; - if (index < 0 || index >=3D spapr_max_cores) { - error_setg(&local_err, "core id %d out of range", cc->core_id); - goto out; - } - - if (spapr->cores[index]) { - error_setg(&local_err, "core %d already populated", cc->core_id); - goto out; - } - -out: - g_free(base_core_type); - error_propagate(errp, local_err); -} - static void spapr_cpu_core_realize_child(Object *child, Error **errp) { Error *local_err =3D NULL; diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_cor= e.h index 50292f4..3c35665 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -34,12 +34,6 @@ typedef struct sPAPRCPUCoreClass { ObjectClass *cpu_class; } sPAPRCPUCoreClass; =20 -void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, - Error **errp); char *spapr_get_cpu_core_type(const char *model); -void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev, - Error **errp); -void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *dev, - Error **errp); void spapr_cpu_core_class_init(ObjectClass *oc, void *data); #endif --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487745367443310.34781843886606; Tue, 21 Feb 2017 22:36:07 -0800 (PST) Received: from localhost ([::1]:50126 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQX0-0004Tg-3z for importer@patchew.org; Wed, 22 Feb 2017 01:36:06 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37512) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV0-0002wv-3g for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQUx-0007os-1P for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:02 -0500 Received: from ozlabs.org ([103.22.144.67]:34287) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQUw-0007nI-Ks; Wed, 22 Feb 2017 01:33:58 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndG5FkYz9s7g; Wed, 22 Feb 2017 17:33:54 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745234; bh=02vfp9zMjVVNBKVk6ufayEMr2VJilTxE3FAMBVXWWMI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jCwV2PZ9PpXelzCJmPukp6G5lYmQSECC/Gd3ZotNnpd6ENTSScX0l5E0hKJuNKNAE +4TD1GHUAWYcg4lFBNRRYP4ee9M+bojOmajeKREGuYzQUESl5vOcrYJQ7PIpogt7yc JDuM2pGn9wYe0JIV/xGZKLma4Km8ni/QwKIVcLX8= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:08 +1100 Message-Id: <20170222063348.32176-4-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 03/43] spapr: make cpu core unplug follow expected hotunplug call flow X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov spapr_core_unplug() were essentially spapr_core_unplug_request() handler that requested CPU removal and registered callback which did actual cpu core removali but it was called from spapr_machine_device_unplug() which is intended for actual object removal. Commit (cf632463 spapr: Memory hot-unplug support) sort of fixed it introducing spapr_machine_device_unplug_request() and calling spapr_core_unplug() but it hasn't renamed callback and by mistake calls it from spapr_machine_device_unplug(). However spapr_machine_device_unplug() isn't ever called for cpu core since spapr_core_release() doesn't follow expected hotunplug call flow which is: 1: device_del() -> hotplug_handler_unplug_request() -> set destroy_cb() 2: destroy_cb() -> hotplug_handler_unplug() -> object_unparent // actual device removal Fix it by renaming spapr_core_unplug() to spapr_core_unplug_request() which is called from spapr_machine_device_unplug_request() and making spapr_core_release() call hotplug_handler_unplug() which will call spapr_machine_device_unplug() -> spapr_core_unplug() to remove cpu core. Signed-off-by: Igor Mammedov Reveiwed-by: Bharata B Rao Signed-off-by: David Gibson --- hw/ppc/spapr.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 8c2efd8..37cb338 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2488,7 +2488,8 @@ void *spapr_populate_hotplug_cpu_dt(CPUState *cs, int= *fdt_offset, return fdt; } =20 -static void spapr_core_release(DeviceState *dev, void *opaque) +static void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *de= v, + Error **errp) { sPAPRMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); CPUCore *cc =3D CPU_CORE(dev); @@ -2497,8 +2498,17 @@ static void spapr_core_release(DeviceState *dev, voi= d *opaque) object_unparent(OBJECT(dev)); } =20 -static void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *de= v, - Error **errp) +static void spapr_core_release(DeviceState *dev, void *opaque) +{ + HotplugHandler *hotplug_ctrl; + + hotplug_ctrl =3D qdev_get_hotplug_handler(dev); + hotplug_handler_unplug(hotplug_ctrl, dev, &error_abort); +} + +static +void spapr_core_unplug_request(HotplugHandler *hotplug_dev, DeviceState *d= ev, + Error **errp) { CPUCore *cc =3D CPU_CORE(dev); int smt =3D kvmppc_smt_threads(); @@ -2719,7 +2729,7 @@ static void spapr_machine_device_unplug_request(Hotpl= ugHandler *hotplug_dev, error_setg(errp, "CPU hot unplug not supported on this machine= "); return; } - spapr_core_unplug(hotplug_dev, dev, errp); + spapr_core_unplug_request(hotplug_dev, dev, errp); } } =20 --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487746638755817.1069445637025; Tue, 21 Feb 2017 22:57:18 -0800 (PST) Received: from localhost ([::1]:50243 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQrV-0008I5-8F for importer@patchew.org; Wed, 22 Feb 2017 01:57:17 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37675) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV3-0002yV-Qr for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV0-0007wc-Q9 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:05 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:52421) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV0-0007qF-B8; Wed, 22 Feb 2017 01:34:02 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndH0bMCz9s83; Wed, 22 Feb 2017 17:33:54 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745235; bh=2ULJSjarPD9dit20lRF7l2gk+fIqx5WztMe/WraaFOQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Q3a5rUDEdOCUCKwkcDTGZAYTRkKLXyH5GsCaHrIYu+vtbsgiS8wlYv0+6n1EeCr6S v6vbBVu23QyDQK0DM3x0dfRm2Cyc6yiItzv+COB3UQRiFsb0qGRfodk9TvyB5OgF+F W3J1OoWYmzr5EQjXTIcH/iLIjfNVTYzKghMS8SAc= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:09 +1100 Message-Id: <20170222063348.32176-5-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 04/43] ppc: implement xsrqpi[x] instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, Jose Ricardo Ziviani , mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Jose Ricardo Ziviani xsrqpi[x]: VSX Scalar Round to Quad-Precision Integer [with Inexact]. Signed-off-by: Jose Ricardo Ziviani Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 59 +++++++++++++++++++++++++++++++++= ++++ target/ppc/helper.h | 1 + target/ppc/internal.h | 1 + target/ppc/translate/vsx-impl.inc.c | 2 ++ target/ppc/translate/vsx-ops.inc.c | 12 ++++++++ 5 files changed, 75 insertions(+) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 9f5cafd..1ca384c 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -3277,3 +3277,62 @@ void helper_xststdcsp(CPUPPCState *env, uint32_t opc= ode) env->fpscr |=3D cc << FPSCR_FPRF; env->crf[BF(opcode)] =3D cc; } + +void helper_xsrqpi(CPUPPCState *env, uint32_t opcode) +{ + ppc_vsr_t xb; + ppc_vsr_t xt; + uint8_t r =3D Rrm(opcode); + uint8_t ex =3D Rc(opcode); + uint8_t rmc =3D RMC(opcode); + uint8_t rmode =3D 0; + float_status tstat; + + getVSR(rB(opcode) + 32, &xb, env); + memset(&xt, 0, sizeof(xt)); + helper_reset_fpstatus(env); + + if (r =3D=3D 0 && rmc =3D=3D 0) { + rmode =3D float_round_ties_away; + } else if (r =3D=3D 0 && rmc =3D=3D 0x3) { + rmode =3D fpscr_rn; + } else if (r =3D=3D 1) { + switch (rmc) { + case 0: + rmode =3D float_round_nearest_even; + break; + case 1: + rmode =3D float_round_to_zero; + break; + case 2: + rmode =3D float_round_up; + break; + case 3: + rmode =3D float_round_down; + break; + default: + abort(); + } + } + + tstat =3D env->fp_status; + set_float_exception_flags(0, &tstat); + set_float_rounding_mode(rmode, &tstat); + xt.f128 =3D float128_round_to_int(xb.f128, &tstat); + env->fp_status.float_exception_flags |=3D tstat.float_exception_flags; + + if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { + if (float128_is_signaling_nan(xb.f128, &tstat)) { + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); + xt.f128 =3D float128_snan_to_qnan(xt.f128); + } + } + + if (ex =3D=3D 0 && (tstat.float_exception_flags & float_flag_inexact))= { + env->fp_status.float_exception_flags &=3D ~float_flag_inexact; + } + + helper_compute_fprf_float128(env, xt.f128); + float_check_status(env); + putVSR(rD(opcode) + 32, &xt, env); +} diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 85af9df..6a53ae0 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -459,6 +459,7 @@ DEF_HELPER_2(xsrdpic, void, env, i32) DEF_HELPER_2(xsrdpim, void, env, i32) DEF_HELPER_2(xsrdpip, void, env, i32) DEF_HELPER_2(xsrdpiz, void, env, i32) +DEF_HELPER_2(xsrqpi, void, env, i32) =20 DEF_HELPER_2(xsaddsp, void, env, i32) DEF_HELPER_2(xssubsp, void, env, i32) diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 5a2fd68..5b5b180 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -186,6 +186,7 @@ EXTRACT_HELPER(DCM, 10, 6) =20 /* DFP Z23-form */ EXTRACT_HELPER(RMC, 9, 2) +EXTRACT_HELPER(Rrm, 16, 1) =20 EXTRACT_HELPER_SPLIT(DQxT, 3, 1, 21, 5); EXTRACT_HELPER_SPLIT(xT, 0, 1, 21, 5); diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx= -impl.inc.c index a44c003..9868f01 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -833,6 +833,8 @@ GEN_VSX_HELPER_2(xsrdpip, 0x12, 0x06, 0, PPC2_VSX) GEN_VSX_HELPER_2(xsrdpiz, 0x12, 0x05, 0, PPC2_VSX) GEN_VSX_HELPER_XT_XB_ENV(xsrsp, 0x12, 0x11, 0, PPC2_VSX207) =20 +GEN_VSX_HELPER_2(xsrqpi, 0x05, 0x00, 0, PPC2_ISA300) + GEN_VSX_HELPER_2(xsaddsp, 0x00, 0x00, 0, PPC2_VSX207) GEN_VSX_HELPER_2(xssubsp, 0x00, 0x01, 0, PPC2_VSX207) GEN_VSX_HELPER_2(xsmulsp, 0x00, 0x02, 0, PPC2_VSX207) diff --git a/target/ppc/translate/vsx-ops.inc.c b/target/ppc/translate/vsx-= ops.inc.c index 7dc9f6f..b095508 100644 --- a/target/ppc/translate/vsx-ops.inc.c +++ b/target/ppc/translate/vsx-ops.inc.c @@ -103,6 +103,18 @@ GEN_HANDLER_E(name, 0x3F, opc2, opc3, inval, PPC_NONE,= PPC2_ISA300) #define GEN_VSX_XFORM_300_EO(name, opc2, opc3, opc4, inval) \ GEN_HANDLER_E_2(name, 0x3F, opc2, opc3, opc4, inval, PPC_NONE, PPC2_ISA300) =20 +#define GEN_VSX_Z23FORM_300(name, opc2, opc3, opc4, inval) \ +GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x00, opc4 | 0x0, inval), \ +GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x08, opc4 | 0x0, inval), \ +GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x10, opc4 | 0x0, inval), \ +GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x18, opc4 | 0x0, inval), \ +GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x00, opc4 | 0x1, inval), \ +GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x08, opc4 | 0x1, inval), \ +GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x10, opc4 | 0x1, inval), \ +GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x18, opc4 | 0x1, inval) + +GEN_VSX_Z23FORM_300(xsrqpi, 0x05, 0x0, 0x0, 0x0), + GEN_XX2FORM(xsabsdp, 0x12, 0x15, PPC2_VSX), GEN_XX2FORM(xsnabsdp, 0x12, 0x16, PPC2_VSX), GEN_XX2FORM(xsnegdp, 0x12, 0x17, PPC2_VSX), --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487745620131842.7415830128156; Tue, 21 Feb 2017 22:40:20 -0800 (PST) Received: from localhost ([::1]:50144 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQb4-0000O1-SC for importer@patchew.org; Wed, 22 Feb 2017 01:40:18 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37546) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV0-0002wy-Vm for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQUz-0007ta-E1 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:02 -0500 Received: from ozlabs.org ([103.22.144.67]:36837) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQUz-0007pq-3Q; Wed, 22 Feb 2017 01:34:01 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndG72LXz9s8G; Wed, 22 Feb 2017 17:33:54 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745234; bh=2T3tYoLndJDDJGOnqi921Fuwlb3lD679VZJMpAYjXjc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eOgTU/ucFpa1BecCWBFAJgkkM+a2hFgyHXc0+30QsxsWsJ2/Ebw1tDAVmy/qmjrgD EvT09A8AN47aSSmICHnTWA7HZRjqAp4WpZAf0tWJ8VuoDCeWe9MjV1eC1FOYD3JTkS /8Lb94C9iLCIrocwqdWjDNOjtu2DObPprvm+I7NY= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:10 +1100 Message-Id: <20170222063348.32176-6-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 05/43] ppc: implement xsrqpxp instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, Jose Ricardo Ziviani , mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Jose Ricardo Ziviani xsrqpxp: VSX Scalar Round Quad-Precision to Double-Extended Precision. Signed-off-by: Jose Ricardo Ziviani Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 56 +++++++++++++++++++++++++++++++++= ++++ target/ppc/helper.h | 1 + target/ppc/translate/vsx-impl.inc.c | 1 + target/ppc/translate/vsx-ops.inc.c | 1 + 4 files changed, 59 insertions(+) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 1ca384c..b422442 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -3336,3 +3336,59 @@ void helper_xsrqpi(CPUPPCState *env, uint32_t opcode) float_check_status(env); putVSR(rD(opcode) + 32, &xt, env); } + +void helper_xsrqpxp(CPUPPCState *env, uint32_t opcode) +{ + ppc_vsr_t xb; + ppc_vsr_t xt; + uint8_t r =3D Rrm(opcode); + uint8_t rmc =3D RMC(opcode); + uint8_t rmode =3D 0; + floatx80 round_res; + float_status tstat; + + getVSR(rB(opcode) + 32, &xb, env); + memset(&xt, 0, sizeof(xt)); + helper_reset_fpstatus(env); + + if (r =3D=3D 0 && rmc =3D=3D 0) { + rmode =3D float_round_ties_away; + } else if (r =3D=3D 0 && rmc =3D=3D 0x3) { + rmode =3D fpscr_rn; + } else if (r =3D=3D 1) { + switch (rmc) { + case 0: + rmode =3D float_round_nearest_even; + break; + case 1: + rmode =3D float_round_to_zero; + break; + case 2: + rmode =3D float_round_up; + break; + case 3: + rmode =3D float_round_down; + break; + default: + abort(); + } + } + + tstat =3D env->fp_status; + set_float_exception_flags(0, &tstat); + set_float_rounding_mode(rmode, &tstat); + round_res =3D float128_to_floatx80(xb.f128, &tstat); + xt.f128 =3D floatx80_to_float128(round_res, &tstat); + env->fp_status.float_exception_flags |=3D tstat.float_exception_flags; + + if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { + if (float128_is_signaling_nan(xb.f128, &tstat)) { + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); + xt.f128 =3D float128_snan_to_qnan(xt.f128); + } + } + + helper_compute_fprf_float128(env, xt.f128); + putVSR(rD(opcode) + 32, &xt, env); + float_check_status(env); +} diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 6a53ae0..9ce2e58 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -460,6 +460,7 @@ DEF_HELPER_2(xsrdpim, void, env, i32) DEF_HELPER_2(xsrdpip, void, env, i32) DEF_HELPER_2(xsrdpiz, void, env, i32) DEF_HELPER_2(xsrqpi, void, env, i32) +DEF_HELPER_2(xsrqpxp, void, env, i32) =20 DEF_HELPER_2(xsaddsp, void, env, i32) DEF_HELPER_2(xssubsp, void, env, i32) diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx= -impl.inc.c index 9868f01..91be201 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -834,6 +834,7 @@ GEN_VSX_HELPER_2(xsrdpiz, 0x12, 0x05, 0, PPC2_VSX) GEN_VSX_HELPER_XT_XB_ENV(xsrsp, 0x12, 0x11, 0, PPC2_VSX207) =20 GEN_VSX_HELPER_2(xsrqpi, 0x05, 0x00, 0, PPC2_ISA300) +GEN_VSX_HELPER_2(xsrqpxp, 0x05, 0x01, 0, PPC2_ISA300) =20 GEN_VSX_HELPER_2(xsaddsp, 0x00, 0x00, 0, PPC2_VSX207) GEN_VSX_HELPER_2(xssubsp, 0x00, 0x01, 0, PPC2_VSX207) diff --git a/target/ppc/translate/vsx-ops.inc.c b/target/ppc/translate/vsx-= ops.inc.c index b095508..e58740b 100644 --- a/target/ppc/translate/vsx-ops.inc.c +++ b/target/ppc/translate/vsx-ops.inc.c @@ -114,6 +114,7 @@ GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x10, opc4 | 0x= 1, inval), \ GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x18, opc4 | 0x1, inval) =20 GEN_VSX_Z23FORM_300(xsrqpi, 0x05, 0x0, 0x0, 0x0), +GEN_VSX_Z23FORM_300(xsrqpxp, 0x05, 0x1, 0x0, 0x0), =20 GEN_XX2FORM(xsabsdp, 0x12, 0x15, PPC2_VSX), GEN_XX2FORM(xsnabsdp, 0x12, 0x16, PPC2_VSX), --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Wed, 22 Feb 2017 01:34:02 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndG5rXZz9s7p; Wed, 22 Feb 2017 17:33:54 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745234; bh=v6OKEQkuDBv71g4dsU9JYYpPZbKNMzmsRF8U5jp+/wg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FN9EueXWxaO1q5pswdYgxgnBTp/vJqXDZfd7vnrC34aiy9vTENIBTBV3mLmz+50Y2 227cGuT/t0V2F/MpfeFjf+6B9OYPtlzxxMKzGUoBnVGXa4JHClDR+eWAomxEbgyFPM KUOQAf0kf1TcXP4VMeDXCMjWJ8yiduFSTQK1iV3A= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:11 +1100 Message-Id: <20170222063348.32176-7-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 06/43] ppc: implement xssqrtqp instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, Jose Ricardo Ziviani , mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Jose Ricardo Ziviani xssqrtqp: VSX Scalar Square Root Quad-Precision. Signed-off-by: Jose Ricardo Ziviani Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 38 +++++++++++++++++++++++++++++++++= ++++ target/ppc/helper.h | 1 + target/ppc/translate/vsx-impl.inc.c | 1 + target/ppc/translate/vsx-ops.inc.c | 1 + 4 files changed, 41 insertions(+) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index b422442..5c34438 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -3392,3 +3392,41 @@ void helper_xsrqpxp(CPUPPCState *env, uint32_t opcod= e) putVSR(rD(opcode) + 32, &xt, env); float_check_status(env); } + +void helper_xssqrtqp(CPUPPCState *env, uint32_t opcode) +{ + ppc_vsr_t xb; + ppc_vsr_t xt; + float_status tstat; + + getVSR(rB(opcode) + 32, &xb, env); + memset(&xt, 0, sizeof(xt)); + helper_reset_fpstatus(env); + + if (unlikely(Rc(opcode) !=3D 0)) { + /* TODO: Support xsadddpo after round-to-odd is implemented */ + abort(); + } + + tstat =3D env->fp_status; + set_float_exception_flags(0, &tstat); + xt.f128 =3D float128_sqrt(xb.f128, &tstat); + env->fp_status.float_exception_flags |=3D tstat.float_exception_flags; + + if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { + if (float128_is_signaling_nan(xb.f128, &tstat)) { + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); + xt.f128 =3D float128_snan_to_qnan(xb.f128); + } else if (float128_is_quiet_nan(xb.f128, &tstat)) { + xt.f128 =3D xb.f128; + } else if (float128_is_neg(xb.f128) && !float128_is_zero(xb.f128))= { + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, 1); + set_snan_bit_is_one(0, &env->fp_status); + xt.f128 =3D float128_default_nan(&env->fp_status); + } + } + + helper_compute_fprf_float128(env, xt.f128); + putVSR(rD(opcode) + 32, &xt, env); + float_check_status(env); +} diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 9ce2e58..fbf80a7 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -461,6 +461,7 @@ DEF_HELPER_2(xsrdpip, void, env, i32) DEF_HELPER_2(xsrdpiz, void, env, i32) DEF_HELPER_2(xsrqpi, void, env, i32) DEF_HELPER_2(xsrqpxp, void, env, i32) +DEF_HELPER_2(xssqrtqp, void, env, i32) =20 DEF_HELPER_2(xsaddsp, void, env, i32) DEF_HELPER_2(xssubsp, void, env, i32) diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx= -impl.inc.c index 91be201..bbd7d1a 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -835,6 +835,7 @@ GEN_VSX_HELPER_XT_XB_ENV(xsrsp, 0x12, 0x11, 0, PPC2_VSX= 207) =20 GEN_VSX_HELPER_2(xsrqpi, 0x05, 0x00, 0, PPC2_ISA300) GEN_VSX_HELPER_2(xsrqpxp, 0x05, 0x01, 0, PPC2_ISA300) +GEN_VSX_HELPER_2(xssqrtqp, 0x04, 0x19, 0x1B, PPC2_ISA300) =20 GEN_VSX_HELPER_2(xsaddsp, 0x00, 0x00, 0, PPC2_VSX207) GEN_VSX_HELPER_2(xssubsp, 0x00, 0x01, 0, PPC2_VSX207) diff --git a/target/ppc/translate/vsx-ops.inc.c b/target/ppc/translate/vsx-= ops.inc.c index e58740b..bac3db2 100644 --- a/target/ppc/translate/vsx-ops.inc.c +++ b/target/ppc/translate/vsx-ops.inc.c @@ -115,6 +115,7 @@ GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x18, opc4 | 0x= 1, inval) =20 GEN_VSX_Z23FORM_300(xsrqpi, 0x05, 0x0, 0x0, 0x0), GEN_VSX_Z23FORM_300(xsrqpxp, 0x05, 0x1, 0x0, 0x0), +GEN_VSX_XFORM_300_EO(xssqrtqp, 0x04, 0x19, 0x1B, 0x00000001), =20 GEN_XX2FORM(xsabsdp, 0x12, 0x15, PPC2_VSX), GEN_XX2FORM(xsnabsdp, 0x12, 0x16, PPC2_VSX), --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487745620352510.03137977496397; Tue, 21 Feb 2017 22:40:20 -0800 (PST) Received: from localhost ([::1]:50143 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQb3-0000NI-SG for importer@patchew.org; Wed, 22 Feb 2017 01:40:17 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37559) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV1-0002x0-59 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQUz-0007uK-LX for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:03 -0500 Received: from ozlabs.org ([103.22.144.67]:39909) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQUz-0007q6-AQ; Wed, 22 Feb 2017 01:34:01 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndH19Vvz9s7s; Wed, 22 Feb 2017 17:33:54 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745235; bh=M2ePWdMx77uMVCV9gM7+x/q27sB1VwpbOgRlvKVpfH8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Wl6/rj0CP6Yj6GNHdUDjeCSqYPmTWQ4jUyFMyHRtr28xpWMpprMdVTM/RkY13/mjY D8x5XDw2NGj0q/PUuuhC3FIMF5Huf2kxtKu/rSW0B+zOndYXkMazgMUrC+evE6VYCK USJ7UGkC87y+yp0JS7qYbs6+azg7ykX5WZBdrvts= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:12 +1100 Message-Id: <20170222063348.32176-8-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 07/43] ppc: implement xssubqp instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, Jose Ricardo Ziviani , mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Jose Ricardo Ziviani xssubqp: VSX Scalar Subtract Quad-Precision. Signed-off-by: Jose Ricardo Ziviani Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 34 ++++++++++++++++++++++++++++++++++ target/ppc/helper.h | 1 + target/ppc/translate/vsx-impl.inc.c | 1 + target/ppc/translate/vsx-ops.inc.c | 1 + 4 files changed, 37 insertions(+) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 5c34438..48973a9 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -3430,3 +3430,37 @@ void helper_xssqrtqp(CPUPPCState *env, uint32_t opco= de) putVSR(rD(opcode) + 32, &xt, env); float_check_status(env); } + +void helper_xssubqp(CPUPPCState *env, uint32_t opcode) +{ + ppc_vsr_t xt, xa, xb; + float_status tstat; + + getVSR(rA(opcode) + 32, &xa, env); + getVSR(rB(opcode) + 32, &xb, env); + getVSR(rD(opcode) + 32, &xt, env); + helper_reset_fpstatus(env); + + if (unlikely(Rc(opcode) !=3D 0)) { + /* TODO: Support xssubqp after round-to-odd is implemented */ + abort(); + } + + tstat =3D env->fp_status; + set_float_exception_flags(0, &tstat); + xt.f128 =3D float128_sub(xa.f128, xb.f128, &tstat); + env->fp_status.float_exception_flags |=3D tstat.float_exception_flags; + + if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { + if (float128_is_infinity(xa.f128) && float128_is_infinity(xb.f128)= ) { + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1); + } else if (float128_is_signaling_nan(xa.f128, &tstat) || + float128_is_signaling_nan(xb.f128, &tstat)) { + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); + } + } + + helper_compute_fprf_float128(env, xt.f128); + putVSR(rD(opcode) + 32, &xt, env); + float_check_status(env); +} diff --git a/target/ppc/helper.h b/target/ppc/helper.h index fbf80a7..3956fd1 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -462,6 +462,7 @@ DEF_HELPER_2(xsrdpiz, void, env, i32) DEF_HELPER_2(xsrqpi, void, env, i32) DEF_HELPER_2(xsrqpxp, void, env, i32) DEF_HELPER_2(xssqrtqp, void, env, i32) +DEF_HELPER_2(xssubqp, void, env, i32) =20 DEF_HELPER_2(xsaddsp, void, env, i32) DEF_HELPER_2(xssubsp, void, env, i32) diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx= -impl.inc.c index bbd7d1a..a062203 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -836,6 +836,7 @@ GEN_VSX_HELPER_XT_XB_ENV(xsrsp, 0x12, 0x11, 0, PPC2_VSX= 207) GEN_VSX_HELPER_2(xsrqpi, 0x05, 0x00, 0, PPC2_ISA300) GEN_VSX_HELPER_2(xsrqpxp, 0x05, 0x01, 0, PPC2_ISA300) GEN_VSX_HELPER_2(xssqrtqp, 0x04, 0x19, 0x1B, PPC2_ISA300) +GEN_VSX_HELPER_2(xssubqp, 0x04, 0x10, 0, PPC2_ISA300) =20 GEN_VSX_HELPER_2(xsaddsp, 0x00, 0x00, 0, PPC2_VSX207) GEN_VSX_HELPER_2(xssubsp, 0x00, 0x01, 0, PPC2_VSX207) diff --git a/target/ppc/translate/vsx-ops.inc.c b/target/ppc/translate/vsx-= ops.inc.c index bac3db2..2202c0f 100644 --- a/target/ppc/translate/vsx-ops.inc.c +++ b/target/ppc/translate/vsx-ops.inc.c @@ -116,6 +116,7 @@ GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x18, opc4 | 0x= 1, inval) GEN_VSX_Z23FORM_300(xsrqpi, 0x05, 0x0, 0x0, 0x0), GEN_VSX_Z23FORM_300(xsrqpxp, 0x05, 0x1, 0x0, 0x0), GEN_VSX_XFORM_300_EO(xssqrtqp, 0x04, 0x19, 0x1B, 0x00000001), +GEN_VSX_XFORM_300(xssubqp, 0x04, 0x10, 0x0), =20 GEN_XX2FORM(xsabsdp, 0x12, 0x15, PPC2_VSX), GEN_XX2FORM(xsnabsdp, 0x12, 0x16, PPC2_VSX), --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 08/43] hw/ppc/pnv: Remove superfluous "qemu" prefix from error strings X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Thomas Huth error_report() already puts a prefix with the program name in front of the error strings, so the "qemu:" prefix is not necessary here anymore. Reported-by: Markus Armbruster Signed-off-by: Thomas Huth Signed-off-by: David Gibson --- hw/ppc/pnv.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 4fab5c0..09f0d22 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -381,7 +381,7 @@ static void ppc_powernv_init(MachineState *machine) =20 fw_size =3D load_image_targphys(fw_filename, FW_LOAD_ADDR, FW_MAX_SIZE= ); if (fw_size < 0) { - error_report("qemu: could not load OPAL '%s'", fw_filename); + error_report("Could not load OPAL '%s'", fw_filename); exit(1); } g_free(fw_filename); @@ -393,7 +393,7 @@ static void ppc_powernv_init(MachineState *machine) kernel_size =3D load_image_targphys(machine->kernel_filename, KERNEL_LOAD_ADDR, 0x2000000); if (kernel_size < 0) { - error_report("qemu: could not load kernel'%s'", + error_report("Could not load kernel '%s'", machine->kernel_filename); exit(1); } @@ -405,7 +405,7 @@ static void ppc_powernv_init(MachineState *machine) pnv->initrd_size =3D load_image_targphys(machine->initrd_filename, pnv->initrd_base, 0x10000000); /* 128MB = max */ if (pnv->initrd_size < 0) { - error_report("qemu: could not load initial ram disk '%s'", + error_report("Could not load initial ram disk '%s'", machine->initrd_filename); exit(1); } --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487746389827912.2453576655395; Tue, 21 Feb 2017 22:53:09 -0800 (PST) Received: from localhost ([::1]:50221 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQnU-0004Uq-Cw for importer@patchew.org; Wed, 22 Feb 2017 01:53:08 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37678) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV3-0002yc-U0 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV2-0007yA-5k for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:05 -0500 Received: from ozlabs.org ([103.22.144.67]:44207) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV1-0007uv-N2; Wed, 22 Feb 2017 01:34:04 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndH3zJHz9sD5; Wed, 22 Feb 2017 17:33:54 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745235; bh=QdS6LddL6GRCuSX+VTimuuri9+YNduJvvZYvHa9WXwY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=n/FgKDF16EMshFs89sBeK4VpFO59NeR2wC98jVI5R8u+BIRr+uhBTxe6w1oZ5UQCD Tk6OjT7XIH0AN41ii1+YszZgKSjQxXUyPfug3Y69wyBuJb55NpElaL34fgilMzYcH1 tpS26ur7yeErXxsw//R0OufWDRWW78DB9bV6MSQg= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:14 +1100 Message-Id: <20170222063348.32176-10-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 09/43] target-ppc: Add xsmaxcdp and xsmincdp instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, Nikunj A Dadhania , qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, Bharata B Rao , imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Bharata B Rao xsmaxcdp: VSX Scalar Maximum Type-C Double-Precision xsmincdp: VSX Scalar Minimum Type-C Double-Precision Signed-off-by: Bharata B Rao Signed-off-by: Nikunj A Dadhania Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 38 +++++++++++++++++++++++++++++++++= ++++ target/ppc/helper.h | 2 ++ target/ppc/translate/vsx-impl.inc.c | 2 ++ target/ppc/translate/vsx-ops.inc.c | 2 ++ 4 files changed, 44 insertions(+) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 48973a9..9d2688e 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -2679,6 +2679,44 @@ VSX_MAX_MIN(xsmindp, minnum, 1, float64, VsrD(0)) VSX_MAX_MIN(xvmindp, minnum, 2, float64, VsrD(i)) VSX_MAX_MIN(xvminsp, minnum, 4, float32, VsrW(i)) =20 +#define VSX_MAX_MINC(name, max) = \ +void helper_##name(CPUPPCState *env, uint32_t opcode) = \ +{ = \ + ppc_vsr_t xt, xa, xb; = \ + bool vxsnan_flag =3D false, vex_flag =3D false; = \ + = \ + getVSR(rA(opcode) + 32, &xa, env); = \ + getVSR(rB(opcode) + 32, &xb, env); = \ + getVSR(rD(opcode) + 32, &xt, env); = \ + = \ + if (unlikely(float64_is_any_nan(xa.VsrD(0)) || = \ + float64_is_any_nan(xb.VsrD(0)))) { = \ + if (float64_is_signaling_nan(xa.VsrD(0), &env->fp_status) || = \ + float64_is_signaling_nan(xb.VsrD(0), &env->fp_status)) { = \ + vxsnan_flag =3D true; = \ + } = \ + xt.VsrD(0) =3D xb.VsrD(0); = \ + } else if ((max && = \ + !float64_lt(xa.VsrD(0), xb.VsrD(0), &env->fp_status)) || = \ + (!max && = \ + float64_lt(xa.VsrD(0), xb.VsrD(0), &env->fp_status))) { = \ + xt.VsrD(0) =3D xa.VsrD(0); = \ + } else { = \ + xt.VsrD(0) =3D xb.VsrD(0); = \ + } = \ + = \ + vex_flag =3D fpscr_ve & vxsnan_flag; = \ + if (vxsnan_flag) { = \ + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); = \ + } = \ + if (!vex_flag) { = \ + putVSR(rD(opcode) + 32, &xt, env); = \ + } = \ +} = \ + +VSX_MAX_MINC(xsmaxcdp, 1); +VSX_MAX_MINC(xsmincdp, 0); + /* VSX_CMP - VSX floating point compare * op - instruction mnemonic * nels - number of elements (1, 2 or 4) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 3956fd1..fe3267e 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -431,6 +431,8 @@ DEF_HELPER_2(xscmpoqp, void, env, i32) DEF_HELPER_2(xscmpuqp, void, env, i32) DEF_HELPER_2(xsmaxdp, void, env, i32) DEF_HELPER_2(xsmindp, void, env, i32) +DEF_HELPER_2(xsmaxcdp, void, env, i32) +DEF_HELPER_2(xsmincdp, void, env, i32) DEF_HELPER_2(xscvdphp, void, env, i32) DEF_HELPER_2(xscvdpqp, void, env, i32) DEF_HELPER_2(xscvdpsp, void, env, i32) diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx= -impl.inc.c index a062203..3251dca 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -808,6 +808,8 @@ GEN_VSX_HELPER_2(xscmpoqp, 0x04, 0x04, 0, PPC2_VSX) GEN_VSX_HELPER_2(xscmpuqp, 0x04, 0x14, 0, PPC2_VSX) GEN_VSX_HELPER_2(xsmaxdp, 0x00, 0x14, 0, PPC2_VSX) GEN_VSX_HELPER_2(xsmindp, 0x00, 0x15, 0, PPC2_VSX) +GEN_VSX_HELPER_2(xsmaxcdp, 0x00, 0x10, 0, PPC2_ISA300) +GEN_VSX_HELPER_2(xsmincdp, 0x00, 0x11, 0, PPC2_ISA300) GEN_VSX_HELPER_2(xscvdphp, 0x16, 0x15, 0x11, PPC2_ISA300) GEN_VSX_HELPER_2(xscvdpsp, 0x12, 0x10, 0, PPC2_VSX) GEN_VSX_HELPER_2(xscvdpqp, 0x04, 0x1A, 0x16, PPC2_ISA300) diff --git a/target/ppc/translate/vsx-ops.inc.c b/target/ppc/translate/vsx-= ops.inc.c index 2202c0f..16a135f 100644 --- a/target/ppc/translate/vsx-ops.inc.c +++ b/target/ppc/translate/vsx-ops.inc.c @@ -200,6 +200,8 @@ GEN_VSX_XFORM_300(xscmpoqp, 0x04, 0x04, 0x00600001), GEN_VSX_XFORM_300(xscmpuqp, 0x04, 0x14, 0x00600001), GEN_XX3FORM(xsmaxdp, 0x00, 0x14, PPC2_VSX), GEN_XX3FORM(xsmindp, 0x00, 0x15, PPC2_VSX), +GEN_XX3FORM(xsmaxcdp, 0x00, 0x10, PPC2_ISA300), +GEN_XX3FORM(xsmincdp, 0x00, 0x11, PPC2_ISA300), GEN_XX2FORM_EO(xscvdphp, 0x16, 0x15, 0x11, PPC2_ISA300), GEN_XX2FORM(xscvdpsp, 0x12, 0x10, PPC2_VSX), GEN_XX2FORM(xscvdpspn, 0x16, 0x10, PPC2_VSX207), --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Wed, 22 Feb 2017 01:34:05 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndJ53jQz9s9Y; Wed, 22 Feb 2017 17:33:54 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745236; bh=/ah8/2z5Zr8D1EuRm1WRbr3BBkVzM3n/FVSnSKa0ziM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LxEH4+/koO2WOQcPi74jifi5CJR37GHgdaI2bnLtpkqzWgHxpZXcQQpYr0+loSx12 D0u0NHe1HULDhUljP4QTJ/QGPQQCWDwg6o2ps7LOp8hsFWXlBWcWbrbJYbPEPve4IT qnLFG+J0ic1pgUIDaJzP73jiXFGpjYGXIGKq2NWU= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:15 +1100 Message-Id: <20170222063348.32176-11-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 10/43] target-ppc: Add xsmaxjdp and xsminjdp instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, Nikunj A Dadhania , qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, Bharata B Rao , imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Bharata B Rao xsmaxjdp: VSX Scalar Maximum Type-J Double-Precision xsminjdp: VSX Scalar Minimum Type-J Double-Precision Signed-off-by: Bharata B Rao Signed-off-by: Nikunj A Dadhania Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 55 +++++++++++++++++++++++++++++++++= ++++ target/ppc/helper.h | 2 ++ target/ppc/translate/vsx-impl.inc.c | 2 ++ target/ppc/translate/vsx-ops.inc.c | 2 ++ 4 files changed, 61 insertions(+) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 9d2688e..1b6cd3b 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -2717,6 +2717,61 @@ void helper_##name(CPUPPCState *env, uint32_t opcode= ) \ VSX_MAX_MINC(xsmaxcdp, 1); VSX_MAX_MINC(xsmincdp, 0); =20 +#define VSX_MAX_MINJ(name, max) = \ +void helper_##name(CPUPPCState *env, uint32_t opcode) = \ +{ = \ + ppc_vsr_t xt, xa, xb; = \ + bool vxsnan_flag =3D false, vex_flag =3D false; = \ + = \ + getVSR(rA(opcode) + 32, &xa, env); = \ + getVSR(rB(opcode) + 32, &xb, env); = \ + getVSR(rD(opcode) + 32, &xt, env); = \ + = \ + if (unlikely(float64_is_any_nan(xa.VsrD(0)))) { = \ + if (float64_is_signaling_nan(xa.VsrD(0), &env->fp_status)) { = \ + vxsnan_flag =3D true; = \ + } = \ + xt.VsrD(0) =3D xa.VsrD(0); = \ + } else if (unlikely(float64_is_any_nan(xb.VsrD(0)))) { = \ + if (float64_is_signaling_nan(xb.VsrD(0), &env->fp_status)) { = \ + vxsnan_flag =3D true; = \ + } = \ + xt.VsrD(0) =3D xb.VsrD(0); = \ + } else if (float64_is_zero(xa.VsrD(0)) && float64_is_zero(xb.VsrD(0)))= { \ + if (max) { = \ + if (!float64_is_neg(xa.VsrD(0)) || !float64_is_neg(xb.VsrD(0))= ) { \ + xt.VsrD(0) =3D 0ULL; = \ + } else { = \ + xt.VsrD(0) =3D 0x8000000000000000ULL; = \ + } = \ + } else { = \ + if (float64_is_neg(xa.VsrD(0)) || float64_is_neg(xb.VsrD(0))) = { \ + xt.VsrD(0) =3D 0x8000000000000000ULL; = \ + } else { = \ + xt.VsrD(0) =3D 0ULL; = \ + } = \ + } = \ + } else if ((max && = \ + !float64_lt(xa.VsrD(0), xb.VsrD(0), &env->fp_status)) || = \ + (!max && = \ + float64_lt(xa.VsrD(0), xb.VsrD(0), &env->fp_status))) { = \ + xt.VsrD(0) =3D xa.VsrD(0); = \ + } else { = \ + xt.VsrD(0) =3D xb.VsrD(0); = \ + } = \ + = \ + vex_flag =3D fpscr_ve & vxsnan_flag; = \ + if (vxsnan_flag) { = \ + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); = \ + } = \ + if (!vex_flag) { = \ + putVSR(rD(opcode) + 32, &xt, env); = \ + } = \ +} = \ + +VSX_MAX_MINJ(xsmaxjdp, 1); +VSX_MAX_MINJ(xsminjdp, 0); + /* VSX_CMP - VSX floating point compare * op - instruction mnemonic * nels - number of elements (1, 2 or 4) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index fe3267e..cc81709 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -433,6 +433,8 @@ DEF_HELPER_2(xsmaxdp, void, env, i32) DEF_HELPER_2(xsmindp, void, env, i32) DEF_HELPER_2(xsmaxcdp, void, env, i32) DEF_HELPER_2(xsmincdp, void, env, i32) +DEF_HELPER_2(xsmaxjdp, void, env, i32) +DEF_HELPER_2(xsminjdp, void, env, i32) DEF_HELPER_2(xscvdphp, void, env, i32) DEF_HELPER_2(xscvdpqp, void, env, i32) DEF_HELPER_2(xscvdpsp, void, env, i32) diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx= -impl.inc.c index 3251dca..8de8cd0 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -810,6 +810,8 @@ GEN_VSX_HELPER_2(xsmaxdp, 0x00, 0x14, 0, PPC2_VSX) GEN_VSX_HELPER_2(xsmindp, 0x00, 0x15, 0, PPC2_VSX) GEN_VSX_HELPER_2(xsmaxcdp, 0x00, 0x10, 0, PPC2_ISA300) GEN_VSX_HELPER_2(xsmincdp, 0x00, 0x11, 0, PPC2_ISA300) +GEN_VSX_HELPER_2(xsmaxjdp, 0x00, 0x12, 0, PPC2_ISA300) +GEN_VSX_HELPER_2(xsminjdp, 0x00, 0x12, 0, PPC2_ISA300) GEN_VSX_HELPER_2(xscvdphp, 0x16, 0x15, 0x11, PPC2_ISA300) GEN_VSX_HELPER_2(xscvdpsp, 0x12, 0x10, 0, PPC2_VSX) GEN_VSX_HELPER_2(xscvdpqp, 0x04, 0x1A, 0x16, PPC2_ISA300) diff --git a/target/ppc/translate/vsx-ops.inc.c b/target/ppc/translate/vsx-= ops.inc.c index 16a135f..c1b71ad 100644 --- a/target/ppc/translate/vsx-ops.inc.c +++ b/target/ppc/translate/vsx-ops.inc.c @@ -202,6 +202,8 @@ GEN_XX3FORM(xsmaxdp, 0x00, 0x14, PPC2_VSX), GEN_XX3FORM(xsmindp, 0x00, 0x15, PPC2_VSX), GEN_XX3FORM(xsmaxcdp, 0x00, 0x10, PPC2_ISA300), GEN_XX3FORM(xsmincdp, 0x00, 0x11, PPC2_ISA300), +GEN_XX3FORM(xsmaxjdp, 0x00, 0x12, PPC2_ISA300), +GEN_XX3FORM(xsminjdp, 0x00, 0x13, PPC2_ISA300), GEN_XX2FORM_EO(xscvdphp, 0x16, 0x15, 0x11, PPC2_ISA300), GEN_XX2FORM(xscvdpsp, 0x12, 0x10, PPC2_VSX), GEN_XX2FORM(xscvdpspn, 0x16, 0x10, PPC2_VSX207), --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Wed, 22 Feb 2017 01:34:02 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndH1qlVz9s8B; Wed, 22 Feb 2017 17:33:54 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745235; bh=2z5c1+u2hmnKuX6rrcq+9RpXHyk+D92mKcJyT3qK6oM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pY2DZ5utq1Ce0pRJBDzAhid3CQGvJitWuis9tV4Il4oScHNEn1RJ4KklMFwgdEU5S vUF6wR4btUP4bNJbD+E7fqbOE0C6dAt/ygWVOeq3mCA2SxpFayvoRiWD3DcsOLOjDM GQQEULN35VqNSW8XZyTQsfdEm8PycjSDHhToh55Q= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:16 +1100 Message-Id: <20170222063348.32176-12-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 11/43] spapr: fix off-by-one error in spapr_ovec_populate_dt() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, Sam Bobroff , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Sam Bobroff The last byte of the option vector was missing due to an off-by-one error. Without this fix, client architecture support negotiation will fail because the last byte of option vector 5, which contains the MMU support, will be missed. Signed-off-by: Sam Bobroff Reviewed-by: Thomas Huth Reviewed-by: Michael Roth Signed-off-by: David Gibson --- hw/ppc/spapr_ovec.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ppc/spapr_ovec.c b/hw/ppc/spapr_ovec.c index 3eb1d59..0bcf311 100644 --- a/hw/ppc/spapr_ovec.c +++ b/hw/ppc/spapr_ovec.c @@ -250,5 +250,5 @@ int spapr_ovec_populate_dt(void *fdt, int fdt_offset, } } =20 - return fdt_setprop(fdt, fdt_offset, name, vec, vec_len); + return fdt_setprop(fdt, fdt_offset, name, vec, vec_len + 1); } --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487746160296651.8722120317246; Tue, 21 Feb 2017 22:49:20 -0800 (PST) Received: from localhost ([::1]:50199 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQjn-0001CR-1r for importer@patchew.org; Wed, 22 Feb 2017 01:49:19 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37703) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV4-0002zb-Ig for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV2-0007yJ-7B for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:06 -0500 Received: from ozlabs.org ([103.22.144.67]:38897) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV1-0007vM-QV; Wed, 22 Feb 2017 01:34:04 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndH5HY8z9s8M; Wed, 22 Feb 2017 17:33:54 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745235; bh=I9+UKhORtGBfdm6IHWDk77nhbCZ6L4qpd0r+FKkrqKw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=d8gj14YDwMtD4uF3jSuqwvjqrltlcXsOFU6cDX3Na1GmJBfcqY+BD9xbX89aS5QxS PLo9cPpsmOFfo/cA23rP6TAqxF5AYywTz2urEqXZsdpfvBzUT+b0myrX82+UL9sA3/ 59bwEqLVYLlWQp7CtX8+fsDhFOrmj+7BVI5izl3g= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:17 +1100 Message-Id: <20170222063348.32176-13-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 12/43] target-ppc: implement load atomic instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, Harish S , thuth@redhat.com, Athira Rajeev , Nikunj A Dadhania , qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, Balamuruhan S , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Balamuruhan S lwat: Load Word Atomic ldat: Load Doubleword Atomic The instruction includes as function code (5 bits) which gives a detail on the operation to be performed. The patch implements five such functions. Signed-off-by: Balamuruhan S Signed-off-by: Harish S Signed-off-by: Athira Rajeev [ combine both lwat/ldat implementation using macro ] Signed-off-by: Nikunj A Dadhania Signed-off-by: David Gibson --- target/ppc/internal.h | 2 ++ target/ppc/translate.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 61 insertions(+) diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 5b5b180..1f441c6 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -133,6 +133,8 @@ EXTRACT_HELPER(UIMM4, 16, 4); EXTRACT_HELPER(NB, 11, 5); /* Shift count */ EXTRACT_HELPER(SH, 11, 5); +/* lwat/stwat/ldat/lwat */ +EXTRACT_HELPER(FC, 11, 5); /* Vector shift count */ EXTRACT_HELPER(VSH, 6, 4); /* Mask start */ diff --git a/target/ppc/translate.c b/target/ppc/translate.c index b48abae..ea2ec44 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -2976,6 +2976,63 @@ LARX(lbarx, DEF_MEMOP(MO_UB)) LARX(lharx, DEF_MEMOP(MO_UW)) LARX(lwarx, DEF_MEMOP(MO_UL)) =20 +#define LD_ATOMIC(name, memop, tp, op, eop) \ +static void gen_##name(DisasContext *ctx) \ +{ \ + int len =3D MEMOP_GET_SIZE(memop); \ + uint32_t gpr_FC =3D FC(ctx->opcode); \ + TCGv EA =3D tcg_temp_local_new(); \ + TCGv_##tp t0, t1; \ + \ + gen_addr_register(ctx, EA); \ + if (len > 1) { \ + gen_check_align(ctx, EA, len - 1); \ + } \ + t0 =3D tcg_temp_new_##tp(); \ + t1 =3D tcg_temp_new_##tp(); \ + tcg_gen_##op(t0, cpu_gpr[rD(ctx->opcode) + 1]); \ + \ + switch (gpr_FC) { \ + case 0: /* Fetch and add */ \ + tcg_gen_atomic_fetch_add_##tp(t1, EA, t0, ctx->mem_idx, memop); \ + break; \ + case 1: /* Fetch and xor */ \ + tcg_gen_atomic_fetch_xor_##tp(t1, EA, t0, ctx->mem_idx, memop); \ + break; \ + case 2: /* Fetch and or */ \ + tcg_gen_atomic_fetch_or_##tp(t1, EA, t0, ctx->mem_idx, memop); \ + break; \ + case 3: /* Fetch and 'and' */ \ + tcg_gen_atomic_fetch_and_##tp(t1, EA, t0, ctx->mem_idx, memop); \ + break; \ + case 8: /* Swap */ \ + tcg_gen_atomic_xchg_##tp(t1, EA, t0, ctx->mem_idx, memop); \ + break; \ + case 4: /* Fetch and max unsigned */ \ + case 5: /* Fetch and max signed */ \ + case 6: /* Fetch and min unsigned */ \ + case 7: /* Fetch and min signed */ \ + case 16: /* compare and swap not equal */ \ + case 24: /* Fetch and increment bounded */ \ + case 25: /* Fetch and increment equal */ \ + case 28: /* Fetch and decrement bounded */ \ + gen_invalid(ctx); \ + break; \ + default: \ + /* invoke data storage error handler */ \ + gen_exception_err(ctx, POWERPC_EXCP_DSI, POWERPC_EXCP_INVAL); \ + } \ + tcg_gen_##eop(cpu_gpr[rD(ctx->opcode)], t1); \ + tcg_temp_free_##tp(t0); \ + tcg_temp_free_##tp(t1); \ + tcg_temp_free(EA); \ +} + +LD_ATOMIC(lwat, DEF_MEMOP(MO_UL), i32, trunc_tl_i32, extu_i32_tl) +#if defined(TARGET_PPC64) +LD_ATOMIC(ldat, DEF_MEMOP(MO_Q), i64, mov_i64, mov_i64) +#endif + #if defined(CONFIG_USER_ONLY) static void gen_conditional_store(DisasContext *ctx, TCGv EA, int reg, int memop) @@ -6230,10 +6287,12 @@ GEN_HANDLER(isync, 0x13, 0x16, 0x04, 0x03FFF801, PP= C_MEM), GEN_HANDLER_E(lbarx, 0x1F, 0x14, 0x01, 0, PPC_NONE, PPC2_ATOMIC_ISA206), GEN_HANDLER_E(lharx, 0x1F, 0x14, 0x03, 0, PPC_NONE, PPC2_ATOMIC_ISA206), GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000000, PPC_RES), +GEN_HANDLER_E(lwat, 0x1F, 0x06, 0x12, 0x00000001, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(stbcx_, 0x1F, 0x16, 0x15, 0, PPC_NONE, PPC2_ATOMIC_ISA206), GEN_HANDLER_E(sthcx_, 0x1F, 0x16, 0x16, 0, PPC_NONE, PPC2_ATOMIC_ISA206), GEN_HANDLER2(stwcx_, "stwcx.", 0x1F, 0x16, 0x04, 0x00000000, PPC_RES), #if defined(TARGET_PPC64) +GEN_HANDLER_E(ldat, 0x1F, 0x06, 0x13, 0x00000001, PPC_NONE, PPC2_ISA300), GEN_HANDLER(ldarx, 0x1F, 0x14, 0x02, 0x00000000, PPC_64B), GEN_HANDLER_E(lqarx, 0x1F, 0x14, 0x08, 0, PPC_NONE, PPC2_LSQ_ISA207), GEN_HANDLER2(stdcx_, "stdcx.", 0x1F, 0x16, 0x06, 0x00000000, PPC_64B), --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487746225217369.1029349906613; Tue, 21 Feb 2017 22:50:25 -0800 (PST) Received: from localhost ([::1]:50201 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQkp-00025Q-JK for importer@patchew.org; Wed, 22 Feb 2017 01:50:23 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37720) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV5-00030F-0L for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:11 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV2-0007z0-V1 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:06 -0500 Received: from ozlabs.org ([103.22.144.67]:42875) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV2-0007wk-G3; Wed, 22 Feb 2017 01:34:04 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndJ3WQdz9sCg; Wed, 22 Feb 2017 17:33:55 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745236; bh=pLTtZk9StpqnWwbRt/EciJ0DPo+cnEKOP2wszwJ6vJo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dtqA0fRbi23H7T7+yqRriP4pQcAj0/E0NgKFtcnH0xq9RFByEQMvEun7rbl86B0Kz iejhRdaJ0M83D3Bq4eVGHv7aPXk2/BhzAC4/GkFUCDjizQEV6ypeiIxD06H/H4WXml 7OfF7pgoC56neFyRo1IessHYheKgfF4IvMC01zBE= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:18 +1100 Message-Id: <20170222063348.32176-14-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 13/43] target-ppc: implement store atomic instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, Harish S , thuth@redhat.com, Athira Rajeev , Nikunj A Dadhania , qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, Balamuruhan S , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Balamuruhan S stwat: Store Word Atomic stdat: Store Doubleword Atomic The instruction includes as function code (5 bits) which gives a detail on the operation to be performed. The patch implements five such functions. Signed-off-by: Balamuruhan S Signed-off-by: Harish S Signed-off-by: Athira Rajeev [ implement stdat, use macro and combine both implementation ] Signed-off-by: Nikunj A Dadhania Signed-off-by: David Gibson --- target/ppc/translate.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 52 insertions(+) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index ea2ec44..255735a 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -3033,6 +3033,56 @@ LD_ATOMIC(lwat, DEF_MEMOP(MO_UL), i32, trunc_tl_i32,= extu_i32_tl) LD_ATOMIC(ldat, DEF_MEMOP(MO_Q), i64, mov_i64, mov_i64) #endif =20 +#define ST_ATOMIC(name, memop, tp, op) \ +static void gen_##name(DisasContext *ctx) \ +{ \ + int len =3D MEMOP_GET_SIZE(memop); \ + uint32_t gpr_FC =3D FC(ctx->opcode); \ + TCGv EA =3D tcg_temp_local_new(); \ + TCGv_##tp t0, t1; \ + \ + gen_addr_register(ctx, EA); \ + if (len > 1) { \ + gen_check_align(ctx, EA, len - 1); \ + } \ + t0 =3D tcg_temp_new_##tp(); \ + t1 =3D tcg_temp_new_##tp(); \ + tcg_gen_##op(t0, cpu_gpr[rD(ctx->opcode) + 1]); \ + \ + switch (gpr_FC) { \ + case 0: /* add and Store */ \ + tcg_gen_atomic_add_fetch_##tp(t1, EA, t0, ctx->mem_idx, memop); \ + break; \ + case 1: /* xor and Store */ \ + tcg_gen_atomic_xor_fetch_##tp(t1, EA, t0, ctx->mem_idx, memop); \ + break; \ + case 2: /* Or and Store */ \ + tcg_gen_atomic_or_fetch_##tp(t1, EA, t0, ctx->mem_idx, memop); \ + break; \ + case 3: /* 'and' and Store */ \ + tcg_gen_atomic_and_fetch_##tp(t1, EA, t0, ctx->mem_idx, memop); \ + break; \ + case 4: /* Store max unsigned */ \ + case 5: /* Store max signed */ \ + case 6: /* Store min unsigned */ \ + case 7: /* Store min signed */ \ + case 24: /* Store twin */ \ + gen_invalid(ctx); \ + break; \ + default: \ + /* invoke data storage error handler */ \ + gen_exception_err(ctx, POWERPC_EXCP_DSI, POWERPC_EXCP_INVAL); \ + } \ + tcg_temp_free_##tp(t0); \ + tcg_temp_free_##tp(t1); \ + tcg_temp_free(EA); \ +} + +ST_ATOMIC(stwat, DEF_MEMOP(MO_UL), i32, trunc_tl_i32) +#if defined(TARGET_PPC64) +ST_ATOMIC(stdat, DEF_MEMOP(MO_Q), i64, mov_i64) +#endif + #if defined(CONFIG_USER_ONLY) static void gen_conditional_store(DisasContext *ctx, TCGv EA, int reg, int memop) @@ -6288,11 +6338,13 @@ GEN_HANDLER_E(lbarx, 0x1F, 0x14, 0x01, 0, PPC_NONE,= PPC2_ATOMIC_ISA206), GEN_HANDLER_E(lharx, 0x1F, 0x14, 0x03, 0, PPC_NONE, PPC2_ATOMIC_ISA206), GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000000, PPC_RES), GEN_HANDLER_E(lwat, 0x1F, 0x06, 0x12, 0x00000001, PPC_NONE, PPC2_ISA300), +GEN_HANDLER_E(stwat, 0x1F, 0x06, 0x16, 0x00000001, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(stbcx_, 0x1F, 0x16, 0x15, 0, PPC_NONE, PPC2_ATOMIC_ISA206), GEN_HANDLER_E(sthcx_, 0x1F, 0x16, 0x16, 0, PPC_NONE, PPC2_ATOMIC_ISA206), GEN_HANDLER2(stwcx_, "stwcx.", 0x1F, 0x16, 0x04, 0x00000000, PPC_RES), #if defined(TARGET_PPC64) GEN_HANDLER_E(ldat, 0x1F, 0x06, 0x13, 0x00000001, PPC_NONE, PPC2_ISA300), +GEN_HANDLER_E(stdat, 0x1F, 0x06, 0x17, 0x00000001, PPC_NONE, PPC2_ISA300), GEN_HANDLER(ldarx, 0x1F, 0x14, 0x02, 0x00000000, PPC_64B), GEN_HANDLER_E(lqarx, 0x1F, 0x14, 0x08, 0, PPC_NONE, PPC2_LSQ_ISA207), GEN_HANDLER2(stdcx_, "stdcx.", 0x1F, 0x16, 0x06, 0x00000000, PPC_64B), --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Wed, 22 Feb 2017 01:34:04 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndJ0Q8jz9s9N; Wed, 22 Feb 2017 17:33:55 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745236; bh=LXlGgL07MqcCu/6R1ufCk1oJ9Lwmbg/qIOj3/fT0WZc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HFQiC4PmJIWtMaYBhoEXj/ogVDkwWgdxON70MbkJYwwR4qAph8/Ya6f+ONGEZYxgb KXgonePmbeckHIT3KKG0Jd0oMHJMiea7ts8kTmDXjeYRYzkPYyvKkMczrZVAqvREq5 Ax+iTlLJ+q1x7vhy5DGGi7Xg3+8G1grIB/L4IoUM= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:19 +1100 Message-Id: <20170222063348.32176-15-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 14/43] target-ppc: generate exception for copy/paste X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, Nikunj A Dadhania , qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Nikunj A Dadhania Signed-off-by: Nikunj A Dadhania Signed-off-by: David Gibson --- target/ppc/translate.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 255735a..80f9f15 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -6132,6 +6132,19 @@ static inline void gen_cp_abort(DisasContext *ctx) // Do Nothing } =20 +#define GEN_CP_PASTE_NOOP(name) \ +static inline void gen_##name(DisasContext *ctx) \ +{ \ + /* Generate invalid exception until \ + * we have an implementation of the copy \ + * paste facility \ + */ \ + gen_invalid(ctx); \ +} + +GEN_CP_PASTE_NOOP(copy) +GEN_CP_PASTE_NOOP(paste) + static void gen_tcheck(DisasContext *ctx) { if (unlikely(!ctx->tm_enabled)) { @@ -6281,7 +6294,9 @@ GEN_HANDLER2(andi_, "andi.", 0x1C, 0xFF, 0xFF, 0x0000= 0000, PPC_INTEGER), GEN_HANDLER2(andis_, "andis.", 0x1D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), GEN_HANDLER(cntlzw, 0x1F, 0x1A, 0x00, 0x00000000, PPC_INTEGER), GEN_HANDLER_E(cnttzw, 0x1F, 0x1A, 0x10, 0x00000000, PPC_NONE, PPC2_ISA300), +GEN_HANDLER_E(copy, 0x1F, 0x06, 0x18, 0x03C00001, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(cp_abort, 0x1F, 0x06, 0x1A, 0x03FFF801, PPC_NONE, PPC2_ISA30= 0), +GEN_HANDLER_E(paste, 0x1F, 0x06, 0x1C, 0x03C00000, PPC_NONE, PPC2_ISA300), GEN_HANDLER(or, 0x1F, 0x1C, 0x0D, 0x00000000, PPC_INTEGER), GEN_HANDLER(xor, 0x1F, 0x1C, 0x09, 0x00000000, PPC_INTEGER), GEN_HANDLER(ori, 0x18, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Wed, 22 Feb 2017 01:34:06 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndJ6PCKz9s8P; Wed, 22 Feb 2017 17:33:55 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745236; bh=gqbpfHiqR5463egArQQETjtZMzIYyy3dU0S9judnsv0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=f0xu6bxw5OGUJ8Hriw7SwGs08X0Jv8a8QNanrM5L8EbCvdu80vH9jfTkuZHB4mE/u dripK3Azi+5PB5tO78scebgxj4QYlVyqsdqVq9EkdsRfKtd3luusZHdI4haSlikhu5 WQjttSUcSdQtUAq8PDO4CuIMNSxc1vEpoCWpSlPA= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:20 +1100 Message-Id: <20170222063348.32176-16-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 15/43] target-ppc: add slbieg instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, Nikunj A Dadhania , qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Nikunj A Dadhania slbieg: SLB Invalidate Entry Global Signed-off-by: Nikunj A Dadhania Signed-off-by: David Gibson --- target/ppc/helper.h | 1 + target/ppc/mmu-hash64.c | 16 ++++++++++++++-- target/ppc/translate.c | 14 ++++++++++++++ 3 files changed, 29 insertions(+), 2 deletions(-) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index cc81709..007a837 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -669,6 +669,7 @@ DEF_HELPER_2(load_slb_vsid, tl, env, tl) DEF_HELPER_2(find_slb_vsid, tl, env, tl) DEF_HELPER_FLAGS_1(slbia, TCG_CALL_NO_RWG, void, env) DEF_HELPER_FLAGS_2(slbie, TCG_CALL_NO_RWG, void, env, tl) +DEF_HELPER_FLAGS_2(slbieg, TCG_CALL_NO_RWG, void, env, tl) #endif DEF_HELPER_FLAGS_2(load_sr, TCG_CALL_NO_RWG, tl, env, tl) DEF_HELPER_FLAGS_3(store_sr, TCG_CALL_NO_RWG, void, env, tl, tl) diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index bb78fb5..2791f29 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -115,7 +115,8 @@ void helper_slbia(CPUPPCState *env) } } =20 -void helper_slbie(CPUPPCState *env, target_ulong addr) +static void __helper_slbie(CPUPPCState *env, target_ulong addr, + target_ulong global) { PowerPCCPU *cpu =3D ppc_env_get_cpu(env); ppc_slb_t *slb; @@ -132,10 +133,21 @@ void helper_slbie(CPUPPCState *env, target_ulong addr) * and we still don't have a tlb_flush_mask(env, n, mask) * in QEMU, we just invalidate all TLBs */ - env->tlb_need_flush |=3D TLB_NEED_LOCAL_FLUSH; + env->tlb_need_flush |=3D + (global =3D=3D false ? TLB_NEED_LOCAL_FLUSH : TLB_NEED_GLOBAL_= FLUSH); } } =20 +void helper_slbie(CPUPPCState *env, target_ulong addr) +{ + __helper_slbie(env, addr, false); +} + +void helper_slbieg(CPUPPCState *env, target_ulong addr) +{ + __helper_slbie(env, addr, true); +} + int ppc_store_slb(PowerPCCPU *cpu, target_ulong slot, target_ulong esid, target_ulong vsid) { diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 80f9f15..b0f3c3b 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -4484,6 +4484,19 @@ static void gen_slbie(DisasContext *ctx) gen_helper_slbie(cpu_env, cpu_gpr[rB(ctx->opcode)]); #endif /* defined(CONFIG_USER_ONLY) */ } + +/* slbieg */ +static void gen_slbieg(DisasContext *ctx) +{ +#if defined(CONFIG_USER_ONLY) + GEN_PRIV; +#else + CHK_SV; + + gen_helper_slbieg(cpu_env, cpu_gpr[rB(ctx->opcode)]); +#endif /* defined(CONFIG_USER_ONLY) */ +} + #endif /* defined(TARGET_PPC64) */ =20 /*** External control = ***/ @@ -6439,6 +6452,7 @@ GEN_HANDLER(tlbsync, 0x1F, 0x16, 0x11, 0x03FFF801, PP= C_MEM_TLBSYNC), #if defined(TARGET_PPC64) GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x031FFC01, PPC_SLBI), GEN_HANDLER(slbie, 0x1F, 0x12, 0x0D, 0x03FF0001, PPC_SLBI), +GEN_HANDLER_E(slbieg, 0x1F, 0x12, 0x0E, 0x001F0001, PPC_NONE, PPC2_ISA300), #endif GEN_HANDLER(eciwx, 0x1F, 0x16, 0x0D, 0x00000001, PPC_EXTERN), GEN_HANDLER(ecowx, 0x1F, 0x16, 0x09, 0x00000001, PPC_EXTERN), --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487745368750260.21207063264603; Tue, 21 Feb 2017 22:36:08 -0800 (PST) Received: from localhost ([::1]:50129 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQX1-0004VL-9s for importer@patchew.org; Wed, 22 Feb 2017 01:36:07 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37551) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV1-0002wz-0g for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQUz-0007u3-KQ for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:03 -0500 Received: from ozlabs.org ([103.22.144.67]:47531) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQUz-0007q9-99; Wed, 22 Feb 2017 01:34:01 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndH2Xljz9s8Y; Wed, 22 Feb 2017 17:33:55 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745235; bh=GD5qQgi6L0CZK7UWvFnmVTzdVrt16y9KBCd1CAXoKaU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HAD58IvdjSinYfIsY1LGqDzbryxiiOCPwL4gXs8YPpDbz/HwsvpND/fbTLbf1LUoX OmOH37vDbWh7iBwLAS27Bder1E1EOjbv7l3wBUx52zFNbGE4tXIrNm3KoxU03NTptG se7c6pXsUYAgtOMgxQcf8U2Z+2bxWh6RhUMq4RYg= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:21 +1100 Message-Id: <20170222063348.32176-17-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 16/43] target-ppc: add slbsync implementation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, Nikunj A Dadhania , qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Nikunj A Dadhania slbsync: SLB Synchoronize The instruction provides an ordering function for the effects of all slbieg instructions executed by the thread executing the slbsync instruction. Signed-off-by: Nikunj A Dadhania Signed-off-by: David Gibson --- target/ppc/translate.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index b0f3c3b..b1a6aee 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -4497,6 +4497,17 @@ static void gen_slbieg(DisasContext *ctx) #endif /* defined(CONFIG_USER_ONLY) */ } =20 +/* slbsync */ +static void gen_slbsync(DisasContext *ctx) +{ +#if defined(CONFIG_USER_ONLY) + GEN_PRIV; +#else + CHK_SV; + gen_check_tlb_flush(ctx, true); +#endif /* defined(CONFIG_USER_ONLY) */ +} + #endif /* defined(TARGET_PPC64) */ =20 /*** External control = ***/ @@ -6453,6 +6464,7 @@ GEN_HANDLER(tlbsync, 0x1F, 0x16, 0x11, 0x03FFF801, PP= C_MEM_TLBSYNC), GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x031FFC01, PPC_SLBI), GEN_HANDLER(slbie, 0x1F, 0x12, 0x0D, 0x03FF0001, PPC_SLBI), GEN_HANDLER_E(slbieg, 0x1F, 0x12, 0x0E, 0x001F0001, PPC_NONE, PPC2_ISA300), +GEN_HANDLER_E(slbsync, 0x1F, 0x12, 0x0A, 0x03FFF801, PPC_NONE, PPC2_ISA300= ), #endif GEN_HANDLER(eciwx, 0x1F, 0x16, 0x0D, 0x00000001, PPC_EXTERN), GEN_HANDLER(ecowx, 0x1F, 0x16, 0x09, 0x00000001, PPC_EXTERN), --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487746151125928.4170738972106; Tue, 21 Feb 2017 22:49:11 -0800 (PST) Received: from localhost ([::1]:50198 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQjd-000154-S0 for importer@patchew.org; Wed, 22 Feb 2017 01:49:09 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37711) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV4-000305-Sg for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV3-000802-Ga for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:06 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:51143) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV2-0007wQ-WC; Wed, 22 Feb 2017 01:34:05 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndJ1QWkz9s9Z; Wed, 22 Feb 2017 17:33:55 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745236; bh=7FZmcdEXa5rS5V3kNpr0J705s2ZqvWBoxK4XAcTIbbE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Z0yGhc+YIToo/Jhm5KAThGuG46TPMa7yx1qcuEA3tKu0fVLBencVZkwKHwh9+qAtj 0S8IHQkMnWgI9e/W3Q2ALLaCU9PsYw/HpOASYdfbhFF58+ZKQF9aTVoYlVyMZYBLQp RXDefcgHVJIookXSkZi9QHZo1xeKCG1S8qm08LsE= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:22 +1100 Message-Id: <20170222063348.32176-18-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 17/43] target-ppc: add wait instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, Nikunj A Dadhania , qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Nikunj A Dadhania Use the available wait instruction implementation. Signed-off-by: Nikunj A Dadhania Signed-off-by: David Gibson --- target/ppc/translate.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index b1a6aee..3ba2616 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -6391,6 +6391,7 @@ GEN_HANDLER_E(stqcx_, 0x1F, 0x16, 0x05, 0, PPC_NONE, = PPC2_LSQ_ISA207), #endif GEN_HANDLER(sync, 0x1F, 0x16, 0x12, 0x039FF801, PPC_MEM_SYNC), GEN_HANDLER(wait, 0x1F, 0x1E, 0x01, 0x03FFF801, PPC_WAIT), +GEN_HANDLER_E(wait, 0x1F, 0x1E, 0x00, 0x039FF801, PPC_NONE, PPC2_ISA300), GEN_HANDLER(b, 0x12, 0xFF, 0xFF, 0x00000000, PPC_FLOW), GEN_HANDLER(bc, 0x10, 0xFF, 0xFF, 0x00000000, PPC_FLOW), GEN_HANDLER(bcctr, 0x13, 0x10, 0x10, 0x00000000, PPC_FLOW), --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487745368839346.1201483296521; Tue, 21 Feb 2017 22:36:08 -0800 (PST) Received: from localhost ([::1]:50128 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQX1-0004VG-J9 for importer@patchew.org; Wed, 22 Feb 2017 01:36:07 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37565) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV1-0002x1-DG for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV0-0007v7-1X for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:03 -0500 Received: from ozlabs.org ([103.22.144.67]:55219) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQUz-0007qt-N3; Wed, 22 Feb 2017 01:34:01 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndH3CNjz9s9r; Wed, 22 Feb 2017 17:33:55 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745235; bh=iQyVbTlLn6IqU+ETejMRhYmPvMxhxYk9qe9Y/uJK7Y4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GellAoVOIBXnDXmTUXy+YNb+24X43keMn75LDVTRHhSfow4bz3j+b8pcAzJHWhNev fuUnEq+CNQm6ZOuJbwe07iVisWZ3K5uWGne+EvdolNFFvco85r6tirMgndK+5omRC9 2Jxtqcdtlcb6QTJVn+/+kbZ6qouzDy5Q971RBxVg= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:23 +1100 Message-Id: <20170222063348.32176-19-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 18/43] target-ppc, tcg: fix usermode segfault with pthread_create() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, Sam Bobroff , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Sam Bobroff Programs run under qemu-ppc64 on an x86_64 host currently segfault if they use pthread_create() due to the adjustment made to the NIP in commit bd6fefe71cec5a0c7d2be4ac96307f25db56abf9. This patch changes cpu_loop() to set the NIP back to the pre-incremented value before calling do_syscall(), which causes the correct address to be used for the new thread and corrects the fault. Signed-off-by: Sam Bobroff Reviewed-by: Laurent Vivier Reviewed-by: Peter Maydell Signed-off-by: David Gibson --- linux-user/main.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/linux-user/main.c b/linux-user/main.c index 4fd49ce..9645122 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -1712,10 +1712,12 @@ void cpu_loop(CPUPPCState *env) * in syscalls. */ env->crf[0] &=3D ~0x1; + env->nip +=3D 4; ret =3D do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6], env->gpr[7], env->gpr[8], 0, 0); if (ret =3D=3D -TARGET_ERESTARTSYS) { + env->nip -=3D 4; break; } if (ret =3D=3D (target_ulong)(-TARGET_QEMU_ESIGRETURN)) { @@ -1723,7 +1725,6 @@ void cpu_loop(CPUPPCState *env) Avoid corrupting register state. */ break; } - env->nip +=3D 4; if (ret > (target_ulong)(-515)) { env->crf[0] |=3D 0x1; ret =3D -ret; --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487747291828517.9459485633928; Tue, 21 Feb 2017 23:08:11 -0800 (PST) Received: from localhost ([::1]:50312 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgR22-00020X-I5 for importer@patchew.org; Wed, 22 Feb 2017 02:08:10 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38022) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQVB-00038D-Bi for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:16 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV8-00089e-H2 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:13 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:46427) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV7-00082b-V4; Wed, 22 Feb 2017 01:34:10 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndL3zG0z9sD9; Wed, 22 Feb 2017 17:33:55 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745238; bh=ZReJ/jO18lQgv5O1yWy1z90csCxTzYCh9fDfmo2uTQY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=j/RZdJQCp9hdxoVm+C48im/lgnzzwQnqSjE0gS5nF8htQaFB84GolaVc3cvh2PT3x UkOgKzFd8L8foaNtbP7Xt+6jY1SwlMeo8o+0vpbhnD05iDf5JU4Z+O063cNoJ3uurQ JpjyDtKJoMPX5/uWc+GDL90z4eBRZWuTMXMz9yZM= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:24 +1100 Message-Id: <20170222063348.32176-20-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 19/43] mac99: replace debug printf with trace points X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Laurent Vivier Signed-off-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: David Gibson --- hw/ppc/mac_newworld.c | 15 +++------------ hw/ppc/trace-events | 4 ++++ 2 files changed, 7 insertions(+), 12 deletions(-) diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 716aea6..68aaedc 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -72,6 +72,7 @@ #include "exec/address-spaces.h" #include "hw/sysbus.h" #include "qemu/cutils.h" +#include "trace.h" =20 #define MAX_IDE_BUS 2 #define CFG_ADDR 0xf0000510 @@ -79,21 +80,11 @@ #define CLOCKFREQ (266UL * 1000UL * 1000UL) #define BUSFREQ (100UL * 1000UL * 1000UL) =20 -/* debug UniNorth */ -//#define DEBUG_UNIN - -#ifdef DEBUG_UNIN -#define UNIN_DPRINTF(fmt, ...) \ - do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0) -#else -#define UNIN_DPRINTF(fmt, ...) -#endif - /* UniN device */ static void unin_write(void *opaque, hwaddr addr, uint64_t value, unsigned size) { - UNIN_DPRINTF("write addr " TARGET_FMT_plx " val %"PRIx64"\n", addr, va= lue); + trace_mac99_uninorth_write(addr, value); if (addr =3D=3D 0x0) { *(int*)opaque =3D value; } @@ -109,7 +100,7 @@ static uint64_t unin_read(void *opaque, hwaddr addr, un= signed size) value =3D *(int*)opaque; } =20 - UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value); + trace_mac99_uninorth_read(addr, value); =20 return value; } diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events index f46995c..6122a12 100644 --- a/hw/ppc/trace-events +++ b/hw/ppc/trace-events @@ -85,3 +85,7 @@ rs6000mc_presence_read(uint32_t addr, uint32_t val) "read= addr=3D%x val=3D%x" rs6000mc_size_read(uint32_t addr, uint32_t val) "read addr=3D%x val=3D%x" rs6000mc_size_write(uint32_t addr, uint32_t val) "write addr=3D%x val=3D%x" rs6000mc_parity_read(uint32_t addr, uint32_t val) "read addr=3D%x val=3D%x" + +# hw/ppc/mac_newworld.c +mac99_uninorth_write(uint64_t addr, uint64_t value) "addr=3D0x%" PRIx64 " = val=3D0x%"PRIx64 +mac99_uninorth_read(uint64_t addr, uint64_t value) "addr=3D0x%" PRIx64 " v= al=3D0x%"PRIx64 --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487746968835682.3307276407648; Tue, 21 Feb 2017 23:02:48 -0800 (PST) Received: from localhost ([::1]:50282 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQwp-0004qW-GM for importer@patchew.org; Wed, 22 Feb 2017 02:02:47 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37940) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV9-00036H-OE for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV7-000871-Ch for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:11 -0500 Received: from ozlabs.org ([103.22.144.67]:52249) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV6-00081o-SS; Wed, 22 Feb 2017 01:34:09 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndL36jjz9sN4; Wed, 22 Feb 2017 17:33:55 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745238; bh=rEEnlEKfMQJLAOxhPdEkAG/2gNZnoooJd79Fge73TPc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CR4D+6N+QcZwFuDf/Wii/mZ5mmlsGae03MKByxSWx2/5gzUMTukCXJUxycCEo0Yyy ZTuthUXm1MrlhWxomHj1nuAPtZb5/WB5FhaAyf8PftD1wo6kwcLEF8MOwYKwNdBeX3 +6pm01exQTqon+pb8QPii2RX0x+gZlEWwmPKn8Tc= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:25 +1100 Message-Id: <20170222063348.32176-21-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 20/43] ppc4xx: replace debug printf with trace points X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Laurent Vivier Signed-off-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: David Gibson --- hw/ppc/ppc4xx_pci.c | 13 +++---------- hw/ppc/trace-events | 4 ++++ 2 files changed, 7 insertions(+), 10 deletions(-) diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c index 683218e..dc19682 100644 --- a/hw/ppc/ppc4xx_pci.c +++ b/hw/ppc/ppc4xx_pci.c @@ -26,13 +26,7 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" #include "exec/address-spaces.h" - -#undef DEBUG -#ifdef DEBUG -#define DPRINTF(fmt, ...) do { printf(fmt, ## __VA_ARGS__); } while (0) -#else -#define DPRINTF(fmt, ...) -#endif /* DEBUG */ +#include "trace.h" =20 struct PCIMasterMap { uint32_t la; @@ -249,8 +243,7 @@ static int ppc4xx_pci_map_irq(PCIDevice *pci_dev, int i= rq_num) { int slot =3D pci_dev->devfn >> 3; =20 - DPRINTF("%s: devfn %x irq %d -> %d\n", __func__, - pci_dev->devfn, irq_num, slot); + trace_ppc4xx_pci_map_irq(pci_dev->devfn, irq_num, slot); =20 return slot - 1; } @@ -259,7 +252,7 @@ static void ppc4xx_pci_set_irq(void *opaque, int irq_nu= m, int level) { qemu_irq *pci_irqs =3D opaque; =20 - DPRINTF("%s: PCI irq %d\n", __func__, irq_num); + trace_ppc4xx_pci_set_irq(irq_num); if (irq_num < 0) { fprintf(stderr, "%s: PCI irq %d\n", __func__, irq_num); return; diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events index 6122a12..f04bb1d 100644 --- a/hw/ppc/trace-events +++ b/hw/ppc/trace-events @@ -89,3 +89,7 @@ rs6000mc_parity_read(uint32_t addr, uint32_t val) "read a= ddr=3D%x val=3D%x" # hw/ppc/mac_newworld.c mac99_uninorth_write(uint64_t addr, uint64_t value) "addr=3D0x%" PRIx64 " = val=3D0x%"PRIx64 mac99_uninorth_read(uint64_t addr, uint64_t value) "addr=3D0x%" PRIx64 " v= al=3D0x%"PRIx64 + +# hw/ppc/ppc4xx_pci.c +ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn %x irq %d = -> %d" +ppc4xx_pci_set_irq(int irq_num) "PCI irq %d" --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Wed, 22 Feb 2017 01:34:08 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndK71Jpz9sDb; Wed, 22 Feb 2017 17:33:55 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745237; bh=L73oi0O+icmffbC2gktZy73dLsjd3609wZYrg1CwzCQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Pg90FNy/s0zUHb99++jPVG4HqT7btK8e3CIdDqogHC5tJpkNT2+oJ4zOhJ2G4fFyo 21AYUqeSjl/+/OGKBqM7IjjVXC+cFKlv51l5P9RBIwuDAIEZoyCYr/hEYaEqnbkEEL RLkEzuBiYZndT/pwnz3ym4iFAyS3s4FNQz3REtXM= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:26 +1100 Message-Id: <20170222063348.32176-22-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 21/43] spapr: replace debug printf with trace points X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Laurent Vivier Signed-off-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: David Gibson --- hw/ppc/spapr_ovec.c | 17 +++-------------- hw/ppc/trace-events | 4 ++++ 2 files changed, 7 insertions(+), 14 deletions(-) diff --git a/hw/ppc/spapr_ovec.c b/hw/ppc/spapr_ovec.c index 0bcf311..41df4c3 100644 --- a/hw/ppc/spapr_ovec.c +++ b/hw/ppc/spapr_ovec.c @@ -16,18 +16,9 @@ #include "qemu/bitmap.h" #include "exec/address-spaces.h" #include "qemu/error-report.h" +#include "trace.h" #include =20 -/* #define DEBUG_SPAPR_OVEC */ - -#ifdef DEBUG_SPAPR_OVEC -#define DPRINTFN(fmt, ...) \ - do { fprintf(stderr, fmt "\n", ## __VA_ARGS__); } while (0) -#else -#define DPRINTFN(fmt, ...) \ - do { } while (0) -#endif - #define OV_MAXBYTES 256 /* not including length byte */ #define OV_MAXBITS (OV_MAXBYTES * BITS_PER_BYTE) =20 @@ -210,8 +201,7 @@ sPAPROptionVector *spapr_ovec_parse_vector(target_ulong= table_addr, int vector) for (i =3D 0; i < vector_len; i++) { uint8_t entry =3D ldub_phys(&address_space_memory, addr + i); if (entry) { - DPRINTFN("read guest vector %2d, byte %3d / %3d: 0x%.2x", - vector, i + 1, vector_len, entry); + trace_spapr_ovec_parse_vector(vector, i + 1, vector_len, entry= ); guest_byte_to_bitmap(entry, ov->bitmap, i * BITS_PER_BYTE); } } @@ -245,8 +235,7 @@ int spapr_ovec_populate_dt(void *fdt, int fdt_offset, for (i =3D 1; i < vec_len + 1; i++) { vec[i] =3D guest_byte_from_bitmap(ov->bitmap, (i - 1) * BITS_PER_B= YTE); if (vec[i]) { - DPRINTFN("encoding guest vector byte %3d / %3d: 0x%.2x", - i, vec_len, vec[i]); + trace_spapr_ovec_populate_dt(i, vec_len, vec[i]); } } =20 diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events index f04bb1d..43d265f 100644 --- a/hw/ppc/trace-events +++ b/hw/ppc/trace-events @@ -56,6 +56,10 @@ spapr_drc_realize_child(uint32_t index, char *childname)= "drc: 0x%"PRIx32", chil spapr_drc_realize_complete(uint32_t index) "drc: 0x%"PRIx32 spapr_drc_unrealize(uint32_t index) "drc: 0x%"PRIx32 =20 +# hw/ppc/spapr_ovec.c +spapr_ovec_parse_vector(int vector, int byte, uint16_t vec_len, uint8_t en= try) "read guest vector %2d, byte %3d / %3d: 0x%.2x" +spapr_ovec_populate_dt(int byte, uint16_t vec_len, uint8_t entry) "encodin= g guest vector byte %3d / %3d: 0x%.2x" + # hw/ppc/spapr_rtas.c spapr_rtas_set_indicator_invalid(uint32_t index) "sensor index: 0x%"PRIx32 spapr_rtas_set_indicator_not_supported(uint32_t index, uint32_t type) "sen= sor index: 0x%"PRIx32", type: %"PRIu32 --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Wed, 22 Feb 2017 01:34:07 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndK31PGz9sDG; Wed, 22 Feb 2017 17:33:55 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745237; bh=UBpIhMpfaIF6IzSafCTYbIwVH0NUp7TaL8xg+DU5084=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=clZeLO9mGoMMPI/kuF7QIXM911RvFqJCAHbHAhT60cjaMpZwIjxkK0w6jWh8FvuKr 1G+dxXPDmA32rFlaPHZ/w678eyBW0dVe21cgZt7VyEHjmo6Q42dhfNYaEGZS9zdnMN Ee+WYpkKe+QPRHiOlO8fsV2RnPyAs6FhBaTxBSw0= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:27 +1100 Message-Id: <20170222063348.32176-23-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 22/43] softfloat: Add round-to-odd rounding mode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, Bharata B Rao , imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Bharata B Rao Power ISA 3.0 introduces a few quadruple precision floating point instructions that support round-to-odd rounding mode. The round-to-odd mode is explained as under: Let Z be the intermediate arithmetic result or the operand of a convert operation. If Z can be represented exactly in the target format, the result is Z. Otherwise the result is either Z1 or Z2 whichever is odd. Here Z1 and Z2 are the next larger and smaller numbers representable in the target format respectively. Signed-off-by: Bharata B Rao Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson Signed-off-by: David Gibson --- fpu/softfloat.c | 21 ++++++++++++++++++++- include/fpu/softfloat.h | 2 ++ 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index c295f31..5ccba76 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -623,6 +623,9 @@ static float64 roundAndPackFloat64(flag zSign, int zExp= , uint64_t zSig, case float_round_down: roundIncrement =3D zSign ? 0x3ff : 0; break; + case float_round_to_odd: + roundIncrement =3D (zSig & 0x400) ? 0 : 0x3ff; + break; default: abort(); } @@ -632,8 +635,10 @@ static float64 roundAndPackFloat64(flag zSign, int zEx= p, uint64_t zSig, || ( ( zExp =3D=3D 0x7FD ) && ( (int64_t) ( zSig + roundIncrement ) < 0 ) ) ) { + bool overflow_to_inf =3D roundingMode !=3D float_round_to_odd = && + roundIncrement !=3D 0; float_raise(float_flag_overflow | float_flag_inexact, status); - return packFloat64( zSign, 0x7FF, - ( roundIncrement =3D=3D 0 = )); + return packFloat64(zSign, 0x7FF, -(!overflow_to_inf)); } if ( zExp < 0 ) { if (status->flush_to_zero) { @@ -651,6 +656,13 @@ static float64 roundAndPackFloat64(flag zSign, int zEx= p, uint64_t zSig, if (isTiny && roundBits) { float_raise(float_flag_underflow, status); } + if (roundingMode =3D=3D float_round_to_odd) { + /* + * For round-to-odd case, the roundIncrement depends on + * zSig which just changed. + */ + roundIncrement =3D (zSig & 0x400) ? 0 : 0x3ff; + } } } if (roundBits) { @@ -1149,6 +1161,9 @@ static float128 roundAndPackFloat128(flag zSign, int3= 2_t zExp, case float_round_down: increment =3D zSign && zSig2; break; + case float_round_to_odd: + increment =3D !(zSig1 & 0x1) && zSig2; + break; default: abort(); } @@ -1168,6 +1183,7 @@ static float128 roundAndPackFloat128(flag zSign, int3= 2_t zExp, if ( ( roundingMode =3D=3D float_round_to_zero ) || ( zSign && ( roundingMode =3D=3D float_round_up ) ) || ( ! zSign && ( roundingMode =3D=3D float_round_down ) ) + || (roundingMode =3D=3D float_round_to_odd) ) { return packFloat128( @@ -1215,6 +1231,9 @@ static float128 roundAndPackFloat128(flag zSign, int3= 2_t zExp, case float_round_down: increment =3D zSign && zSig2; break; + case float_round_to_odd: + increment =3D !(zSig1 & 0x1) && zSig2; + break; default: abort(); } diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 842ec6b..8a39028 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -180,6 +180,8 @@ enum { float_round_up =3D 2, float_round_to_zero =3D 3, float_round_ties_away =3D 4, + /* Not an IEEE rounding mode: round to the closest odd mantissa value = */ + float_round_to_odd =3D 5, }; =20 /*------------------------------------------------------------------------= ---- --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487747003603263.05225053450033; Tue, 21 Feb 2017 23:03:23 -0800 (PST) Received: from localhost ([::1]:50284 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQxN-0005KO-4e for importer@patchew.org; Wed, 22 Feb 2017 02:03:21 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37895) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV8-000357-Lt for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV5-00083p-Vx for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:10 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:39245) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV5-0007yw-B3; Wed, 22 Feb 2017 01:34:07 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndK4V6Qz9sDC; Wed, 22 Feb 2017 17:33:55 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745237; bh=VBtRIqk8dOJ0KzlSI8011oT3gkDCPFtX0xF+x8UCXTM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gGqP9Al41d8yVSIj1EjrCZW8udQCxAK3yAFBR/BLXkbfcXx4/GJVQ4rwc78+Ox/5R x8KmsiyEp1AaOUatgXOJunqmCjnkZ3ftSiK6aRi2z4Kc1PXlw/zCQQ2VztvsH4Y3vQ RE0Lyk2Oo889gV2Ib9cnevFrNMi6pniptbY9KKAw= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:28 +1100 Message-Id: <20170222063348.32176-24-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 23/43] softfloat: Add float128_to_uint64_round_to_zero() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, Bharata B Rao , imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Bharata B Rao Implement float128_to_uint64() and use that to implement float128_to_uint64_round_to_zero() This is required by xscvqpudz instruction of PowerPC ISA 3.0. Signed-off-by: Bharata B Rao Reviewed-by: Peter Maydell Signed-off-by: David Gibson --- fpu/softfloat.c | 59 +++++++++++++++++++++++++++++++++++++++++++++= ++++ include/fpu/softfloat.h | 2 ++ 2 files changed, 61 insertions(+) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 5ccba76..47e4646 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -6128,6 +6128,65 @@ int64_t float128_to_int64_round_to_zero(float128 a, = float_status *status) } =20 /*------------------------------------------------------------------------= ---- +| Returns the result of converting the quadruple-precision floating-point = value +| `a' to the 64-bit unsigned integer format. The conversion is +| performed according to the IEC/IEEE Standard for Binary Floating-Point +| Arithmetic---which means in particular that the conversion is rounded +| according to the current rounding mode. If `a' is a NaN, the largest +| positive integer is returned. If the conversion overflows, the +| largest unsigned integer is returned. If 'a' is negative, the value is +| rounded and zero is returned; negative values that do not round to zero +| will raise the inexact exception. +*-------------------------------------------------------------------------= ---*/ + +uint64_t float128_to_uint64(float128 a, float_status *status) +{ + flag aSign; + int aExp; + int shiftCount; + uint64_t aSig0, aSig1; + + aSig0 =3D extractFloat128Frac0(a); + aSig1 =3D extractFloat128Frac1(a); + aExp =3D extractFloat128Exp(a); + aSign =3D extractFloat128Sign(a); + if (aSign && (aExp > 0x3FFE)) { + float_raise(float_flag_invalid, status); + if (float128_is_any_nan(a)) { + return LIT64(0xFFFFFFFFFFFFFFFF); + } else { + return 0; + } + } + if (aExp) { + aSig0 |=3D LIT64(0x0001000000000000); + } + shiftCount =3D 0x402F - aExp; + if (shiftCount <=3D 0) { + if (0x403E < aExp) { + float_raise(float_flag_invalid, status); + return LIT64(0xFFFFFFFFFFFFFFFF); + } + shortShift128Left(aSig0, aSig1, -shiftCount, &aSig0, &aSig1); + } else { + shift64ExtraRightJamming(aSig0, aSig1, shiftCount, &aSig0, &aSig1); + } + return roundAndPackUint64(aSign, aSig0, aSig1, status); +} + +uint64_t float128_to_uint64_round_to_zero(float128 a, float_status *status) +{ + uint64_t v; + signed char current_rounding_mode =3D status->float_rounding_mode; + + set_float_rounding_mode(float_round_to_zero, status); + v =3D float128_to_uint64(a, status); + set_float_rounding_mode(current_rounding_mode, status); + + return v; +} + +/*------------------------------------------------------------------------= ---- | Returns the result of converting the quadruple-precision floating-point | value `a' to the single-precision floating-point format. The conversion | is performed according to the IEC/IEEE Standard for Binary Floating-Point diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 8a39028..a09ad0e 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -714,6 +714,8 @@ int32_t float128_to_int32(float128, float_status *statu= s); int32_t float128_to_int32_round_to_zero(float128, float_status *status); int64_t float128_to_int64(float128, float_status *status); int64_t float128_to_int64_round_to_zero(float128, float_status *status); +uint64_t float128_to_uint64(float128, float_status *status); +uint64_t float128_to_uint64_round_to_zero(float128, float_status *status); float32 float128_to_float32(float128, float_status *status); float64 float128_to_float64(float128, float_status *status); floatx80 float128_to_floatx80(float128, float_status *status); --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487746452542271.13936223553344; Tue, 21 Feb 2017 22:54:12 -0800 (PST) Received: from localhost ([::1]:50223 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQoU-0005P1-IY for importer@patchew.org; Wed, 22 Feb 2017 01:54:10 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37835) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV7-000334-H5 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:12 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV4-00081b-SS for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:09 -0500 Received: from ozlabs.org ([103.22.144.67]:34091) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV4-0007yZ-Ch; Wed, 22 Feb 2017 01:34:06 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndK1qy2z9sDg; Wed, 22 Feb 2017 17:33:55 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745237; bh=PwBEBwsl4SCoWVZ/DNEGZkEY85JSBXtSXIq/aqntOKc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lVtDEzTE73N0tAETjq0woGcCkyme8Kv55/aRbnevU2uOt5i76cvno2s4K/jyH0kQQ vKcJ1DpU+WY3IyuLheyH4jl9c60MWdfWK0lnJhn+IA9BefNzvOMdz14ip5GhiGQMVj lCVCs0v2PrIURdpcQBfS2RMNmjbF1xz20tNLI3lI= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:29 +1100 Message-Id: <20170222063348.32176-25-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 24/43] softfloat: Add float128_to_uint32_round_to_zero() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, Bharata B Rao , imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Bharata B Rao float128_to_uint32_round_to_zero() is needed by xscvqpuwz instruction of PowerPC ISA 3.0. Signed-off-by: Bharata B Rao Reviewed-by: Peter Maydell Signed-off-by: David Gibson --- fpu/softfloat.c | 28 ++++++++++++++++++++++++++++ include/fpu/softfloat.h | 1 + 2 files changed, 29 insertions(+) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 47e4646..485a006 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -6188,6 +6188,34 @@ uint64_t float128_to_uint64_round_to_zero(float128 a= , float_status *status) =20 /*------------------------------------------------------------------------= ---- | Returns the result of converting the quadruple-precision floating-point +| value `a' to the 32-bit unsigned integer format. The conversion +| is performed according to the IEC/IEEE Standard for Binary Floating-Point +| Arithmetic except that the conversion is always rounded toward zero. +| If `a' is a NaN, the largest positive integer is returned. Otherwise, +| if the conversion overflows, the largest unsigned integer is returned. +| If 'a' is negative, the value is rounded and zero is returned; negative +| values that do not round to zero will raise the inexact exception. +*-------------------------------------------------------------------------= ---*/ + +uint32_t float128_to_uint32_round_to_zero(float128 a, float_status *status) +{ + uint64_t v; + uint32_t res; + int old_exc_flags =3D get_float_exception_flags(status); + + v =3D float128_to_uint64_round_to_zero(a, status); + if (v > 0xffffffff) { + res =3D 0xffffffff; + } else { + return v; + } + set_float_exception_flags(old_exc_flags, status); + float_raise(float_flag_invalid, status); + return res; +} + +/*------------------------------------------------------------------------= ---- +| Returns the result of converting the quadruple-precision floating-point | value `a' to the single-precision floating-point format. The conversion | is performed according to the IEC/IEEE Standard for Binary Floating-Point | Arithmetic. diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index a09ad0e..f1288ef 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -716,6 +716,7 @@ int64_t float128_to_int64(float128, float_status *statu= s); int64_t float128_to_int64_round_to_zero(float128, float_status *status); uint64_t float128_to_uint64(float128, float_status *status); uint64_t float128_to_uint64_round_to_zero(float128, float_status *status); +uint32_t float128_to_uint32_round_to_zero(float128, float_status *status); float32 float128_to_float32(float128, float_status *status); float64 float128_to_float64(float128, float_status *status); floatx80 float128_to_floatx80(float128, float_status *status); --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 14877474325281008.4295200054465; Tue, 21 Feb 2017 23:10:32 -0800 (PST) Received: from localhost ([::1]:50320 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgR4I-0004O8-S9 for importer@patchew.org; Wed, 22 Feb 2017 02:10:30 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37941) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQV9-00036L-Po for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:15 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV6-00085F-He for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:11 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:54361) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV5-000804-Ss; Wed, 22 Feb 2017 01:34:08 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndK5yp4z9sDF; Wed, 22 Feb 2017 17:33:55 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745237; bh=8jQi4WJbu3U8QPyObyZ/urmCxB8d7FTtk/26zHb9fUg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nM2rULpHX1X/9Q8Q1oWEBzZfBnGGiLDiFQTczD5sY4773cY3jfPtr3f5sXzBUyugE B0LxihZswwJ6yXvFjkfHL/YPwvrSy3aiIQHKkoCGFOBZYHFVwYgWETYZkfBamIUTTG V/rsVgtWrY1sQ5vlJbN6fIb2bKJlVuwCZ0AouRuc= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:30 +1100 Message-Id: <20170222063348.32176-26-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 25/43] target-ppc: Implement round to odd variants of quad FP instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, Jose Ricardo Ziviani , mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, Bharata B Rao , imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Bharata B Rao xsaddqpo: VSX Scalar Add Quad-Precision using round to Odd xsmulqo: VSX Scalar Multiply Quad-Precision using round to Odd xsdivqpo: VSX Scalar Divide Quad-Precision using round to Odd xscvqpdpo: VSX Scalar round & Convert Quad-Precision format to Double-Precision format using round to Odd xssqrtqpo: VSX Scalar Square Root Quad-Precision using round to Odd xssubqpo: VSX Scalar Subtract Quad-Precision using round to Odd In addition, fix the invalid bitmask in the instruction encoding of xssqrtqp[o]. Signed-off-by: Bharata B Rao CC: Jose Ricardo Ziviani Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 42 ++++++++++++++++++----------------= ---- target/ppc/translate/vsx-ops.inc.c | 2 +- 2 files changed, 21 insertions(+), 23 deletions(-) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 1b6cd3b..96f9801 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -1850,12 +1850,11 @@ void helper_xsaddqp(CPUPPCState *env, uint32_t opco= de) getVSR(rD(opcode) + 32, &xt, env); helper_reset_fpstatus(env); =20 + tstat =3D env->fp_status; if (unlikely(Rc(opcode) !=3D 0)) { - /* TODO: Support xsadddpo after round-to-odd is implemented */ - abort(); + tstat.float_rounding_mode =3D float_round_to_odd; } =20 - tstat =3D env->fp_status; set_float_exception_flags(0, &tstat); xt.f128 =3D float128_add(xa.f128, xb.f128, &tstat); env->fp_status.float_exception_flags |=3D tstat.float_exception_flags; @@ -1930,19 +1929,18 @@ VSX_MUL(xvmulsp, 4, float32, VsrW(i), 0, 0) void helper_xsmulqp(CPUPPCState *env, uint32_t opcode) { ppc_vsr_t xt, xa, xb; + float_status tstat; =20 getVSR(rA(opcode) + 32, &xa, env); getVSR(rB(opcode) + 32, &xb, env); getVSR(rD(opcode) + 32, &xt, env); =20 + helper_reset_fpstatus(env); + tstat =3D env->fp_status; if (unlikely(Rc(opcode) !=3D 0)) { - /* TODO: Support xsmulpo after round-to-odd is implemented */ - abort(); + tstat.float_rounding_mode =3D float_round_to_odd; } =20 - helper_reset_fpstatus(env); - - float_status tstat =3D env->fp_status; set_float_exception_flags(0, &tstat); xt.f128 =3D float128_mul(xa.f128, xb.f128, &tstat); env->fp_status.float_exception_flags |=3D tstat.float_exception_flags; @@ -2019,18 +2017,18 @@ VSX_DIV(xvdivsp, 4, float32, VsrW(i), 0, 0) void helper_xsdivqp(CPUPPCState *env, uint32_t opcode) { ppc_vsr_t xt, xa, xb; + float_status tstat; =20 getVSR(rA(opcode) + 32, &xa, env); getVSR(rB(opcode) + 32, &xb, env); getVSR(rD(opcode) + 32, &xt, env); =20 + helper_reset_fpstatus(env); + tstat =3D env->fp_status; if (unlikely(Rc(opcode) !=3D 0)) { - /* TODO: Support xsdivqpo after round-to-odd is implemented */ - abort(); + tstat.float_rounding_mode =3D float_round_to_odd; } =20 - helper_reset_fpstatus(env); - float_status tstat =3D env->fp_status; set_float_exception_flags(0, &tstat); xt.f128 =3D float128_div(xa.f128, xb.f128, &tstat); env->fp_status.float_exception_flags |=3D tstat.float_exception_flags; @@ -2954,18 +2952,20 @@ VSX_CVT_FP_TO_FP_HP(xvcvhpsp, 4, float16, float32, = VsrH(2 * i + 1), VsrW(i), 0) void helper_xscvqpdp(CPUPPCState *env, uint32_t opcode) { ppc_vsr_t xt, xb; + float_status tstat; =20 getVSR(rB(opcode) + 32, &xb, env); memset(&xt, 0, sizeof(xt)); =20 + tstat =3D env->fp_status; if (unlikely(Rc(opcode) !=3D 0)) { - /* TODO: Support xscvqpdpo after round-to-odd is implemented */ - abort(); + tstat.float_rounding_mode =3D float_round_to_odd; } =20 - xt.VsrD(0) =3D float128_to_float64(xb.f128, &env->fp_status); + xt.VsrD(0) =3D float128_to_float64(xb.f128, &tstat); + env->fp_status.float_exception_flags |=3D tstat.float_exception_flags; if (unlikely(float128_is_signaling_nan(xb.f128, - &env->fp_status))) { + &tstat))) { float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); xt.VsrD(0) =3D float64_snan_to_qnan(xt.VsrD(0)); } @@ -3496,12 +3496,11 @@ void helper_xssqrtqp(CPUPPCState *env, uint32_t opc= ode) memset(&xt, 0, sizeof(xt)); helper_reset_fpstatus(env); =20 + tstat =3D env->fp_status; if (unlikely(Rc(opcode) !=3D 0)) { - /* TODO: Support xsadddpo after round-to-odd is implemented */ - abort(); + tstat.float_rounding_mode =3D float_round_to_odd; } =20 - tstat =3D env->fp_status; set_float_exception_flags(0, &tstat); xt.f128 =3D float128_sqrt(xb.f128, &tstat); env->fp_status.float_exception_flags |=3D tstat.float_exception_flags; @@ -3534,12 +3533,11 @@ void helper_xssubqp(CPUPPCState *env, uint32_t opco= de) getVSR(rD(opcode) + 32, &xt, env); helper_reset_fpstatus(env); =20 + tstat =3D env->fp_status; if (unlikely(Rc(opcode) !=3D 0)) { - /* TODO: Support xssubqp after round-to-odd is implemented */ - abort(); + tstat.float_rounding_mode =3D float_round_to_odd; } =20 - tstat =3D env->fp_status; set_float_exception_flags(0, &tstat); xt.f128 =3D float128_sub(xa.f128, xb.f128, &tstat); env->fp_status.float_exception_flags |=3D tstat.float_exception_flags; diff --git a/target/ppc/translate/vsx-ops.inc.c b/target/ppc/translate/vsx-= ops.inc.c index c1b71ad..e20ca32 100644 --- a/target/ppc/translate/vsx-ops.inc.c +++ b/target/ppc/translate/vsx-ops.inc.c @@ -115,7 +115,7 @@ GEN_VSX_XFORM_300_EO(name, opc2, opc3 | 0x18, opc4 | 0x= 1, inval) =20 GEN_VSX_Z23FORM_300(xsrqpi, 0x05, 0x0, 0x0, 0x0), GEN_VSX_Z23FORM_300(xsrqpxp, 0x05, 0x1, 0x0, 0x0), -GEN_VSX_XFORM_300_EO(xssqrtqp, 0x04, 0x19, 0x1B, 0x00000001), +GEN_VSX_XFORM_300_EO(xssqrtqp, 0x04, 0x19, 0x1B, 0x0), GEN_VSX_XFORM_300(xssubqp, 0x04, 0x10, 0x0), =20 GEN_XX2FORM(xsabsdp, 0x12, 0x15, PPC2_VSX), --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; 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Wed, 22 Feb 2017 01:34:06 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndK0L9Sz9s9j; Wed, 22 Feb 2017 17:33:55 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745237; bh=nW4FV3jFdcLRgis+O0CSXeFwFOXzbYKRvmhPEtOOR7I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bUgI/cX0p2hfNE+545QtZZ5eoalcQHI3CkrKi6SM+qLtM55WEuFKjMuo+8KJ/CGYn OnJqd30ROSK+H7ET6fO6EXm6yPIH8S5cITyIAsWjtYIv7venCdRvTpD1WodlriP8y5 DuiKj2/YUre3b7UKtmKZQSaOQfgVTSrys+VK6F0k= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:31 +1100 Message-Id: <20170222063348.32176-27-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 26/43] target-ppc: Add xscvqpudz and xscvqpuwz instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, Bharata B Rao , imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Bharata B Rao xscvqpudz: VSX Scalar truncate & Convert Quad-Precision format to Unsigned Doubleword format xscvqpuwz: VSX Scalar truncate & Convert Quad-Precision format to Unsigned Word format Signed-off-by: Bharata B Rao Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 2 ++ target/ppc/helper.h | 2 ++ target/ppc/translate/vsx-impl.inc.c | 2 ++ target/ppc/translate/vsx-ops.inc.c | 2 ++ 4 files changed, 8 insertions(+) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 96f9801..58aee64 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -3086,6 +3086,8 @@ VSX_CVT_FP_TO_INT_VECTOR(xscvqpsdz, float128, int64, = f128, VsrD(0), \ =20 VSX_CVT_FP_TO_INT_VECTOR(xscvqpswz, float128, int32, f128, VsrD(0), = \ 0xffffffff80000000ULL) +VSX_CVT_FP_TO_INT_VECTOR(xscvqpudz, float128, uint64, f128, VsrD(0), 0x0UL= L) +VSX_CVT_FP_TO_INT_VECTOR(xscvqpuwz, float128, uint32, f128, VsrD(0), 0x0UL= L) =20 /* VSX_CVT_INT_TO_FP - VSX integer to floating point conversion * op - instruction mnemonic diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 007a837..6d77661 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -442,6 +442,8 @@ DEF_HELPER_2(xscvdpspn, i64, env, i64) DEF_HELPER_2(xscvqpdp, void, env, i32) DEF_HELPER_2(xscvqpsdz, void, env, i32) DEF_HELPER_2(xscvqpswz, void, env, i32) +DEF_HELPER_2(xscvqpudz, void, env, i32) +DEF_HELPER_2(xscvqpuwz, void, env, i32) DEF_HELPER_2(xscvhpdp, void, env, i32) DEF_HELPER_2(xscvsdqp, void, env, i32) DEF_HELPER_2(xscvspdp, void, env, i32) diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx= -impl.inc.c index 8de8cd0..7f12908 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -819,6 +819,8 @@ GEN_VSX_HELPER_XT_XB_ENV(xscvdpspn, 0x16, 0x10, 0, PPC2= _VSX207) GEN_VSX_HELPER_2(xscvqpdp, 0x04, 0x1A, 0x14, PPC2_ISA300) GEN_VSX_HELPER_2(xscvqpsdz, 0x04, 0x1A, 0x19, PPC2_ISA300) GEN_VSX_HELPER_2(xscvqpswz, 0x04, 0x1A, 0x09, PPC2_ISA300) +GEN_VSX_HELPER_2(xscvqpudz, 0x04, 0x1A, 0x11, PPC2_ISA300) +GEN_VSX_HELPER_2(xscvqpuwz, 0x04, 0x1A, 0x01, PPC2_ISA300) GEN_VSX_HELPER_2(xscvhpdp, 0x16, 0x15, 0x10, PPC2_ISA300) GEN_VSX_HELPER_2(xscvsdqp, 0x04, 0x1A, 0x0A, PPC2_ISA300) GEN_VSX_HELPER_2(xscvspdp, 0x12, 0x14, 0, PPC2_VSX) diff --git a/target/ppc/translate/vsx-ops.inc.c b/target/ppc/translate/vsx-= ops.inc.c index e20ca32..5030c4a 100644 --- a/target/ppc/translate/vsx-ops.inc.c +++ b/target/ppc/translate/vsx-ops.inc.c @@ -131,6 +131,8 @@ GEN_VSX_XFORM_300_EO(xscvdpqp, 0x04, 0x1A, 0x16, 0x0000= 0001), GEN_VSX_XFORM_300_EO(xscvqpdp, 0x04, 0x1A, 0x14, 0x0), GEN_VSX_XFORM_300_EO(xscvqpsdz, 0x04, 0x1A, 0x19, 0x00000001), GEN_VSX_XFORM_300_EO(xscvqpswz, 0x04, 0x1A, 0x09, 0x00000001), +GEN_VSX_XFORM_300_EO(xscvqpudz, 0x04, 0x1A, 0x11, 0x00000001), +GEN_VSX_XFORM_300_EO(xscvqpuwz, 0x04, 0x1A, 0x01, 0x00000001), =20 #ifdef TARGET_PPC64 GEN_XX2FORM_EO(xsxexpdp, 0x16, 0x15, 0x00, PPC2_ISA300), --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Wed, 22 Feb 2017 01:34:12 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndL73Lwz9sN9; Wed, 22 Feb 2017 17:33:56 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745238; bh=WW6LGJpRT07wE1B7tiU40y+v2BMzdzaIH62KyPF6lO0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cOn0PtQF0h5vES+vf4liRrj8ZXyE1HaJ+IrLTLAmszVmHwuKKic80vqJQKUBZ1VHN 7A1sXK6nA1juv6U3xZ/WpsOosvEwBJc20VvxDaXh7lQc/sehO2lt/8WWmm0Ieg6zIG A89CGxxlloofgdl38WTTdNCjvMwm5DXqferxmKWc= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:32 +1100 Message-Id: <20170222063348.32176-28-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 27/43] target/ppc: Fix LPCR DPFD mask define X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, Suraj Jitindar Singh , imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Suraj Jitindar Singh The DPFD field in the LPCR is 3 bits wide. This has always been defined as 0x3 << shift which indicates a 2 bit field, which is incorrect. Correct this. Signed-off-by: Suraj Jitindar Singh Signed-off-by: David Gibson --- target/ppc/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index bc2a2ce..bb96dd5 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -381,7 +381,7 @@ struct ppc_slb_t { #define LPCR_ISL (1ull << (63 - 2)) #define LPCR_KBV (1ull << (63 - 3)) #define LPCR_DPFD_SHIFT (63 - 11) -#define LPCR_DPFD (0x3ull << LPCR_DPFD_SHIFT) +#define LPCR_DPFD (0x7ull << LPCR_DPFD_SHIFT) #define LPCR_VRMASD_SHIFT (63 - 16) #define LPCR_VRMASD (0x1full << LPCR_VRMASD_SHIFT) #define LPCR_RMLS_SHIFT (63 - 37) --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487747683240527.941745079967; Tue, 21 Feb 2017 23:14:43 -0800 (PST) Received: from localhost ([::1]:50343 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgR8L-0001zp-Uv for importer@patchew.org; Wed, 22 Feb 2017 02:14:42 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38043) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQVB-00038k-Om for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:16 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV9-0008Bt-Ie for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:13 -0500 Received: from ozlabs.org ([103.22.144.67]:33813) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV8-00084f-4d; Wed, 22 Feb 2017 01:34:11 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndL5bYjz9sNB; Wed, 22 Feb 2017 17:33:56 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745238; bh=88hqjLjXFHdCI2YgvI3o+13sTRqA2sYhmUTqlCDPNrI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NFTvJsVTUeqZwy1jEjN0jLTaoRPVWLP0PaS8Qv6xPSbdx4/tEOANHutnHW7YVfged TOoiQrP7DmTxnoZK+xak20l7RQ2J4F9eiDgjP4Aq3lDxorHZ2ErpEuPjzUuIP+uW9L TgQkyDoaeVWDdGJlnaRJ6FsAOIk343qQswnAMrXw= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:33 +1100 Message-Id: <20170222063348.32176-29-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 28/43] target/ppc/POWER9: Add ISAv3.00 MMU definition X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, Suraj Jitindar Singh , imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Suraj Jitindar Singh POWER9 processors implement the mmu as defined in version 3.00 of the ISA. Add a definition for this mmu model and set the POWER9 cpu model to use this mmu model. Signed-off-by: Suraj Jitindar Singh Signed-off-by: David Gibson --- target/ppc/cpu-qom.h | 5 ++++- target/ppc/mmu_helper.c | 2 ++ target/ppc/translate_init.c | 3 +-- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index b7977ba..4e3132b 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -86,10 +86,13 @@ enum powerpc_mmu_t { POWERPC_MMU_2_07 =3D POWERPC_MMU_64 | POWERPC_MMU_1TSEG | POWERPC_MMU_64K | POWERPC_MMU_AMR | 0x00000004, - /* FIXME Add POWERPC_MMU_3_OO defines */ /* Architecture 2.07 "degraded" (no 1T segments) */ POWERPC_MMU_2_07a =3D POWERPC_MMU_64 | POWERPC_MMU_AMR | 0x00000004, + /* Architecture 3.00 variant */ + POWERPC_MMU_3_00 =3D POWERPC_MMU_64 | POWERPC_MMU_1TSEG + | POWERPC_MMU_64K + | POWERPC_MMU_AMR | 0x00000005, }; =20 /*************************************************************************= ****/ diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index f746f53..172a305 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -1935,6 +1935,7 @@ void ppc_tlb_invalidate_all(CPUPPCState *env) case POWERPC_MMU_2_06a: case POWERPC_MMU_2_07: case POWERPC_MMU_2_07a: + case POWERPC_MMU_3_00: #endif /* defined(TARGET_PPC64) */ env->tlb_need_flush =3D 0; tlb_flush(CPU(cpu)); @@ -1974,6 +1975,7 @@ void ppc_tlb_invalidate_one(CPUPPCState *env, target_= ulong addr) case POWERPC_MMU_2_06a: case POWERPC_MMU_2_07: case POWERPC_MMU_2_07a: + case POWERPC_MMU_3_00: /* tlbie invalidate TLBs for all segments */ /* XXX: given the fact that there are too many segments to invalid= ate, * and we still don't have a tlb_flush_mask(env, n, mask) in = QEMU, diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 76f79fa..84bf125 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -8816,8 +8816,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) (1ull << MSR_PMM) | (1ull << MSR_RI) | (1ull << MSR_LE); - /* Using 2.07 defines until new radix model is added. */ - pcc->mmu_model =3D POWERPC_MMU_2_07; + pcc->mmu_model =3D POWERPC_MMU_3_00; #if defined(CONFIG_SOFTMMU) pcc->handle_mmu_fault =3D ppc_hash64_handle_mmu_fault; /* segment page size remain the same */ --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Wed, 22 Feb 2017 01:34:11 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndL6KX8z9sN6; Wed, 22 Feb 2017 17:33:56 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745238; bh=Wibaa/Pd6hp6FoKVstA1XgwRNaRQgOrD0KHdMymU4g8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=g9yYdNDoi76D6fcTPE3dPYlZW6/53g+ETCjj2gfyz4JyAOECCtkvaQ6qICjRNQBaB k42y5SK6CUGXRAkr8l0623CLSmm9HoOSe6uDfSv3KJxxcG/qcwfDu3Kqv9jQ0Rxgo3 arQ4nuBiuH5Nyz5I8umXqhBBVJzDduseUuc+XLtA= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:34 +1100 Message-Id: <20170222063348.32176-30-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 29/43] target/ppc/POWER9: Adapt LPCR handling for POWER9 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, Suraj Jitindar Singh , imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Suraj Jitindar Singh The logical partitioning control register controls a threads operation based on the partition it is currently executing. Add new definitions and update the mask used when writing to the LPCR based on the POWER9 spec. Signed-off-by: Suraj Jitindar Singh Signed-off-by: David Gibson --- target/ppc/cpu.h | 18 ++++++++++++++++++ target/ppc/mmu-hash64.c | 8 ++++++++ target/ppc/translate_init.c | 24 ++++++++++++++++++------ 3 files changed, 44 insertions(+), 6 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index bb96dd5..425e79d 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -384,12 +384,19 @@ struct ppc_slb_t { #define LPCR_DPFD (0x7ull << LPCR_DPFD_SHIFT) #define LPCR_VRMASD_SHIFT (63 - 16) #define LPCR_VRMASD (0x1full << LPCR_VRMASD_SHIFT) +/* P9: Power-saving mode Exit Cause Enable (Upper Section) Mask */ +#define LPCR_PECE_U_SHIFT (63 - 19) +#define LPCR_PECE_U_MASK (0x7ull << LPCR_PECE_U_SHIFT) +#define LPCR_HVEE (1ull << (63 - 17)) /* Hypervisor Virt Exit Enab= le */ #define LPCR_RMLS_SHIFT (63 - 37) #define LPCR_RMLS (0xfull << LPCR_RMLS_SHIFT) #define LPCR_ILE (1ull << (63 - 38)) #define LPCR_AIL_SHIFT (63 - 40) /* Alternate interrupt location */ #define LPCR_AIL (3ull << LPCR_AIL_SHIFT) +#define LPCR_UPRT (1ull << (63 - 41)) /* Use Process Table */ +#define LPCR_EVIRT (1ull << (63 - 42)) /* Enhanced Virtualisation */ #define LPCR_ONL (1ull << (63 - 45)) +#define LPCR_LD (1ull << (63 - 46)) /* Large Decrementer */ #define LPCR_P7_PECE0 (1ull << (63 - 49)) #define LPCR_P7_PECE1 (1ull << (63 - 50)) #define LPCR_P7_PECE2 (1ull << (63 - 51)) @@ -398,11 +405,22 @@ struct ppc_slb_t { #define LPCR_P8_PECE2 (1ull << (63 - 49)) #define LPCR_P8_PECE3 (1ull << (63 - 50)) #define LPCR_P8_PECE4 (1ull << (63 - 51)) +/* P9: Power-saving mode Exit Cause Enable (Lower Section) Mask */ +#define LPCR_PECE_L_SHIFT (63 - 51) +#define LPCR_PECE_L_MASK (0x1full << LPCR_PECE_L_SHIFT) +#define LPCR_PDEE (1ull << (63 - 47)) /* Privileged Doorbell Exit = EN */ +#define LPCR_HDEE (1ull << (63 - 48)) /* Hyperv Doorbell Exit Enab= le */ +#define LPCR_EEE (1ull << (63 - 49)) /* External Exit Enable = */ +#define LPCR_DEE (1ull << (63 - 50)) /* Decrementer Exit Enable = */ +#define LPCR_OEE (1ull << (63 - 51)) /* Other Exit Enable = */ #define LPCR_MER (1ull << (63 - 52)) +#define LPCR_GTSE (1ull << (63 - 53)) /* Guest Translation Shootdo= wn */ #define LPCR_TC (1ull << (63 - 54)) +#define LPCR_HEIC (1ull << (63 - 59)) /* HV Extern Interrupt Contr= ol */ #define LPCR_LPES0 (1ull << (63 - 60)) #define LPCR_LPES1 (1ull << (63 - 61)) #define LPCR_RMI (1ull << (63 - 62)) +#define LPCR_HVICE (1ull << (63 - 62)) /* HV Virtualisation Int Ena= ble */ #define LPCR_HDICE (1ull << (63 - 63)) =20 #define msr_sf ((env->msr >> MSR_SF) & 1) diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index 2791f29..c09255d 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -1062,6 +1062,14 @@ void helper_store_lpcr(CPUPPCState *env, target_ulon= g val) LPCR_P8_PECE2 | LPCR_P8_PECE3 | LPCR_P8_PECE4 | LPCR_MER | LPCR_TC | LPCR_LPES0 | LPCR_HDICE); break; + case POWERPC_MMU_3_00: /* P9 */ + lpcr =3D val & (LPCR_VPM1 | LPCR_ISL | LPCR_KBV | LPCR_DPFD | + (LPCR_PECE_U_MASK & LPCR_HVEE) | LPCR_ILE | LPCR_AIL= | + LPCR_UPRT | LPCR_EVIRT | LPCR_ONL | + (LPCR_PECE_L_MASK & (LPCR_PDEE | LPCR_HDEE | LPCR_EE= E | + LPCR_DEE | LPCR_OEE)) | LPCR_MER | LPCR_GTSE | LPCR_= TC | + LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE); + break; default: ; } diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 84bf125..be35cbd 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -8870,12 +8870,24 @@ void cpu_ppc_set_papr(PowerPCCPU *cpu) lpcr->default_value &=3D ~LPCR_RMLS; lpcr->default_value |=3D 1ull << LPCR_RMLS_SHIFT; =20 - /* P7 and P8 has slightly different PECE bits, mostly because P8 adds - * bit 47 and 48 which are reserved on P7. Here we set them all, which - * will work as expected for both implementations - */ - lpcr->default_value |=3D LPCR_P8_PECE0 | LPCR_P8_PECE1 | LPCR_P8_PECE2= | - LPCR_P8_PECE3 | LPCR_P8_PECE4; + switch (env->mmu_model) { + case POWERPC_MMU_3_00: + /* By default we choose legacy mode and switch to new hash or radix + * when a register process table hcall is made. So disable process + * tables and guest translation shootdown by default + */ + lpcr->default_value &=3D ~(LPCR_UPRT | LPCR_GTSE); + lpcr->default_value |=3D LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_D= EE | + LPCR_OEE; + break; + default: + /* P7 and P8 has slightly different PECE bits, mostly because P8 a= dds + * bit 47 and 48 which are reserved on P7. Here we set them all, w= hich + * will work as expected for both implementations + */ + lpcr->default_value |=3D LPCR_P8_PECE0 | LPCR_P8_PECE1 | LPCR_P8_P= ECE2 | + LPCR_P8_PECE3 | LPCR_P8_PECE4; + } =20 /* We should be followed by a CPU reset but update the active value * just in case... --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487747177176933.3426861258818; Tue, 21 Feb 2017 23:06:17 -0800 (PST) Received: from localhost ([::1]:50302 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgR0A-0008QM-SK for importer@patchew.org; Wed, 22 Feb 2017 02:06:14 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38021) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQVB-00038C-BN for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:15 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV8-00089x-Jf for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:13 -0500 Received: from ozlabs.org ([103.22.144.67]:43625) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV8-00084e-6f; Wed, 22 Feb 2017 01:34:10 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndL4qg7z9sD6; Wed, 22 Feb 2017 17:33:57 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745238; bh=npGaOC2qNlS+KzR6nqoRUfKeiyYWLmeJJN+EFhC/3YA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VeXYUFj1QObdRlrKDhKfl5OURvYZWuagGUD7mM+VgqIgHJ/EyYKKjyMrnTCvcqXKk pi36Lyfpikl/oIoPCo3KYZ2nWl1em65ET2VUnSXvI7LDncAPmVRM/yGHw5zPP0k6dv sLHvZwwU3BdJyJuLr4ZzTqnWuvaLTi2uQAwUVUws= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:35 +1100 Message-Id: <20170222063348.32176-31-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 30/43] target/ppc/POWER9: Direct all instr and data storage interrupts to the hypv X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, Suraj Jitindar Singh , imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Suraj Jitindar Singh The vpm0 bit was removed from the LPCR in POWER9, this bit controlled whether ISI and DSI interrupts were directed to the hypervisor or the partition. These interrupts now go to the hypervisor irrespective, thus it is no longer necessary to check the vmp0 bit in the LPCR. Signed-off-by: Suraj Jitindar Singh Signed-off-by: David Gibson --- target/ppc/mmu-hash64.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index c09255d..76669ed 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -652,7 +652,15 @@ static void ppc_hash64_set_isi(CPUState *cs, CPUPPCSta= te *env, if (msr_ir) { vpm =3D !!(env->spr[SPR_LPCR] & LPCR_VPM1); } else { - vpm =3D !!(env->spr[SPR_LPCR] & LPCR_VPM0); + switch (env->mmu_model) { + case POWERPC_MMU_3_00: + /* Field deprecated in ISAv3.00 - interrupts always go to hype= rv */ + vpm =3D true; + break; + default: + vpm =3D !!(env->spr[SPR_LPCR] & LPCR_VPM0); + break; + } } if (vpm && !msr_hv) { cs->exception_index =3D POWERPC_EXCP_HISI; @@ -670,7 +678,15 @@ static void ppc_hash64_set_dsi(CPUState *cs, CPUPPCSta= te *env, uint64_t dar, if (msr_dr) { vpm =3D !!(env->spr[SPR_LPCR] & LPCR_VPM1); } else { - vpm =3D !!(env->spr[SPR_LPCR] & LPCR_VPM0); + switch (env->mmu_model) { + case POWERPC_MMU_3_00: + /* Field deprecated in ISAv3.00 - interrupts always go to hype= rv */ + vpm =3D true; + break; + default: + vpm =3D !!(env->spr[SPR_LPCR] & LPCR_VPM0); + break; + } } if (vpm && !msr_hv) { cs->exception_index =3D POWERPC_EXCP_HDSI; --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 148774756133918.15905389887996; Tue, 21 Feb 2017 23:12:41 -0800 (PST) Received: from localhost ([::1]:50335 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgR6O-00089H-18 for importer@patchew.org; Wed, 22 Feb 2017 02:12:40 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38184) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQVE-0003CL-Pw for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQVC-0008EA-05 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:16 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:45513) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQVB-0008BQ-HY; Wed, 22 Feb 2017 01:34:13 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndM3gCbz9sNM; Wed, 22 Feb 2017 17:33:57 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745239; bh=xBE6mcZKVoOKiJg/AsrTEjfEGEqNrOpId+zK9vQcxUs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=knsQyrrgbA/cEZw9ZNzuET+othyhwh6ejww+Q6LdSyZF4s6D7bkiDF+YXanGlfAJ6 6/JapdeQ2tupwkVMVp1JFWBVInd1Z43yIOUV+eUHh1OCZB5m05H9YKmqTrqLvVNaCF GQSTisg/ilWKuhBLtbvbWnKkfQjiwTW49ADZ2QHs= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:36 +1100 Message-Id: <20170222063348.32176-32-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 31/43] hw/pci-host/prep: Do not use hw_error() in realize function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Thomas Huth hw_error() is for CPU related errors only (it prints out a register dump and calls abort()), so we should not use it if we just failed to load the bios image. Apart from that, realize() functions should not exit directly but always set the errp with error_setg() in case of errors instead. Additionally, move some code around and delete the bios memory subregion again in case of such an error, so that we leave a clean state when returning to the caller. Signed-off-by: Thomas Huth Reviewed-by: Herv=C3=A9 Poussineau Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: David Gibson --- hw/pci-host/prep.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 5580293..260a119 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -309,7 +309,6 @@ static void raven_realize(PCIDevice *d, Error **errp) memory_region_set_readonly(&s->bios, true); memory_region_add_subregion(get_system_memory(), (uint32_t)(-BIOS_SIZE= ), &s->bios); - vmstate_register_ram_global(&s->bios); if (s->bios_name) { filename =3D qemu_find_file(QEMU_FILE_TYPE_BIOS, s->bios_name); if (filename) { @@ -328,12 +327,15 @@ static void raven_realize(PCIDevice *d, Error **errp) } } } + g_free(filename); if (bios_size < 0 || bios_size > BIOS_SIZE) { - /* FIXME should error_setg() */ - hw_error("qemu: could not load bios image '%s'\n", s->bios_nam= e); + memory_region_del_subregion(get_system_memory(), &s->bios); + error_setg(errp, "Could not load bios image '%s'", s->bios_nam= e); + return; } - g_free(filename); } + + vmstate_register_ram_global(&s->bios); } =20 static const VMStateDescription vmstate_raven =3D { @@ -361,7 +363,6 @@ static void raven_class_init(ObjectClass *klass, void *= data) /* * Reason: PCI-facing part of the host bridge, not usable without * the host-facing part, which can't be device_add'ed, yet. - * Reason: realize() method uses hw_error(). */ dc->cannot_instantiate_with_device_add_yet =3D true; } --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487747951445586.2729043232447; Tue, 21 Feb 2017 23:19:11 -0800 (PST) Received: from localhost ([::1]:50371 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgRCf-0006Ct-0N for importer@patchew.org; Wed, 22 Feb 2017 02:19:10 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37963) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQVA-00037Q-JE for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:16 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV7-000872-Cf for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:12 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:42217) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV6-00080k-Et; Wed, 22 Feb 2017 01:34:09 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndL11yyz9sDB; Wed, 22 Feb 2017 17:33:55 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745238; bh=C7Jv7H9e+em0EKxNkb1fScMdiG09Tm1nrC2aFKUQ/mU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QLR+z8v/N/rXAKx2UOrR7BPrSy+ghv6BvifMlDY/VQ0FJeeIppBSRodv/ejx3j1ws bBauzBfgeVUWUZVbLp+XK0Xpk1v3bo/E6QWPkPcwDwjcQqJM8FbgwBDiNSumsJqsPp +++vmzaaExQPcqTmXbiv8ZhmXwDpl5dyUDo+sZFE= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:37 +1100 Message-Id: <20170222063348.32176-33-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 32/43] machine: move possible_cpus to MachineState X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov so that it would be possible to reuse it with spapr/virt-aarch64 targets. Signed-off-by: Igor Mammedov Signed-off-by: David Gibson --- hw/i386/pc.c | 57 ++++++++++++++++++++++++++----------------------= ---- include/hw/boards.h | 1 + include/hw/i386/pc.h | 1 - 3 files changed, 30 insertions(+), 29 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 60b0946..04c6e59 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -707,7 +707,8 @@ static void pc_build_smbios(PCMachineState *pcms) size_t smbios_tables_len, smbios_anchor_len; struct smbios_phys_mem_area *mem_array; unsigned i, array_count; - X86CPU *cpu =3D X86_CPU(pcms->possible_cpus->cpus[0].cpu); + MachineState *ms =3D MACHINE(pcms); + X86CPU *cpu =3D X86_CPU(ms->possible_cpus->cpus[0].cpu); =20 /* tell smbios about cpuid version and features */ smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]= ); @@ -1111,7 +1112,7 @@ static void pc_new_cpu(const char *typename, int64_t = apic_id, Error **errp) void pc_hot_add_cpu(const int64_t id, Error **errp) { ObjectClass *oc; - PCMachineState *pcms =3D PC_MACHINE(qdev_get_machine()); + MachineState *ms =3D MACHINE(qdev_get_machine()); int64_t apic_id =3D x86_cpu_apic_id_from_index(id); Error *local_err =3D NULL; =20 @@ -1127,8 +1128,8 @@ void pc_hot_add_cpu(const int64_t id, Error **errp) return; } =20 - assert(pcms->possible_cpus->cpus[0].cpu); /* BSP is always present */ - oc =3D OBJECT_CLASS(CPU_GET_CLASS(pcms->possible_cpus->cpus[0].cpu)); + assert(ms->possible_cpus->cpus[0].cpu); /* BSP is always present */ + oc =3D OBJECT_CLASS(CPU_GET_CLASS(ms->possible_cpus->cpus[0].cpu)); pc_new_cpu(object_class_get_name(oc), apic_id, &local_err); if (local_err) { error_propagate(errp, local_err); @@ -1178,11 +1179,11 @@ void pc_cpus_init(PCMachineState *pcms) * This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init(). */ pcms->apic_id_limit =3D x86_cpu_apic_id_from_index(max_cpus - 1) + 1; - pcms->possible_cpus =3D g_malloc0(sizeof(CPUArchIdList) + - sizeof(CPUArchId) * max_cpus); + machine->possible_cpus =3D g_malloc0(sizeof(CPUArchIdList) + + sizeof(CPUArchId) * max_cpus); for (i =3D 0; i < max_cpus; i++) { - pcms->possible_cpus->cpus[i].arch_id =3D x86_cpu_apic_id_from_inde= x(i); - pcms->possible_cpus->len++; + machine->possible_cpus->cpus[i].arch_id =3D x86_cpu_apic_id_from_i= ndex(i); + machine->possible_cpus->len++; if (i < smp_cpus) { pc_new_cpu(typename, x86_cpu_apic_id_from_index(i), &error_fat= al); } @@ -1191,7 +1192,8 @@ void pc_cpus_init(PCMachineState *pcms) =20 static void pc_build_feature_control_file(PCMachineState *pcms) { - X86CPU *cpu =3D X86_CPU(pcms->possible_cpus->cpus[0].cpu); + MachineState *ms =3D MACHINE(pcms); + X86CPU *cpu =3D X86_CPU(ms->possible_cpus->cpus[0].cpu); CPUX86State *env =3D &cpu->env; uint32_t unused, ecx, edx; uint64_t feature_control_bits =3D 0; @@ -1787,21 +1789,20 @@ static int pc_apic_cmp(const void *a, const void *b) } =20 /* returns pointer to CPUArchId descriptor that matches CPU's apic_id - * in pcms->possible_cpus->cpus, if pcms->possible_cpus->cpus has no + * in ms->possible_cpus->cpus, if ms->possible_cpus->cpus has no * entry corresponding to CPU's apic_id returns NULL. */ -static CPUArchId *pc_find_cpu_slot(PCMachineState *pcms, CPUState *cpu, - int *idx) +static CPUArchId *pc_find_cpu_slot(MachineState *ms, CPUState *cpu, int *i= dx) { CPUClass *cc =3D CPU_GET_CLASS(cpu); CPUArchId apic_id, *found_cpu; =20 apic_id.arch_id =3D cc->get_arch_id(CPU(cpu)); - found_cpu =3D bsearch(&apic_id, pcms->possible_cpus->cpus, - pcms->possible_cpus->len, sizeof(*pcms->possible_cpus->cpus), + found_cpu =3D bsearch(&apic_id, ms->possible_cpus->cpus, + ms->possible_cpus->len, sizeof(*ms->possible_cpus->cpus), pc_apic_cmp); if (found_cpu && idx) { - *idx =3D found_cpu - pcms->possible_cpus->cpus; + *idx =3D found_cpu - ms->possible_cpus->cpus; } return found_cpu; } @@ -1831,7 +1832,7 @@ static void pc_cpu_plug(HotplugHandler *hotplug_dev, fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); } =20 - found_cpu =3D pc_find_cpu_slot(pcms, CPU(dev), NULL); + found_cpu =3D pc_find_cpu_slot(MACHINE(pcms), CPU(dev), NULL); found_cpu->cpu =3D CPU(dev); out: error_propagate(errp, local_err); @@ -1844,7 +1845,7 @@ static void pc_cpu_unplug_request_cb(HotplugHandler *= hotplug_dev, Error *local_err =3D NULL; PCMachineState *pcms =3D PC_MACHINE(hotplug_dev); =20 - pc_find_cpu_slot(pcms, CPU(dev), &idx); + pc_find_cpu_slot(MACHINE(pcms), CPU(dev), &idx); assert(idx !=3D -1); if (idx =3D=3D 0) { error_setg(&local_err, "Boot CPU is unpluggable"); @@ -1878,7 +1879,7 @@ static void pc_cpu_unplug_cb(HotplugHandler *hotplug_= dev, goto out; } =20 - found_cpu =3D pc_find_cpu_slot(pcms, CPU(dev), NULL); + found_cpu =3D pc_find_cpu_slot(MACHINE(pcms), CPU(dev), NULL); found_cpu->cpu =3D NULL; object_unparent(OBJECT(dev)); =20 @@ -1936,13 +1937,15 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug= _dev, cpu->apic_id =3D apicid_from_topo_ids(smp_cores, smp_threads, &top= o); } =20 - cpu_slot =3D pc_find_cpu_slot(pcms, CPU(dev), &idx); + cpu_slot =3D pc_find_cpu_slot(MACHINE(pcms), CPU(dev), &idx); if (!cpu_slot) { + MachineState *ms =3D MACHINE(pcms); + x86_topo_ids_from_apicid(cpu->apic_id, smp_cores, smp_threads, &to= po); error_setg(errp, "Invalid CPU [socket: %u, core: %u, thread: %u] w= ith" " APIC ID %" PRIu32 ", valid index range 0:%d", topo.pkg_id, topo.core_id, topo.smt_id, cpu->apic_id, - pcms->possible_cpus->len - 1); + ms->possible_cpus->len - 1); return; } =20 @@ -2253,9 +2256,8 @@ static unsigned pc_cpu_index_to_socket_id(unsigned cp= u_index) =20 static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *machine) { - PCMachineState *pcms =3D PC_MACHINE(machine); - assert(pcms->possible_cpus); - return pcms->possible_cpus; + assert(machine->possible_cpus); + return machine->possible_cpus; } =20 static HotpluggableCPUList *pc_query_hotpluggable_cpus(MachineState *machi= ne) @@ -2263,19 +2265,18 @@ static HotpluggableCPUList *pc_query_hotpluggable_c= pus(MachineState *machine) int i; CPUState *cpu; HotpluggableCPUList *head =3D NULL; - PCMachineState *pcms =3D PC_MACHINE(machine); const char *cpu_type; =20 - cpu =3D pcms->possible_cpus->cpus[0].cpu; + cpu =3D machine->possible_cpus->cpus[0].cpu; assert(cpu); /* BSP is always present */ cpu_type =3D object_class_get_name(OBJECT_CLASS(CPU_GET_CLASS(cpu))); =20 - for (i =3D 0; i < pcms->possible_cpus->len; i++) { + for (i =3D 0; i < machine->possible_cpus->len; i++) { X86CPUTopoInfo topo; HotpluggableCPUList *list_item =3D g_new0(typeof(*list_item), 1); HotpluggableCPU *cpu_item =3D g_new0(typeof(*cpu_item), 1); CpuInstanceProperties *cpu_props =3D g_new0(typeof(*cpu_props), 1); - const uint32_t apic_id =3D pcms->possible_cpus->cpus[i].arch_id; + const uint32_t apic_id =3D machine->possible_cpus->cpus[i].arch_id; =20 x86_topo_ids_from_apicid(apic_id, smp_cores, smp_threads, &topo); =20 @@ -2289,7 +2290,7 @@ static HotpluggableCPUList *pc_query_hotpluggable_cpu= s(MachineState *machine) cpu_props->thread_id =3D topo.smt_id; cpu_item->props =3D cpu_props; =20 - cpu =3D pcms->possible_cpus->cpus[i].cpu; + cpu =3D machine->possible_cpus->cpus[i].cpu; if (cpu) { cpu_item->has_qom_path =3D true; cpu_item->qom_path =3D object_get_canonical_path(OBJECT(cpu)); diff --git a/include/hw/boards.h b/include/hw/boards.h index ac891a8..64e8c07 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -178,6 +178,7 @@ struct MachineState { char *initrd_filename; const char *cpu_model; AccelState *accelerator; + CPUArchIdList *possible_cpus; }; =20 #define DEFINE_MACHINE(namestr, machine_initfn) \ diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 079e8d9..d1f4554 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -73,7 +73,6 @@ struct PCMachineState { /* CPU and apic information: */ bool apic_xrupt_override; unsigned apic_id_limit; - CPUArchIdList *possible_cpus; uint16_t boot_cpus; =20 /* NUMA information: */ --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487746709848718.0627694360716; Tue, 21 Feb 2017 22:58:29 -0800 (PST) Received: from localhost ([::1]:50246 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQse-0000sR-Ey for importer@patchew.org; Wed, 22 Feb 2017 01:58:28 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38049) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQVB-00038p-S5 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:17 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV9-0008C7-Po for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:13 -0500 Received: from ozlabs.org ([103.22.144.67]:57945) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV9-000882-Ax; Wed, 22 Feb 2017 01:34:11 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndM11nnz9sN5; Wed, 22 Feb 2017 17:33:56 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745239; bh=z4gv7FiBlfmYK2ShpqciCQHtoGXc4r0H4EvO+Yq+/Ys=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FLUMOW6icGwmXo18Lk2hFTn+GwzNnkI6PnpFINBHh1rkt3bAU2i5dyxAMvKs10wO3 tmqJXRcMkqOFLKZzkdEveyaYONKl/tONmcr6u2dBVF4sr3g04N7GVKJfvxarkb3PFn s6qEfFe+svPgI7D8Ptp32k86+jq0/zMRbzI7Lp30= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:38 +1100 Message-Id: <20170222063348.32176-34-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 33/43] pc: move pcms->possible_cpus init out of pc_cpus_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov possible_cpus could be initialized earlier then cpu objects, i.e. when -smp is parsed so move init code to possible_cpu_arch_ids() interface func and do initialization on the first call. it should help later with making -numa cpu/-smp parsing a machine state properties. Signed-off-by: Igor Mammedov Signed-off-by: David Gibson --- hw/i386/pc.c | 35 ++++++++++++++++++++++++----------- 1 file changed, 24 insertions(+), 11 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 04c6e59..a187748 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1144,7 +1144,9 @@ void pc_cpus_init(PCMachineState *pcms) ObjectClass *oc; const char *typename; gchar **model_pieces; + const CPUArchIdList *possible_cpus; MachineState *machine =3D MACHINE(pcms); + MachineClass *mc =3D MACHINE_GET_CLASS(pcms); =20 /* init CPUs */ if (machine->cpu_model =3D=3D NULL) { @@ -1179,14 +1181,9 @@ void pc_cpus_init(PCMachineState *pcms) * This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init(). */ pcms->apic_id_limit =3D x86_cpu_apic_id_from_index(max_cpus - 1) + 1; - machine->possible_cpus =3D g_malloc0(sizeof(CPUArchIdList) + - sizeof(CPUArchId) * max_cpus); - for (i =3D 0; i < max_cpus; i++) { - machine->possible_cpus->cpus[i].arch_id =3D x86_cpu_apic_id_from_i= ndex(i); - machine->possible_cpus->len++; - if (i < smp_cpus) { - pc_new_cpu(typename, x86_cpu_apic_id_from_index(i), &error_fat= al); - } + possible_cpus =3D mc->possible_cpu_arch_ids(machine); + for (i =3D 0; i < smp_cpus; i++) { + pc_new_cpu(typename, possible_cpus->cpus[i].arch_id, &error_fatal); } } =20 @@ -2254,10 +2251,26 @@ static unsigned pc_cpu_index_to_socket_id(unsigned = cpu_index) return topo.pkg_id; } =20 -static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *machine) +static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *ms) { - assert(machine->possible_cpus); - return machine->possible_cpus; + int i; + + if (ms->possible_cpus) { + /* + * make sure that max_cpus hasn't changed since the first use, i.e. + * -smp hasn't been parsed after it + */ + assert(ms->possible_cpus->len =3D=3D max_cpus); + return ms->possible_cpus; + } + + ms->possible_cpus =3D g_malloc0(sizeof(CPUArchIdList) + + sizeof(CPUArchId) * max_cpus); + ms->possible_cpus->len =3D max_cpus; + for (i =3D 0; i < ms->possible_cpus->len; i++) { + ms->possible_cpus->cpus[i].arch_id =3D x86_cpu_apic_id_from_index(= i); + } + return ms->possible_cpus; } =20 static HotpluggableCPUList *pc_query_hotpluggable_cpus(MachineState *machi= ne) --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487747244080948.6980767310833; Tue, 21 Feb 2017 23:07:24 -0800 (PST) Received: from localhost ([::1]:50309 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgR1E-000113-Ou for importer@patchew.org; Wed, 22 Feb 2017 02:07:20 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38020) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQVB-00038A-AQ for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:17 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV8-00088q-10 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:13 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:36469) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV7-00081x-GJ; Wed, 22 Feb 2017 01:34:09 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndL2KRVz9sMh; Wed, 22 Feb 2017 17:33:56 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745238; bh=gMlJMzAhfUFu6BEQBzYE9peKlJ/ol81EXhdPQ0JX7vg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kurLNiXkL6tm3JTIt3yzxGYpPjRezdBAKK/ULD+VuwCTGBYtL2Z8XdYF1+HqGgki+ Ul/LVcdXysawLL+5pjdqtwjZVbVasLFwIEZ2KHQODK1BjhEZc4HVHuqlPsEOW1vRaF pfEaY7zdlc26a4ofW3GoLxVQSU2yCAIr/9V+jg2k= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:39 +1100 Message-Id: <20170222063348.32176-35-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 34/43] pc: calculate topology only once when possible_cpus is initialised X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov Fill in CpuInstanceProperties once at board init time and just copy them whenever query_hotpluggable_cpus() is called. It will keep topology info always available without need to recalculate it every time it's needed. Considering it has NUMA node id, it will be used to keep NUMA node to cpu mapping instead of numa_info[i].node_cpu bitmasks. Signed-off-by: Igor Mammedov Signed-off-by: David Gibson --- hw/i386/pc.c | 24 ++++++++++++------------ include/hw/boards.h | 2 ++ 2 files changed, 14 insertions(+), 12 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index a187748..50ba977 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -2268,7 +2268,17 @@ static const CPUArchIdList *pc_possible_cpu_arch_ids= (MachineState *ms) sizeof(CPUArchId) * max_cpus); ms->possible_cpus->len =3D max_cpus; for (i =3D 0; i < ms->possible_cpus->len; i++) { + X86CPUTopoInfo topo; + ms->possible_cpus->cpus[i].arch_id =3D x86_cpu_apic_id_from_index(= i); + x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, + smp_cores, smp_threads, &topo); + ms->possible_cpus->cpus[i].props.has_socket_id =3D true; + ms->possible_cpus->cpus[i].props.socket_id =3D topo.pkg_id; + ms->possible_cpus->cpus[i].props.has_core_id =3D true; + ms->possible_cpus->cpus[i].props.core_id =3D topo.core_id; + ms->possible_cpus->cpus[i].props.has_thread_id =3D true; + ms->possible_cpus->cpus[i].props.thread_id =3D topo.smt_id; } return ms->possible_cpus; } @@ -2285,23 +2295,13 @@ static HotpluggableCPUList *pc_query_hotpluggable_c= pus(MachineState *machine) cpu_type =3D object_class_get_name(OBJECT_CLASS(CPU_GET_CLASS(cpu))); =20 for (i =3D 0; i < machine->possible_cpus->len; i++) { - X86CPUTopoInfo topo; HotpluggableCPUList *list_item =3D g_new0(typeof(*list_item), 1); HotpluggableCPU *cpu_item =3D g_new0(typeof(*cpu_item), 1); - CpuInstanceProperties *cpu_props =3D g_new0(typeof(*cpu_props), 1); - const uint32_t apic_id =3D machine->possible_cpus->cpus[i].arch_id; - - x86_topo_ids_from_apicid(apic_id, smp_cores, smp_threads, &topo); =20 cpu_item->type =3D g_strdup(cpu_type); cpu_item->vcpus_count =3D 1; - cpu_props->has_socket_id =3D true; - cpu_props->socket_id =3D topo.pkg_id; - cpu_props->has_core_id =3D true; - cpu_props->core_id =3D topo.core_id; - cpu_props->has_thread_id =3D true; - cpu_props->thread_id =3D topo.smt_id; - cpu_item->props =3D cpu_props; + cpu_item->props =3D g_memdup(&machine->possible_cpus->cpus[i].prop= s, + sizeof(*cpu_item->props)); =20 cpu =3D machine->possible_cpus->cpus[i].cpu; if (cpu) { diff --git a/include/hw/boards.h b/include/hw/boards.h index 64e8c07..4023b38 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -46,9 +46,11 @@ void machine_register_compat_props(MachineState *machine= ); * CPUArchId: * @arch_id - architecture-dependent CPU ID of present or possible CPU * @cpu - pointer to corresponding CPU object if it's present on NULL othe= rwise + * @props - CPU object properties, initialized by board */ typedef struct { uint64_t arch_id; + CpuInstanceProperties props; struct CPUState *cpu; } CPUArchId; =20 --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487747283412585.9462831681466; Tue, 21 Feb 2017 23:08:03 -0800 (PST) Received: from localhost ([::1]:50311 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgR1u-0001vZ-1Y for importer@patchew.org; Wed, 22 Feb 2017 02:08:02 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38252) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQVG-0003Ex-NZ for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:21 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQVD-0008Fm-5V for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:18 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:41909) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQVC-0008Cm-Lr; Wed, 22 Feb 2017 01:34:15 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndM5Ck1z9sNG; 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X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 35/43] pc: pass apic_id to pc_find_cpu_slot() directly so lookup could be done without CPU object X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov Signed-off-by: Igor Mammedov Signed-off-by: David Gibson --- hw/i386/pc.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 50ba977..3475174 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1789,12 +1789,11 @@ static int pc_apic_cmp(const void *a, const void *b) * in ms->possible_cpus->cpus, if ms->possible_cpus->cpus has no * entry corresponding to CPU's apic_id returns NULL. */ -static CPUArchId *pc_find_cpu_slot(MachineState *ms, CPUState *cpu, int *i= dx) +static CPUArchId *pc_find_cpu_slot(MachineState *ms, uint32_t id, int *idx) { - CPUClass *cc =3D CPU_GET_CLASS(cpu); CPUArchId apic_id, *found_cpu; =20 - apic_id.arch_id =3D cc->get_arch_id(CPU(cpu)); + apic_id.arch_id =3D id; found_cpu =3D bsearch(&apic_id, ms->possible_cpus->cpus, ms->possible_cpus->len, sizeof(*ms->possible_cpus->cpus), pc_apic_cmp); @@ -1810,6 +1809,7 @@ static void pc_cpu_plug(HotplugHandler *hotplug_dev, CPUArchId *found_cpu; HotplugHandlerClass *hhc; Error *local_err =3D NULL; + X86CPU *cpu =3D X86_CPU(dev); PCMachineState *pcms =3D PC_MACHINE(hotplug_dev); =20 if (pcms->acpi_dev) { @@ -1829,7 +1829,7 @@ static void pc_cpu_plug(HotplugHandler *hotplug_dev, fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); } =20 - found_cpu =3D pc_find_cpu_slot(MACHINE(pcms), CPU(dev), NULL); + found_cpu =3D pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, NULL); found_cpu->cpu =3D CPU(dev); out: error_propagate(errp, local_err); @@ -1840,9 +1840,10 @@ static void pc_cpu_unplug_request_cb(HotplugHandler = *hotplug_dev, int idx =3D -1; HotplugHandlerClass *hhc; Error *local_err =3D NULL; + X86CPU *cpu =3D X86_CPU(dev); PCMachineState *pcms =3D PC_MACHINE(hotplug_dev); =20 - pc_find_cpu_slot(MACHINE(pcms), CPU(dev), &idx); + pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx); assert(idx !=3D -1); if (idx =3D=3D 0) { error_setg(&local_err, "Boot CPU is unpluggable"); @@ -1867,6 +1868,7 @@ static void pc_cpu_unplug_cb(HotplugHandler *hotplug_= dev, CPUArchId *found_cpu; HotplugHandlerClass *hhc; Error *local_err =3D NULL; + X86CPU *cpu =3D X86_CPU(dev); PCMachineState *pcms =3D PC_MACHINE(hotplug_dev); =20 hhc =3D HOTPLUG_HANDLER_GET_CLASS(pcms->acpi_dev); @@ -1876,7 +1878,7 @@ static void pc_cpu_unplug_cb(HotplugHandler *hotplug_= dev, goto out; } =20 - found_cpu =3D pc_find_cpu_slot(MACHINE(pcms), CPU(dev), NULL); + found_cpu =3D pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, NULL); found_cpu->cpu =3D NULL; object_unparent(OBJECT(dev)); =20 @@ -1934,7 +1936,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_d= ev, cpu->apic_id =3D apicid_from_topo_ids(smp_cores, smp_threads, &top= o); } =20 - cpu_slot =3D pc_find_cpu_slot(MACHINE(pcms), CPU(dev), &idx); + cpu_slot =3D pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx); if (!cpu_slot) { MachineState *ms =3D MACHINE(pcms); =20 --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487747788965619.459134261667; Tue, 21 Feb 2017 23:16:28 -0800 (PST) Received: from localhost ([::1]:50362 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgRA1-0003Wz-Ej for importer@patchew.org; Wed, 22 Feb 2017 02:16:25 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38164) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQVE-0003Bb-Bm for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQVB-0008De-IL for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:16 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:44811) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQVB-00089m-04; Wed, 22 Feb 2017 01:34:13 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndM2WtYz9sNK; Wed, 22 Feb 2017 17:33:57 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745239; bh=e+W7bc4DyjEgWIwhfS+yXsbOzWyGzqNfiU+DVO0XSCw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZqYbLpP4P9n526zWN49rb+yZw5UQzxFsvngxh4N6H/jElrZgH6VJY/WlH17ZW7E6j ATa2XywcT9/gLk8n+X5TMF3WsiqwKZil7RswmrF8J/TkeDTC4vfR5qL3+2/shk9wUt SmZooYpFBXtv5T1aRhYSKAOgnaU16HxQSytRzCZY= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:41 +1100 Message-Id: <20170222063348.32176-37-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 36/43] change CPUArchId.cpu type to Object* X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov so it could be reused for SPAPR cores as well Signed-off-by: Igor Mammedov Signed-off-by: David Gibson --- hw/acpi/cpu.c | 2 +- hw/i386/pc.c | 8 ++++---- include/hw/boards.h | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/acpi/cpu.c b/hw/acpi/cpu.c index 6017ca0..8c719d3 100644 --- a/hw/acpi/cpu.c +++ b/hw/acpi/cpu.c @@ -198,7 +198,7 @@ void cpu_hotplug_hw_init(MemoryRegion *as, Object *owne= r, state->dev_count =3D id_list->len; state->devs =3D g_new0(typeof(*state->devs), state->dev_count); for (i =3D 0; i < id_list->len; i++) { - state->devs[i].cpu =3D id_list->cpus[i].cpu; + state->devs[i].cpu =3D CPU(id_list->cpus[i].cpu); state->devs[i].arch_id =3D id_list->cpus[i].arch_id; } memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state, diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 3475174..138022d 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1830,7 +1830,7 @@ static void pc_cpu_plug(HotplugHandler *hotplug_dev, } =20 found_cpu =3D pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, NULL); - found_cpu->cpu =3D CPU(dev); + found_cpu->cpu =3D OBJECT(dev); out: error_propagate(errp, local_err); } @@ -2288,13 +2288,13 @@ static const CPUArchIdList *pc_possible_cpu_arch_id= s(MachineState *ms) static HotpluggableCPUList *pc_query_hotpluggable_cpus(MachineState *machi= ne) { int i; - CPUState *cpu; + Object *cpu; HotpluggableCPUList *head =3D NULL; const char *cpu_type; =20 cpu =3D machine->possible_cpus->cpus[0].cpu; assert(cpu); /* BSP is always present */ - cpu_type =3D object_class_get_name(OBJECT_CLASS(CPU_GET_CLASS(cpu))); + cpu_type =3D object_get_typename(cpu); =20 for (i =3D 0; i < machine->possible_cpus->len; i++) { HotpluggableCPUList *list_item =3D g_new0(typeof(*list_item), 1); @@ -2308,7 +2308,7 @@ static HotpluggableCPUList *pc_query_hotpluggable_cpu= s(MachineState *machine) cpu =3D machine->possible_cpus->cpus[i].cpu; if (cpu) { cpu_item->has_qom_path =3D true; - cpu_item->qom_path =3D object_get_canonical_path(OBJECT(cpu)); + cpu_item->qom_path =3D object_get_canonical_path(cpu); } =20 list_item->value =3D cpu_item; diff --git a/include/hw/boards.h b/include/hw/boards.h index 4023b38..60209df 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -51,7 +51,7 @@ void machine_register_compat_props(MachineState *machine); typedef struct { uint64_t arch_id; CpuInstanceProperties props; - struct CPUState *cpu; + Object *cpu; } CPUArchId; =20 /** --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Wed, 22 Feb 2017 01:34:15 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndM4ky3z9s7c; Wed, 22 Feb 2017 17:33:57 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745239; bh=aj8Sg906VEP1uTei1CwmEZu0i18+YUgPGZtOpuYXpyI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=P7elMVYe7L2fOIv6T77vV47gXZ55kQ1TMJDyO7fj8eHSobpxQyBS6cWj3ev9DPicu CBXdw6HZCVzDXNUzwNLPSHhFoCq2BVsT2kjiRScNzF1mA8TSVbs9901dZhrIK7npVE MMhUaX8FXIp0L+5nHg7mrviLPSVW5eWC5UKjPC0w= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:42 +1100 Message-Id: <20170222063348.32176-38-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 37/43] spapr: reuse machine->possible_cpus instead of cores[] X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov Replace SPAPR specific cores[] array with generic machine->possible_cpus and store core objects there. It makes cores bookkeeping similar to x86 cpus and will allow to unify similar code. It would allow to replace cpu_index based NUMA node mapping with iproperty based one (for -device created cores) since possible_cpus carries board defined topology/layout. Signed-off-by: Igor Mammedov Acked-by: David Gibson Signed-off-by: David Gibson --- hw/ppc/spapr.c | 129 ++++++++++++++++++++++++++++++++++-----------= ---- include/hw/ppc/spapr.h | 1 - 2 files changed, 90 insertions(+), 40 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 37cb338..a0aa69e 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1751,13 +1751,28 @@ static void spapr_validate_node_memory(MachineState= *machine, Error **errp) } } =20 +/* find cpu slot in machine->possible_cpus by core_id */ +static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *= idx) +{ + int index =3D id / smp_threads; + + if (index >=3D ms->possible_cpus->len) { + return NULL; + } + if (idx) { + *idx =3D index; + } + return &ms->possible_cpus->cpus[index]; +} + static void spapr_init_cpus(sPAPRMachineState *spapr) { MachineState *machine =3D MACHINE(spapr); MachineClass *mc =3D MACHINE_GET_CLASS(machine); char *type =3D spapr_get_cpu_core_type(machine->cpu_model); int smt =3D kvmppc_smt_threads(); - int spapr_max_cores, spapr_cores; + const CPUArchIdList *possible_cpus; + int boot_cores_nr =3D smp_cpus / smp_threads; int i; =20 if (!type) { @@ -1765,6 +1780,7 @@ static void spapr_init_cpus(sPAPRMachineState *spapr) exit(1); } =20 + possible_cpus =3D mc->possible_cpu_arch_ids(machine); if (mc->query_hotpluggable_cpus) { if (smp_cpus % smp_threads) { error_report("smp_cpus (%u) must be multiple of threads (%u)", @@ -1776,21 +1792,15 @@ static void spapr_init_cpus(sPAPRMachineState *spap= r) max_cpus, smp_threads); exit(1); } - - spapr_max_cores =3D max_cpus / smp_threads; - spapr_cores =3D smp_cpus / smp_threads; } else { if (max_cpus !=3D smp_cpus) { error_report("This machine version does not support CPU hotplu= g"); exit(1); } - - spapr_max_cores =3D QEMU_ALIGN_UP(smp_cpus, smp_threads) / smp_thr= eads; - spapr_cores =3D spapr_max_cores; + boot_cores_nr =3D possible_cpus->len; } =20 - spapr->cores =3D g_new0(Object *, spapr_max_cores); - for (i =3D 0; i < spapr_max_cores; i++) { + for (i =3D 0; i < possible_cpus->len; i++) { int core_id =3D i * smp_threads; =20 if (mc->query_hotpluggable_cpus) { @@ -1802,7 +1812,7 @@ static void spapr_init_cpus(sPAPRMachineState *spapr) qemu_register_reset(spapr_drc_reset, drc); } =20 - if (i < spapr_cores) { + if (i < boot_cores_nr) { Object *core =3D object_new(type); int nr_threads =3D smp_threads; =20 @@ -2491,10 +2501,11 @@ void *spapr_populate_hotplug_cpu_dt(CPUState *cs, i= nt *fdt_offset, static void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *de= v, Error **errp) { - sPAPRMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); + MachineState *ms =3D MACHINE(qdev_get_machine()); CPUCore *cc =3D CPU_CORE(dev); + CPUArchId *core_slot =3D spapr_find_cpu_slot(ms, cc->core_id, NULL); =20 - spapr->cores[cc->core_id / smp_threads] =3D NULL; + core_slot->cpu =3D NULL; object_unparent(OBJECT(dev)); } =20 @@ -2510,19 +2521,24 @@ static void spapr_core_unplug_request(HotplugHandler *hotplug_dev, DeviceState *d= ev, Error **errp) { - CPUCore *cc =3D CPU_CORE(dev); - int smt =3D kvmppc_smt_threads(); - int index =3D cc->core_id / smp_threads; - sPAPRDRConnector *drc =3D - spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * smt); + int index; + sPAPRDRConnector *drc; sPAPRDRConnectorClass *drck; Error *local_err =3D NULL; + CPUCore *cc =3D CPU_CORE(dev); + int smt =3D kvmppc_smt_threads(); =20 + if (!spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index)) { + error_setg(errp, "Unable to find CPU core with core-id: %d", + cc->core_id); + return; + } if (index =3D=3D 0) { error_setg(errp, "Boot CPU core may not be unplugged"); return; } =20 + drc =3D spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * = smt); g_assert(drc); =20 drck =3D SPAPR_DR_CONNECTOR_GET_CLASS(drc); @@ -2547,11 +2563,17 @@ static void spapr_core_plug(HotplugHandler *hotplug= _dev, DeviceState *dev, Error *local_err =3D NULL; void *fdt =3D NULL; int fdt_offset =3D 0; - int index =3D cc->core_id / smp_threads; int smt =3D kvmppc_smt_threads(); + CPUArchId *core_slot; + int index; =20 + core_slot =3D spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &= index); + if (!core_slot) { + error_setg(errp, "Unable to find CPU core with core-id: %d", + cc->core_id); + return; + } drc =3D spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * = smt); - spapr->cores[index] =3D OBJECT(dev); =20 g_assert(drc || !mc->query_hotpluggable_cpus); =20 @@ -2568,7 +2590,6 @@ static void spapr_core_plug(HotplugHandler *hotplug_d= ev, DeviceState *dev, drck->attach(drc, dev, fdt, fdt_offset, !dev->hotplugged, &local_e= rr); if (local_err) { g_free(fdt); - spapr->cores[index] =3D NULL; error_propagate(errp, local_err); return; } @@ -2590,6 +2611,7 @@ static void spapr_core_plug(HotplugHandler *hotplug_d= ev, DeviceState *dev, drck->set_isolation_state(drc, SPAPR_DR_ISOLATION_STATE_UNISOL= ATED); } } + core_slot->cpu =3D OBJECT(dev); } =20 static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *= dev, @@ -2597,13 +2619,12 @@ static void spapr_core_pre_plug(HotplugHandler *hot= plug_dev, DeviceState *dev, { MachineState *machine =3D MACHINE(OBJECT(hotplug_dev)); MachineClass *mc =3D MACHINE_GET_CLASS(hotplug_dev); - sPAPRMachineState *spapr =3D SPAPR_MACHINE(OBJECT(hotplug_dev)); - int spapr_max_cores =3D max_cpus / smp_threads; - int index; Error *local_err =3D NULL; CPUCore *cc =3D CPU_CORE(dev); char *base_core_type =3D spapr_get_cpu_core_type(machine->cpu_model); const char *type =3D object_get_typename(OBJECT(dev)); + CPUArchId *core_slot; + int index; =20 if (dev->hotplugged && !mc->query_hotpluggable_cpus) { error_setg(&local_err, "CPU hotplug not supported for this machine= "); @@ -2620,13 +2641,13 @@ static void spapr_core_pre_plug(HotplugHandler *hot= plug_dev, DeviceState *dev, goto out; } =20 - index =3D cc->core_id / smp_threads; - if (index < 0 || index >=3D spapr_max_cores) { + core_slot =3D spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &= index); + if (!core_slot) { error_setg(&local_err, "core id %d out of range", cc->core_id); goto out; } =20 - if (spapr->cores[index]) { + if (core_slot->cpu) { error_setg(&local_err, "core %d already populated", cc->core_id); goto out; } @@ -2758,29 +2779,58 @@ static unsigned spapr_cpu_index_to_socket_id(unsign= ed cpu_index) return cpu_index / smp_threads / smp_cores; } =20 +static const CPUArchIdList *spapr_possible_cpu_arch_ids(MachineState *mach= ine) +{ + int i; + int spapr_max_cores =3D max_cpus / smp_threads; + MachineClass *mc =3D MACHINE_GET_CLASS(machine); + + if (!mc->query_hotpluggable_cpus) { + spapr_max_cores =3D QEMU_ALIGN_UP(smp_cpus, smp_threads) / smp_thr= eads; + } + if (machine->possible_cpus) { + assert(machine->possible_cpus->len =3D=3D spapr_max_cores); + return machine->possible_cpus; + } + + machine->possible_cpus =3D g_malloc0(sizeof(CPUArchIdList) + + sizeof(CPUArchId) * spapr_max_cores); + machine->possible_cpus->len =3D spapr_max_cores; + for (i =3D 0; i < machine->possible_cpus->len; i++) { + int core_id =3D i * smp_threads; + + machine->possible_cpus->cpus[i].arch_id =3D core_id; + machine->possible_cpus->cpus[i].props.has_core_id =3D true; + machine->possible_cpus->cpus[i].props.core_id =3D core_id; + /* TODO: add 'has_node/node' here to describe + to which node core belongs */ + } + return machine->possible_cpus; +} + static HotpluggableCPUList *spapr_query_hotpluggable_cpus(MachineState *ma= chine) { int i; + Object *cpu; HotpluggableCPUList *head =3D NULL; - sPAPRMachineState *spapr =3D SPAPR_MACHINE(machine); - int spapr_max_cores =3D max_cpus / smp_threads; + const char *cpu_type; =20 - for (i =3D 0; i < spapr_max_cores; i++) { + cpu =3D machine->possible_cpus->cpus[0].cpu; + assert(cpu); /* Boot cpu is always present */ + cpu_type =3D object_get_typename(cpu); + for (i =3D 0; i < machine->possible_cpus->len; i++) { HotpluggableCPUList *list_item =3D g_new0(typeof(*list_item), 1); HotpluggableCPU *cpu_item =3D g_new0(typeof(*cpu_item), 1); - CpuInstanceProperties *cpu_props =3D g_new0(typeof(*cpu_props), 1); =20 - cpu_item->type =3D spapr_get_cpu_core_type(machine->cpu_model); - cpu_item->vcpus_count =3D smp_threads; - cpu_props->has_core_id =3D true; - cpu_props->core_id =3D i * smp_threads; - /* TODO: add 'has_node/node' here to describe - to which node core belongs */ + cpu_item->type =3D g_strdup(cpu_type); + cpu_item->vcpus_count =3D smp_threads; // TODO: ??? generalize + cpu_item->props =3D g_memdup(&machine->possible_cpus->cpus[i].prop= s, + sizeof(*cpu_item->props)); =20 - cpu_item->props =3D cpu_props; - if (spapr->cores[i]) { + cpu =3D machine->possible_cpus->cpus[i].cpu; + if (cpu) { cpu_item->has_qom_path =3D true; - cpu_item->qom_path =3D object_get_canonical_path(spapr->cores[= i]); + cpu_item->qom_path =3D object_get_canonical_path(cpu); } list_item->value =3D cpu_item; list_item->next =3D head; @@ -2872,6 +2922,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) hc->plug =3D spapr_machine_device_plug; hc->unplug =3D spapr_machine_device_unplug; mc->cpu_index_to_socket_id =3D spapr_cpu_index_to_socket_id; + mc->possible_cpu_arch_ids =3D spapr_possible_cpu_arch_ids; hc->unplug_request =3D spapr_machine_device_unplug_request; =20 smc->dr_lmb_enabled =3D true; diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index a2d8964..f9b17d8 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -94,7 +94,6 @@ struct sPAPRMachineState { /*< public >*/ char *kvm_type; MemoryHotplugState hotplug_memory; - Object **cores; }; =20 #define H_SUCCESS 0 --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 14877478270161022.8283235956116; Tue, 21 Feb 2017 23:17:07 -0800 (PST) Received: from localhost ([::1]:50363 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgRAf-00042s-Js for importer@patchew.org; Wed, 22 Feb 2017 02:17:05 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38310) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQVH-0003GA-Hr for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:22 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQVD-0008Ff-3J for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:19 -0500 Received: from ozlabs.org ([103.22.144.67]:60919) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQVC-0008Cy-Ci; Wed, 22 Feb 2017 01:34:14 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndM6DCbz9sNJ; Wed, 22 Feb 2017 17:33:57 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745239; bh=dmqnKuQd7yerw/AWjXRB747XMYk4vXK0sI2w+fTCh7c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SbLO40nSa2TLtQtnooYxxwPvT92utcMpl8Q/BNopfoOvGVqLw4jPY2zOelzTuc9IY RJ86/yNqJfrsL2BWf6fJrIe2Qhw15nsOAAHc6IvpgbjzGP8q+fOZ6ivnZpzVc1boft GFTPwAW6tc0Ep281NaUs4WbJGYz+Gl3e7IyToDls= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:43 +1100 Message-Id: <20170222063348.32176-39-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 38/43] machine: unify [pc_|spapr_]query_hotpluggable_cpus() callbacks X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov All callbacks FOO_query_hotpluggable_cpus() are practically the same except of setting vcpus_count to different values. Convert them to a generic machine_query_hotpluggable_cpus() callback by moving vcpus_count initialization to per machine specific callback possible_cpu_arch_ids(). Signed-off-by: Igor Mammedov Signed-off-by: David Gibson --- hw/core/machine.c | 31 +++++++++++++++++++++++++++++++ hw/i386/pc.c | 36 ++---------------------------------- hw/ppc/spapr.c | 34 ++-------------------------------- include/hw/boards.h | 3 +++ 4 files changed, 38 insertions(+), 66 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index b0fd91f..0699750 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -357,6 +357,37 @@ static void machine_init_notify(Notifier *notifier, vo= id *data) foreach_dynamic_sysbus_device(error_on_sysbus_device, NULL); } =20 +HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) +{ + int i; + Object *cpu; + HotpluggableCPUList *head =3D NULL; + const char *cpu_type; + + cpu =3D machine->possible_cpus->cpus[0].cpu; + assert(cpu); /* Boot cpu is always present */ + cpu_type =3D object_get_typename(cpu); + for (i =3D 0; i < machine->possible_cpus->len; i++) { + HotpluggableCPUList *list_item =3D g_new0(typeof(*list_item), 1); + HotpluggableCPU *cpu_item =3D g_new0(typeof(*cpu_item), 1); + + cpu_item->type =3D g_strdup(cpu_type); + cpu_item->vcpus_count =3D machine->possible_cpus->cpus[i].vcpus_co= unt; + cpu_item->props =3D g_memdup(&machine->possible_cpus->cpus[i].prop= s, + sizeof(*cpu_item->props)); + + cpu =3D machine->possible_cpus->cpus[i].cpu; + if (cpu) { + cpu_item->has_qom_path =3D true; + cpu_item->qom_path =3D object_get_canonical_path(cpu); + } + list_item->value =3D cpu_item; + list_item->next =3D head; + head =3D list_item; + } + return head; +} + static void machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 138022d..f96cfc6 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -2272,6 +2272,7 @@ static const CPUArchIdList *pc_possible_cpu_arch_ids(= MachineState *ms) for (i =3D 0; i < ms->possible_cpus->len; i++) { X86CPUTopoInfo topo; =20 + ms->possible_cpus->cpus[i].vcpus_count =3D 1; ms->possible_cpus->cpus[i].arch_id =3D x86_cpu_apic_id_from_index(= i); x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, smp_cores, smp_threads, &topo); @@ -2285,39 +2286,6 @@ static const CPUArchIdList *pc_possible_cpu_arch_ids= (MachineState *ms) return ms->possible_cpus; } =20 -static HotpluggableCPUList *pc_query_hotpluggable_cpus(MachineState *machi= ne) -{ - int i; - Object *cpu; - HotpluggableCPUList *head =3D NULL; - const char *cpu_type; - - cpu =3D machine->possible_cpus->cpus[0].cpu; - assert(cpu); /* BSP is always present */ - cpu_type =3D object_get_typename(cpu); - - for (i =3D 0; i < machine->possible_cpus->len; i++) { - HotpluggableCPUList *list_item =3D g_new0(typeof(*list_item), 1); - HotpluggableCPU *cpu_item =3D g_new0(typeof(*cpu_item), 1); - - cpu_item->type =3D g_strdup(cpu_type); - cpu_item->vcpus_count =3D 1; - cpu_item->props =3D g_memdup(&machine->possible_cpus->cpus[i].prop= s, - sizeof(*cpu_item->props)); - - cpu =3D machine->possible_cpus->cpus[i].cpu; - if (cpu) { - cpu_item->has_qom_path =3D true; - cpu_item->qom_path =3D object_get_canonical_path(cpu); - } - - list_item->value =3D cpu_item; - list_item->next =3D head; - head =3D list_item; - } - return head; -} - static void x86_nmi(NMIState *n, int cpu_index, Error **errp) { /* cpu index isn't used */ @@ -2358,7 +2326,7 @@ static void pc_machine_class_init(ObjectClass *oc, vo= id *data) mc->get_hotplug_handler =3D pc_get_hotpug_handler; mc->cpu_index_to_socket_id =3D pc_cpu_index_to_socket_id; mc->possible_cpu_arch_ids =3D pc_possible_cpu_arch_ids; - mc->query_hotpluggable_cpus =3D pc_query_hotpluggable_cpus; + mc->query_hotpluggable_cpus =3D machine_query_hotpluggable_cpus; mc->default_boot_order =3D "cad"; mc->hot_add_cpu =3D pc_hot_add_cpu; mc->block_default_type =3D IF_IDE; diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index a0aa69e..49768eb 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2799,6 +2799,7 @@ static const CPUArchIdList *spapr_possible_cpu_arch_i= ds(MachineState *machine) for (i =3D 0; i < machine->possible_cpus->len; i++) { int core_id =3D i * smp_threads; =20 + machine->possible_cpus->cpus[i].vcpus_count =3D smp_threads; machine->possible_cpus->cpus[i].arch_id =3D core_id; machine->possible_cpus->cpus[i].props.has_core_id =3D true; machine->possible_cpus->cpus[i].props.core_id =3D core_id; @@ -2808,37 +2809,6 @@ static const CPUArchIdList *spapr_possible_cpu_arch_= ids(MachineState *machine) return machine->possible_cpus; } =20 -static HotpluggableCPUList *spapr_query_hotpluggable_cpus(MachineState *ma= chine) -{ - int i; - Object *cpu; - HotpluggableCPUList *head =3D NULL; - const char *cpu_type; - - cpu =3D machine->possible_cpus->cpus[0].cpu; - assert(cpu); /* Boot cpu is always present */ - cpu_type =3D object_get_typename(cpu); - for (i =3D 0; i < machine->possible_cpus->len; i++) { - HotpluggableCPUList *list_item =3D g_new0(typeof(*list_item), 1); - HotpluggableCPU *cpu_item =3D g_new0(typeof(*cpu_item), 1); - - cpu_item->type =3D g_strdup(cpu_type); - cpu_item->vcpus_count =3D smp_threads; // TODO: ??? generalize - cpu_item->props =3D g_memdup(&machine->possible_cpus->cpus[i].prop= s, - sizeof(*cpu_item->props)); - - cpu =3D machine->possible_cpus->cpus[i].cpu; - if (cpu) { - cpu_item->has_qom_path =3D true; - cpu_item->qom_path =3D object_get_canonical_path(cpu); - } - list_item->value =3D cpu_item; - list_item->next =3D head; - head =3D list_item; - } - return head; -} - static void spapr_phb_placement(sPAPRMachineState *spapr, uint32_t index, uint64_t *buid, hwaddr *pio, hwaddr *mmio32, hwaddr *mmio64, @@ -2927,7 +2897,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) =20 smc->dr_lmb_enabled =3D true; smc->tcg_default_cpu =3D "POWER8"; - mc->query_hotpluggable_cpus =3D spapr_query_hotpluggable_cpus; + mc->query_hotpluggable_cpus =3D machine_query_hotpluggable_cpus; fwc->get_dev_path =3D spapr_get_fw_dev_path; nc->nmi_monitor_handler =3D spapr_nmi; smc->phb_placement =3D spapr_phb_placement; diff --git a/include/hw/boards.h b/include/hw/boards.h index 60209df..9040dbb 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -41,15 +41,18 @@ int machine_phandle_start(MachineState *machine); bool machine_dump_guest_core(MachineState *machine); bool machine_mem_merge(MachineState *machine); void machine_register_compat_props(MachineState *machine); +HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine= ); =20 /** * CPUArchId: * @arch_id - architecture-dependent CPU ID of present or possible CPU * @cpu - pointer to corresponding CPU object if it's present on NULL othe= rwise * @props - CPU object properties, initialized by board + * #vcpus_count - number of threads provided by @cpu object */ typedef struct { uint64_t arch_id; + int64_t vcpus_count; CpuInstanceProperties props; Object *cpu; } CPUArchId; --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487748459039903.5526244134986; Tue, 21 Feb 2017 23:27:39 -0800 (PST) Received: from localhost ([::1]:50458 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgRKr-0006m8-JD for importer@patchew.org; Wed, 22 Feb 2017 02:27:37 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38247) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQVG-0003Ej-Kw for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:22 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQVC-0008Ee-3y for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:18 -0500 Received: from ozlabs.org ([103.22.144.67]:43503) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQVB-0008By-EH; Wed, 22 Feb 2017 01:34:13 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndM4C3Xz9sNC; Wed, 22 Feb 2017 17:33:57 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745239; bh=2Gv3jZtW6/ZGxQu08exkJffwHquSM9KDD+GbgzlY1tg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XuFqbeakGMO36KBJ67VpUSGN01D4EXdHl0LemPh1aYeKxvJMInhoOPHukR9ISQOTo bkdx3aux+RhGf7+olB4MfOGRJAwV/mEdlowesK2FrFyeDJ/2EGWixxw9tBUy8Q7OVb ZF32Qy568xsOSeQdzUWMM1M7ByWZ99/Q4q7gEz8s= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:44 +1100 Message-Id: <20170222063348.32176-40-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 39/43] machine: replace query_hotpluggable_cpus() callback with has_hotpluggable_cpus flag X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov Generic helper machine_query_hotpluggable_cpus() replaced target specific query_hotpluggable_cpus() callbacks so there is no need in it anymore. However inon NULL callback value is used to detect/report hotpluggable cpus support, therefore it can be removed completely. Replace it with MachineClass.has_hotpluggable_cpus boolean which is sufficient for the task. Suggested-by: David Gibson Signed-off-by: Igor Mammedov Signed-off-by: David Gibson --- hw/i386/pc.c | 4 ++-- hw/ppc/spapr.c | 20 ++++++++++---------- include/hw/boards.h | 8 +++----- monitor.c | 4 ++-- vl.c | 2 +- 5 files changed, 18 insertions(+), 20 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index f96cfc6..d24388e 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1955,7 +1955,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_d= ev, } =20 /* if 'address' properties socket-id/core-id/thread-id are not set, se= t them - * so that query_hotpluggable_cpus would show correct values + * so that machine_query_hotpluggable_cpus would show correct values */ /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizef= n() * once -smp refactoring is complete and there will be CPU private @@ -2326,7 +2326,7 @@ static void pc_machine_class_init(ObjectClass *oc, vo= id *data) mc->get_hotplug_handler =3D pc_get_hotpug_handler; mc->cpu_index_to_socket_id =3D pc_cpu_index_to_socket_id; mc->possible_cpu_arch_ids =3D pc_possible_cpu_arch_ids; - mc->query_hotpluggable_cpus =3D machine_query_hotpluggable_cpus; + mc->has_hotpluggable_cpus =3D true; mc->default_boot_order =3D "cad"; mc->hot_add_cpu =3D pc_hot_add_cpu; mc->block_default_type =3D IF_IDE; diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 49768eb..6f37288 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -958,7 +958,7 @@ static void *spapr_build_fdt(sPAPRMachineState *spapr, _FDT(spapr_drc_populate_dt(fdt, 0, NULL, SPAPR_DR_CONNECTOR_TYPE_L= MB)); } =20 - if (mc->query_hotpluggable_cpus) { + if (mc->has_hotpluggable_cpus) { int offset =3D fdt_path_offset(fdt, "/cpus"); ret =3D spapr_drc_populate_dt(fdt, offset, NULL, SPAPR_DR_CONNECTOR_TYPE_CPU); @@ -1781,7 +1781,7 @@ static void spapr_init_cpus(sPAPRMachineState *spapr) } =20 possible_cpus =3D mc->possible_cpu_arch_ids(machine); - if (mc->query_hotpluggable_cpus) { + if (mc->has_hotpluggable_cpus) { if (smp_cpus % smp_threads) { error_report("smp_cpus (%u) must be multiple of threads (%u)", smp_cpus, smp_threads); @@ -1803,7 +1803,7 @@ static void spapr_init_cpus(sPAPRMachineState *spapr) for (i =3D 0; i < possible_cpus->len; i++) { int core_id =3D i * smp_threads; =20 - if (mc->query_hotpluggable_cpus) { + if (mc->has_hotpluggable_cpus) { sPAPRDRConnector *drc =3D spapr_dr_connector_new(OBJECT(spapr), SPAPR_DR_CONNECTOR_TYPE_CPU, @@ -2575,7 +2575,7 @@ static void spapr_core_plug(HotplugHandler *hotplug_d= ev, DeviceState *dev, } drc =3D spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * = smt); =20 - g_assert(drc || !mc->query_hotpluggable_cpus); + g_assert(drc || !mc->has_hotpluggable_cpus); =20 /* * Setup CPU DT entries only for hotplugged CPUs. For boot time or @@ -2626,7 +2626,7 @@ static void spapr_core_pre_plug(HotplugHandler *hotpl= ug_dev, DeviceState *dev, CPUArchId *core_slot; int index; =20 - if (dev->hotplugged && !mc->query_hotpluggable_cpus) { + if (dev->hotplugged && !mc->has_hotpluggable_cpus) { error_setg(&local_err, "CPU hotplug not supported for this machine= "); goto out; } @@ -2719,7 +2719,7 @@ static void spapr_machine_device_unplug(HotplugHandle= r *hotplug_dev, error_setg(errp, "Memory hot unplug not supported for this gue= st"); } } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) { - if (!mc->query_hotpluggable_cpus) { + if (!mc->has_hotpluggable_cpus) { error_setg(errp, "CPU hot unplug not supported on this machine= "); return; } @@ -2746,7 +2746,7 @@ static void spapr_machine_device_unplug_request(Hotpl= ugHandler *hotplug_dev, error_setg(errp, "Memory hot unplug not supported for this gue= st"); } } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) { - if (!mc->query_hotpluggable_cpus) { + if (!mc->has_hotpluggable_cpus) { error_setg(errp, "CPU hot unplug not supported on this machine= "); return; } @@ -2785,7 +2785,7 @@ static const CPUArchIdList *spapr_possible_cpu_arch_i= ds(MachineState *machine) int spapr_max_cores =3D max_cpus / smp_threads; MachineClass *mc =3D MACHINE_GET_CLASS(machine); =20 - if (!mc->query_hotpluggable_cpus) { + if (!mc->has_hotpluggable_cpus) { spapr_max_cores =3D QEMU_ALIGN_UP(smp_cpus, smp_threads) / smp_thr= eads; } if (machine->possible_cpus) { @@ -2897,7 +2897,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) =20 smc->dr_lmb_enabled =3D true; smc->tcg_default_cpu =3D "POWER8"; - mc->query_hotpluggable_cpus =3D machine_query_hotpluggable_cpus; + mc->has_hotpluggable_cpus =3D true; fwc->get_dev_path =3D spapr_get_fw_dev_path; nc->nmi_monitor_handler =3D spapr_nmi; smc->phb_placement =3D spapr_phb_placement; @@ -3097,7 +3097,7 @@ static void spapr_machine_2_6_instance_options(Machin= eState *machine) static void spapr_machine_2_6_class_options(MachineClass *mc) { spapr_machine_2_7_class_options(mc); - mc->query_hotpluggable_cpus =3D NULL; + mc->has_hotpluggable_cpus =3D false; SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_6); } =20 diff --git a/include/hw/boards.h b/include/hw/boards.h index 9040dbb..269d0ba 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -87,10 +87,8 @@ typedef struct { * Returns an array of @CPUArchId architecture-dependent CPU IDs * which includes CPU IDs for present and possible to hotplug CPUs. * Caller is responsible for freeing returned list. - * @query_hotpluggable_cpus: - * Returns a @HotpluggableCPUList, which describes CPUs objects which - * could be added with -device/device_add. - * Caller is responsible for freeing returned list. + * @has_hotpluggable_cpus: + * If true, board supports CPUs creation with -device/device_add. * @minimum_page_bits: * If non-zero, the board promises never to create a CPU with a page si= ze * smaller than this, so QEMU can use a more efficient larger page @@ -136,12 +134,12 @@ struct MachineClass { bool option_rom_has_mr; bool rom_file_has_mr; int minimum_page_bits; + bool has_hotpluggable_cpus; =20 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, DeviceState *dev); unsigned (*cpu_index_to_socket_id)(unsigned cpu_index); const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine); - HotpluggableCPUList *(*query_hotpluggable_cpus)(MachineState *machine); }; =20 /** diff --git a/monitor.c b/monitor.c index 3cd72a9..18bf2f8e 100644 --- a/monitor.c +++ b/monitor.c @@ -4155,10 +4155,10 @@ HotpluggableCPUList *qmp_query_hotpluggable_cpus(Er= ror **errp) MachineState *ms =3D MACHINE(qdev_get_machine()); MachineClass *mc =3D MACHINE_GET_CLASS(ms); =20 - if (!mc->query_hotpluggable_cpus) { + if (!mc->has_hotpluggable_cpus) { error_setg(errp, QERR_FEATURE_DISABLED, "query-hotpluggable-cpus"); return NULL; } =20 - return mc->query_hotpluggable_cpus(ms); + return machine_query_hotpluggable_cpus(ms); } diff --git a/vl.c b/vl.c index b5d0a19..904e34b 100644 --- a/vl.c +++ b/vl.c @@ -1492,7 +1492,7 @@ MachineInfoList *qmp_query_machines(Error **errp) =20 info->name =3D g_strdup(mc->name); info->cpu_max =3D !mc->max_cpus ? 1 : mc->max_cpus; - info->hotpluggable_cpus =3D !!mc->query_hotpluggable_cpus; + info->hotpluggable_cpus =3D mc->has_hotpluggable_cpus; =20 entry =3D g_malloc0(sizeof(*entry)); entry->value =3D info; --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487747856632288.03866632900144; Tue, 21 Feb 2017 23:17:36 -0800 (PST) Received: from localhost ([::1]:50365 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgRB7-0004Qg-Ps for importer@patchew.org; Wed, 22 Feb 2017 02:17:33 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38114) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQVD-0003AV-Fo for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQV9-0008CV-Vk for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:15 -0500 Received: from ozlabs.org ([103.22.144.67]:54149) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQV9-000888-Hi; Wed, 22 Feb 2017 01:34:11 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndM1sytz9sN1; Wed, 22 Feb 2017 17:33:58 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745239; bh=QFO/FXOIpikqz3/9gUwwJ2Yca7TCFKTOq5DjZClSoj4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DpU+srXJNfLTVDG72eWqQGrfTWNxhP4DO9uQt/jA0CXcqnb1EjpIpowohyCrARDWY Ud8C0b7QbLo65wAs16JDZ2ZHnfn173dErqgGjENolzUufTk+llYbM8vHscLhZsqkKd Ki1BF6/53oiyxlEfi74N5RV/r7ki1e7ZrYpCF2Tw= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:45 +1100 Message-Id: <20170222063348.32176-41-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 40/43] hw/net/spapr_llan: 6 byte mac address device tree entry X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, Sam Bobroff , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Sam Bobroff The spapr-vlan device in QEMU has always presented it's MAC address in the device tree as an 8 byte value, even though PAPR requires it to be 6 bytes. This is because, at the time, AIX required the value to be 8 bytes. However, modern versions of AIX support the (correct) 6 byte value so they no longer require the workaround. It would be neatest to always provide a 6 byte value but that would cause a problem with old Linux kernel ibmveth drivers, so the old 8 byte value is still presented when necessary. Since commit 13f85203e (3.10, May 2013) the driver has been able to handle 6 or 8 byte addresses so versions after that don't need to be considered specially. Drivers from kernels before that can also handle either type of address, but not always: * If the first byte's lowest bits are 10, the address must be 6 bytes. * Otherwise, the address must be 8 bytes. (The two bits in question are significant in a MAC address: they indicate a locally-administered unicast address.) So to maintain compatibility the old 8 byte value is presented when the lowest two bits of the first byte are not 10. Signed-off-by: Sam Bobroff Signed-off-by: David Gibson --- hw/net/spapr_llan.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/hw/net/spapr_llan.c b/hw/net/spapr_llan.c index 058908d..d239e4b 100644 --- a/hw/net/spapr_llan.c +++ b/hw/net/spapr_llan.c @@ -385,18 +385,24 @@ static int spapr_vlan_devnode(VIOsPAPRDevice *dev, vo= id *fdt, int node_off) int ret; =20 /* Some old phyp versions give the mac address in an 8-byte - * property. The kernel driver has an insane workaround for this; + * property. The kernel driver (before 3.10) has an insane workaround; * rather than doing the obvious thing and checking the property * length, it checks whether the first byte has 0b10 in the low * bits. If a correct 6-byte property has a different first byte * the kernel will get the wrong mac address, overrunning its * buffer in the process (read only, thank goodness). * - * Here we workaround the kernel workaround by always supplying an - * 8-byte property, with the mac address in the last six bytes */ - memcpy(&padded_mac[2], &vdev->nicconf.macaddr, ETH_ALEN); - ret =3D fdt_setprop(fdt, node_off, "local-mac-address", - padded_mac, sizeof(padded_mac)); + * Here we return a 6-byte address unless that would break a pre-3.10 + * driver. In that case we return a padded 8-byte address to allow th= e old + * workaround to succeed. */ + if ((vdev->nicconf.macaddr.a[0] & 0x3) =3D=3D 0x2) { + ret =3D fdt_setprop(fdt, node_off, "local-mac-address", + &vdev->nicconf.macaddr, ETH_ALEN); + } else { + memcpy(&padded_mac[2], &vdev->nicconf.macaddr, ETH_ALEN); + ret =3D fdt_setprop(fdt, node_off, "local-mac-address", + padded_mac, sizeof(padded_mac)); + } if (ret < 0) { return ret; } --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487747553929400.82509626741626; Tue, 21 Feb 2017 23:12:33 -0800 (PST) Received: from localhost ([::1]:50334 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgR6F-0007fw-Vy for importer@patchew.org; Wed, 22 Feb 2017 02:12:32 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38340) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQVI-0003HQ-C4 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:21 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQVD-0008GC-J3 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:20 -0500 Received: from ozlabs.org ([103.22.144.67]:56851) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQVD-0008DZ-7P; Wed, 22 Feb 2017 01:34:15 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndM6jBFz9sNH; Wed, 22 Feb 2017 17:33:58 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745239; bh=0gtijOfm80Ix/CGyTdi9DPXOivHwgu5CJ4Kus/lawvk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OSCoQUUyPylpzOfN1gHQ8TguvAYeFNwRlTCaOPn1AF++SS9osr9nbanjehJCZSgEW +hLce9hX2eIc8dD4SFvO2kxMQdnRZX5WbK094hW39PG6DX0RXVFiyawsHCU1z1xd3p 9DvejMONNrSgQyDJxsPzBuoecdF5GLLSQNq9ZfBc= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:46 +1100 Message-Id: <20170222063348.32176-42-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 41/43] target-ppc: fix Book-E TLB matching X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, Alex Zuepke , qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Alex Zuepke The Book-E TLB matching process should bail out early when a TLB entry matches, but the access permissions are wrong. The CPU will then raise a DSI error instead of a Data TLB error, as described for TLB matching in Freescale and IBM documents. Signed-off-by: Alex Zuepke Signed-off-by: David Gibson --- target/ppc/mmu_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 172a305..eb2d482 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -825,7 +825,7 @@ static int mmubooke_get_physical_address(CPUPPCState *e= nv, mmu_ctx_t *ctx, tlb =3D &env->tlb.tlbe[i]; ret =3D mmubooke_check_tlb(env, tlb, &raddr, &ctx->prot, address, = rw, access_type, i); - if (!ret) { + if (ret !=3D -1) { break; } } --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487748058783957.885157876989; Tue, 21 Feb 2017 23:20:58 -0800 (PST) Received: from localhost ([::1]:50387 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgREO-0007jc-Ew for importer@patchew.org; Wed, 22 Feb 2017 02:20:56 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38195) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQVF-0003CM-0G for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQVB-0008DA-36 for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:16 -0500 Received: from ozlabs.org ([103.22.144.67]:35217) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQVA-0008Af-Ka; Wed, 22 Feb 2017 01:34:12 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndM37Ktz9sNF; Wed, 22 Feb 2017 17:33:58 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745239; bh=QZ0aOKDBcD7bTJdnCzkCWdNKIB3n6Wg8LuQycpscMLk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dPmrkG8XZedbmNAha5dDaSR99fHyk7d5f80/lfwka52gsPMTdEWzg4yggVdxN1Wvf mJBPivd/39rJUJkg9V1v2+DVbpouo4fZiRivPDWoZmX5Pv/zP5nbh5HZfar5R5g5WH SnxN+ykSEzqLN10Sr9SFtYXZIwyc12zPeNh0s734= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:47 +1100 Message-Id: <20170222063348.32176-43-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 42/43] hw/ppc/spapr: Check for valid page size when hot plugging memory X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Thomas Huth On POWER, the valid page sizes that the guest can use are bound to the CPU and not to the memory region. QEMU already has some fancy logic to find out the right maximum memory size to tell it to the guest during boot (see getrampagesize() in the file target/ppc/kvm.c for more information). However, once we're booted and the guest is using huge pages already, it is currently still possible to hot-plug memory regions that does not support huge pages - which of course does not work on POWER, since the guest thinks that it is possible to use huge pages everywhere. The KVM_RUN ioctl will then abort with -EFAULT, QEMU spills out a not very helpful error message together with a register dump and the user is annoyed that the VM unexpectedly died. To avoid this situation, we should check the page size of hot-plugged DIMMs to see whether it is possible to use it in the current VM. If it does not fit, we can print out a better error message and refuse to add it, so that the VM does not die unexpectely and the user has a second chance to plug a DIMM with a matching memory backend instead. Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=3D1419466 Signed-off-by: Thomas Huth [dwg: Fix a build error on 32-bit builds with KVM] Signed-off-by: David Gibson --- hw/ppc/spapr.c | 8 ++++++++ target/ppc/kvm.c | 32 ++++++++++++++++++++++++++++---- target/ppc/kvm_ppc.h | 7 +++++++ 3 files changed, 43 insertions(+), 4 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 6f37288..5904e64 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2367,6 +2367,7 @@ static void spapr_memory_plug(HotplugHandler *hotplug= _dev, DeviceState *dev, uint64_t align =3D memory_region_get_alignment(mr); uint64_t size =3D memory_region_size(mr); uint64_t addr; + char *mem_dev; =20 if (size % SPAPR_MEMORY_BLOCK_SIZE) { error_setg(&local_err, "Hotplugged memory size must be a multiple = of " @@ -2374,6 +2375,13 @@ static void spapr_memory_plug(HotplugHandler *hotplu= g_dev, DeviceState *dev, goto out; } =20 + mem_dev =3D object_property_get_str(OBJECT(dimm), PC_DIMM_MEMDEV_PROP,= NULL); + if (mem_dev && !kvmppc_is_mem_backend_page_size_ok(mem_dev)) { + error_setg(&local_err, "Memory backend has bad page size. " + "Use 'memory-backend-file' with correct mem-path."); + goto out; + } + pc_dimm_memory_plug(dev, &ms->hotplug_memory, mr, align, &local_err); if (local_err) { goto out; diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 663d2e7..52bbea5 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -438,12 +438,13 @@ static bool kvm_valid_page_size(uint32_t flags, long = rampgsize, uint32_t shift) return (1ul << shift) <=3D rampgsize; } =20 +static long max_cpu_page_size; + static void kvm_fixup_page_sizes(PowerPCCPU *cpu) { static struct kvm_ppc_smmu_info smmu_info; static bool has_smmu_info; CPUPPCState *env =3D &cpu->env; - long rampagesize; int iq, ik, jq, jk; bool has_64k_pages =3D false; =20 @@ -458,7 +459,9 @@ static void kvm_fixup_page_sizes(PowerPCCPU *cpu) has_smmu_info =3D true; } =20 - rampagesize =3D getrampagesize(); + if (!max_cpu_page_size) { + max_cpu_page_size =3D getrampagesize(); + } =20 /* Convert to QEMU form */ memset(&env->sps, 0, sizeof(env->sps)); @@ -478,14 +481,14 @@ static void kvm_fixup_page_sizes(PowerPCCPU *cpu) struct ppc_one_seg_page_size *qsps =3D &env->sps.sps[iq]; struct kvm_ppc_one_seg_page_size *ksps =3D &smmu_info.sps[ik]; =20 - if (!kvm_valid_page_size(smmu_info.flags, rampagesize, + if (!kvm_valid_page_size(smmu_info.flags, max_cpu_page_size, ksps->page_shift)) { continue; } qsps->page_shift =3D ksps->page_shift; qsps->slb_enc =3D ksps->slb_enc; for (jk =3D jq =3D 0; jk < KVM_PPC_PAGE_SIZES_MAX_SZ; jk++) { - if (!kvm_valid_page_size(smmu_info.flags, rampagesize, + if (!kvm_valid_page_size(smmu_info.flags, max_cpu_page_size, ksps->enc[jk].page_shift)) { continue; } @@ -510,12 +513,33 @@ static void kvm_fixup_page_sizes(PowerPCCPU *cpu) env->mmu_model &=3D ~POWERPC_MMU_64K; } } + +bool kvmppc_is_mem_backend_page_size_ok(char *obj_path) +{ + Object *mem_obj =3D object_resolve_path(obj_path, NULL); + char *mempath =3D object_property_get_str(mem_obj, "mem-path", NULL); + long pagesize; + + if (mempath) { + pagesize =3D gethugepagesize(mempath); + } else { + pagesize =3D getpagesize(); + } + + return pagesize >=3D max_cpu_page_size; +} + #else /* defined (TARGET_PPC64) */ =20 static inline void kvm_fixup_page_sizes(PowerPCCPU *cpu) { } =20 +bool kvmppc_is_mem_backend_page_size_ok(char *obj_path) +{ + return true; +} + #endif /* !defined (TARGET_PPC64) */ =20 unsigned long kvm_arch_vcpu_id(CPUState *cpu) diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h index 151c00b..8da2ee4 100644 --- a/target/ppc/kvm_ppc.h +++ b/target/ppc/kvm_ppc.h @@ -60,6 +60,8 @@ int kvmppc_enable_hwrng(void); int kvmppc_put_books_sregs(PowerPCCPU *cpu); PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void); =20 +bool kvmppc_is_mem_backend_page_size_ok(char *obj_path); + #else =20 static inline uint32_t kvmppc_get_tbfreq(void) @@ -192,6 +194,11 @@ static inline uint64_t kvmppc_rma_size(uint64_t curren= t_size, return ram_size; } =20 +static inline bool kvmppc_is_mem_backend_page_size_ok(char *obj_path) +{ + return true; +} + #endif /* !CONFIG_USER_ONLY */ =20 static inline bool kvmppc_has_cap_epr(void) --=20 2.9.3 From nobody Thu Nov 6 18:53:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487747032143768.8631160155147; Tue, 21 Feb 2017 23:03:52 -0800 (PST) Received: from localhost ([::1]:50285 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQxr-0005rt-09 for importer@patchew.org; Wed, 22 Feb 2017 02:03:51 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38212) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgQVF-0003Ck-Dg for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgQVC-0008F6-Mv for qemu-devel@nongnu.org; Wed, 22 Feb 2017 01:34:17 -0500 Received: from ozlabs.org ([103.22.144.67]:46153) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgQVC-0008Cp-81; Wed, 22 Feb 2017 01:34:14 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vSndM5hW1z9sND; Wed, 22 Feb 2017 17:33:58 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1487745239; bh=KfGvTpjmUx0kKbHaoVnH+h4ONnqLSCAMUpVIsZpnbB8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dN8zgvqaXiSvIe3AlrLttqlEjukYFi3kgAuCqFQGw/lllsR9MAojmMMozyaQ6ib/X EjQ9yUVRoVMsFfNlarT/qy5zCkSqKHC3mtuBKiXVFgma2U+PVmB3eejVjkARi9583z GWcouDRjK1hja8oI2yLHKGBkYA49ldI9anCFnFR0= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 22 Feb 2017 17:33:48 +1100 Message-Id: <20170222063348.32176-44-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170222063348.32176-1-david@gibson.dropbear.id.au> References: <20170222063348.32176-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 43/43] hw/ppc/ppc405_uc.c: Avoid integer overflows X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Peter Maydell When performing clock calculations, the ppc405_uc code has several places where it multiplies together two 32-bit variables and assigns the result to a 64-bit variable. This doesn't quite do what is intended because C will compute a 32-bit multiply result. Add casts to ensure we don't truncate the result. (Spotted by Coverity, CID 1005504, 1005505.) Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: David Gibson --- hw/ppc/ppc405_uc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c index d6d3fc2..d5df94a 100644 --- a/hw/ppc/ppc405_uc.c +++ b/hw/ppc/ppc405_uc.c @@ -1881,7 +1881,7 @@ static void ppc405cr_clk_setup (ppc405cr_cpc_t *cpc) D1 =3D (((cpc->pllmr >> 20) - 1) & 0xF) + 1; /* FBDV */ D2 =3D 8 - ((cpc->pllmr >> 16) & 0x7); /* FWDVA */ M =3D D0 * D1 * D2; - VCO_out =3D cpc->sysclk * M; + VCO_out =3D (uint64_t)cpc->sysclk * M; if (VCO_out < 400000000 || VCO_out > 800000000) { /* PLL cannot lock */ cpc->pllmr &=3D ~0x80000000; @@ -1892,7 +1892,7 @@ static void ppc405cr_clk_setup (ppc405cr_cpc_t *cpc) /* Bypass PLL */ bypass_pll: M =3D D0; - PLL_out =3D cpc->sysclk * M; + PLL_out =3D (uint64_t)cpc->sysclk * M; } CPU_clk =3D PLL_out; if (cpc->cr1 & 0x00800000) @@ -2242,7 +2242,7 @@ static void ppc405ep_compute_clocks (ppc405ep_cpc_t *= cpc) #ifdef DEBUG_CLOCKS_LL printf("FWDA %01" PRIx32 " %d\n", (cpc->pllmr[1] >> 16) & 0x7, D); #endif - VCO_out =3D cpc->sysclk * M * D; + VCO_out =3D (uint64_t)cpc->sysclk * M * D; if (VCO_out < 500000000UL || VCO_out > 1000000000UL) { /* Error - unlock the PLL */ printf("VCO out of range %" PRIu64 "\n", VCO_out); --=20 2.9.3