From nobody Sat Apr 20 05:44:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487683656329713.3966509179706; Tue, 21 Feb 2017 05:27:36 -0800 (PST) Received: from localhost ([::1]:44572 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgATd-0006Nu-Le for importer@patchew.org; Tue, 21 Feb 2017 08:27:33 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51746) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cg9q7-0001YQ-W5 for qemu-devel@nongnu.org; Tue, 21 Feb 2017 07:46:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cg9q6-0003B2-6X for qemu-devel@nongnu.org; Tue, 21 Feb 2017 07:46:44 -0500 Received: from mx1.redhat.com ([209.132.183.28]:45520) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cg9q5-0003Ar-TN for qemu-devel@nongnu.org; Tue, 21 Feb 2017 07:46:42 -0500 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 05E3B1555C; Tue, 21 Feb 2017 12:46:42 +0000 (UTC) Received: from donizetti.redhat.com (ovpn-116-127.ams2.redhat.com [10.36.116.127]) by smtp.corp.redhat.com (Postfix) with ESMTP id A4AE015839; Tue, 21 Feb 2017 12:46:40 +0000 (UTC) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Tue, 21 Feb 2017 13:46:36 +0100 Message-Id: <20170221124638.19573-2-pbonzini@redhat.com> In-Reply-To: <20170221124638.19573-1-pbonzini@redhat.com> References: <20170221124638.19573-1-pbonzini@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Tue, 21 Feb 2017 12:46:42 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 1/3] cpu-exec: unify icount_decr and tcg_exit_req X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, pavel.dovgaluk@ispras.ru Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The icount interrupt flag and tcg_exit_req serve almost the same purpose, let's make them completely the same. The former TB_EXIT_REQUESTED and TB_EXIT_ICOUNT_EXPIRED cases are unified, since we can distinguish them from the value of the interrupt flag. Signed-off-by: Paolo Bonzini --- cpu-exec.c | 68 +++++++++++++++++++++----------------------= ---- include/exec/gen-icount.h | 53 +++++++++++++++++------------------- include/qom/cpu.h | 15 +++++------ qom/cpu.c | 2 +- tcg/tcg.h | 1 - translate-all.c | 2 +- translate-common.c | 13 ++++----- 7 files changed, 69 insertions(+), 85 deletions(-) diff --git a/cpu-exec.c b/cpu-exec.c index 142a586..18e1973 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -185,12 +185,6 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState *c= pu, TranslationBlock *itb) cc->set_pc(cpu, last_tb->pc); } } - if (tb_exit =3D=3D TB_EXIT_REQUESTED) { - /* We were asked to stop executing TBs (probably a pending - * interrupt. We've now stopped, so clear the flag. - */ - atomic_set(&cpu->tcg_exit_req, 0); - } return ret; } =20 @@ -537,6 +531,7 @@ static inline void cpu_loop_exec_tb(CPUState *cpu, Tran= slationBlock *tb, SyncClocks *sc) { uintptr_t ret; + int32_t insns_left; =20 if (unlikely(atomic_read(&cpu->exit_request))) { return; @@ -546,8 +541,15 @@ static inline void cpu_loop_exec_tb(CPUState *cpu, Tra= nslationBlock *tb, ret =3D cpu_tb_exec(cpu, tb); tb =3D (TranslationBlock *)(ret & ~TB_EXIT_MASK); *tb_exit =3D ret & TB_EXIT_MASK; - switch (*tb_exit) { - case TB_EXIT_REQUESTED: + if (*tb_exit !=3D TB_EXIT_REQUESTED) { + *last_tb =3D tb; + return; + } + + *last_tb =3D NULL; + insns_left =3D atomic_read(&cpu->icount_decr.u32); + atomic_set(&cpu->icount_decr.u16.high, 0); + if (insns_left < 0) { /* Something asked us to stop executing * chained TBs; just continue round the main * loop. Whatever requested the exit will also @@ -559,37 +561,27 @@ static inline void cpu_loop_exec_tb(CPUState *cpu, Tr= anslationBlock *tb, * or cpu->interrupt_request. */ smp_mb(); - *last_tb =3D NULL; - break; - case TB_EXIT_ICOUNT_EXPIRED: - { - /* Instruction counter expired. */ -#ifdef CONFIG_USER_ONLY - abort(); -#else - int insns_left =3D cpu->icount_decr.u32; - *last_tb =3D NULL; - if (cpu->icount_extra && insns_left >=3D 0) { - /* Refill decrementer and continue execution. */ - cpu->icount_extra +=3D insns_left; - insns_left =3D MIN(0xffff, cpu->icount_extra); - cpu->icount_extra -=3D insns_left; - cpu->icount_decr.u16.low =3D insns_left; - } else { - if (insns_left > 0) { - /* Execute remaining instructions. */ - cpu_exec_nocache(cpu, insns_left, tb, false); - align_clocks(sc, cpu); - } - cpu->exception_index =3D EXCP_INTERRUPT; - cpu_loop_exit(cpu); - } - break; -#endif + return; } - default: - *last_tb =3D tb; - break; + + /* Instruction counter expired. */ + assert(use_icount); + if (cpu->icount_extra) { + /* Refill decrementer and continue execution. */ + cpu->icount_extra +=3D insns_left; + insns_left =3D MIN(0xffff, cpu->icount_extra); + cpu->icount_extra -=3D insns_left; + cpu->icount_decr.u16.low =3D insns_left; + } else { + /* Execute any remaining instructions, then let the main loop + * handle the next event. + */ + if (insns_left > 0) { + cpu_exec_nocache(cpu, insns_left, tb, false); + align_clocks(sc, cpu); + } + cpu->exception_index =3D EXCP_INTERRUPT; + cpu_loop_exit(cpu); } } =20 diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h index 050de59..62d462e 100644 --- a/include/exec/gen-icount.h +++ b/include/exec/gen-icount.h @@ -6,58 +6,55 @@ /* Helpers for instruction counting code generation. */ =20 static int icount_start_insn_idx; -static TCGLabel *icount_label; static TCGLabel *exitreq_label; =20 static inline void gen_tb_start(TranslationBlock *tb) { - TCGv_i32 count, flag, imm; + TCGv_i32 count, imm; =20 exitreq_label =3D gen_new_label(); - flag =3D tcg_temp_new_i32(); - tcg_gen_ld_i32(flag, cpu_env, - offsetof(CPUState, tcg_exit_req) - ENV_OFFSET); - tcg_gen_brcondi_i32(TCG_COND_NE, flag, 0, exitreq_label); - tcg_temp_free_i32(flag); - - if (!(tb->cflags & CF_USE_ICOUNT)) { - return; + if (tb->cflags & CF_USE_ICOUNT) { + count =3D tcg_temp_local_new_i32(); + } else { + count =3D tcg_temp_new_i32(); } =20 - icount_label =3D gen_new_label(); - count =3D tcg_temp_local_new_i32(); tcg_gen_ld_i32(count, cpu_env, -ENV_OFFSET + offsetof(CPUState, icount_decr.u32)); =20 - imm =3D tcg_temp_new_i32(); - /* We emit a movi with a dummy immediate argument. Keep the insn index - * of the movi so that we later (when we know the actual insn count) - * can update the immediate argument with the actual insn count. */ - icount_start_insn_idx =3D tcg_op_buf_count(); - tcg_gen_movi_i32(imm, 0xdeadbeef); + if (tb->cflags & CF_USE_ICOUNT) { + imm =3D tcg_temp_new_i32(); + /* We emit a movi with a dummy immediate argument. Keep the insn i= ndex + * of the movi so that we later (when we know the actual insn coun= t) + * can update the immediate argument with the actual insn count. = */ + icount_start_insn_idx =3D tcg_op_buf_count(); + tcg_gen_movi_i32(imm, 0xdeadbeef); + + tcg_gen_sub_i32(count, count, imm); + tcg_temp_free_i32(imm); + } + + tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, exitreq_label); =20 - tcg_gen_sub_i32(count, count, imm); - tcg_temp_free_i32(imm); + if (tb->cflags & CF_USE_ICOUNT) { + tcg_gen_st16_i32(count, cpu_env, + -ENV_OFFSET + offsetof(CPUState, icount_decr.u16.= low)); + } =20 - tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, icount_label); - tcg_gen_st16_i32(count, cpu_env, - -ENV_OFFSET + offsetof(CPUState, icount_decr.u16.low)= ); tcg_temp_free_i32(count); } =20 static void gen_tb_end(TranslationBlock *tb, int num_insns) { - gen_set_label(exitreq_label); - tcg_gen_exit_tb((uintptr_t)tb + TB_EXIT_REQUESTED); - if (tb->cflags & CF_USE_ICOUNT) { /* Update the num_insn immediate parameter now that we know * the actual insn count. */ tcg_set_insn_param(icount_start_insn_idx, 1, num_insns); - gen_set_label(icount_label); - tcg_gen_exit_tb((uintptr_t)tb + TB_EXIT_ICOUNT_EXPIRED); } =20 + gen_set_label(exitreq_label); + tcg_gen_exit_tb((uintptr_t)tb + TB_EXIT_REQUESTED); + /* Terminate the linked list. */ tcg_ctx.gen_op_buf[tcg_ctx.gen_op_buf[0].prev].next =3D 0; } diff --git a/include/qom/cpu.h b/include/qom/cpu.h index f69b240..1bc3ad2 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -275,11 +275,11 @@ struct qemu_work_item; * @stopped: Indicates the CPU has been artificially stopped. * @unplug: Indicates a pending CPU unplug request. * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU - * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this - * CPU and return to its top level loop. * @singlestep_enabled: Flags for single-stepping. * @icount_extra: Instructions until next timer event. - * @icount_decr: Number of cycles left, with interrupt flag in high bit. + * @icount_decr: Low 16 bits: number of cycles left, only used in icount m= ode. + * High 16 bits: Set to -1 to force TCG to stop executing linked TBs for t= his + * CPU and return to its top level loop (even in non-icount mode). * This allows a single read-compare-cbranch-write sequence to test * for both decrementer underflow and exceptions. * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution @@ -381,10 +381,6 @@ struct CPUState { /* TODO Move common fields from CPUArchState here. */ int cpu_index; /* used by alpha TCG */ uint32_t halted; /* used by alpha, cris, ppc TCG */ - union { - uint32_t u32; - icount_decr_u16 u16; - } icount_decr; uint32_t can_do_io; int32_t exception_index; /* used by m68k TCG */ =20 @@ -397,7 +393,10 @@ struct CPUState { offset from AREG0. Leave this field at the end so as to make the (absolute value) offset as small as possible. This reduces code size, especially for hosts without large memory offsets. */ - uint32_t tcg_exit_req; + union { + uint32_t u32; + icount_decr_u16 u16; + } icount_decr; =20 bool hax_vcpu_dirty; struct hax_vcpu_state *hax_vcpu; diff --git a/qom/cpu.c b/qom/cpu.c index ed87c50..7e005af 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -123,7 +123,7 @@ void cpu_exit(CPUState *cpu) atomic_set(&cpu->exit_request, 1); /* Ensure cpu_exec will see the exit request after TCG has exited. */ smp_wmb(); - atomic_set(&cpu->tcg_exit_req, 1); + atomic_set(&cpu->icount_decr.u16.high, -1); } =20 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu, diff --git a/tcg/tcg.h b/tcg/tcg.h index 631c6f6..167aa30 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -1108,7 +1108,6 @@ static inline unsigned get_mmuidx(TCGMemOpIdx oi) #define TB_EXIT_MASK 3 #define TB_EXIT_IDX0 0 #define TB_EXIT_IDX1 1 -#define TB_EXIT_ICOUNT_EXPIRED 2 #define TB_EXIT_REQUESTED 3 =20 #ifdef HAVE_TCG_QEMU_TB_EXEC diff --git a/translate-all.c b/translate-all.c index 5f44ec8..1a21e3f 100644 --- a/translate-all.c +++ b/translate-all.c @@ -1958,7 +1958,7 @@ void dump_opcount_info(FILE *f, fprintf_function cpu_= fprintf) void cpu_interrupt(CPUState *cpu, int mask) { cpu->interrupt_request |=3D mask; - cpu->tcg_exit_req =3D 1; + cpu->icount_decr.u16.high =3D -1; } =20 /* diff --git a/translate-common.c b/translate-common.c index 5e989cd..77762fd 100644 --- a/translate-common.c +++ b/translate-common.c @@ -43,14 +43,11 @@ static void tcg_handle_interrupt(CPUState *cpu, int mas= k) return; } =20 - if (use_icount) { - cpu->icount_decr.u16.high =3D 0xffff; - if (!cpu->can_do_io - && (mask & ~old_mask) !=3D 0) { - cpu_abort(cpu, "Raised interrupt while not in I/O function"); - } - } else { - cpu->tcg_exit_req =3D 1; + cpu->icount_decr.u16.high =3D -1; + if (use_icount && + !cpu->can_do_io + && (mask & ~old_mask) !=3D 0) { + cpu_abort(cpu, "Raised interrupt while not in I/O function"); } } =20 --=20 2.9.3 From nobody Sat Apr 20 05:44:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 148768349970787.23962420298267; Tue, 21 Feb 2017 05:24:59 -0800 (PST) Received: from localhost ([::1]:44557 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgAR8-0003k6-BK for importer@patchew.org; Tue, 21 Feb 2017 08:24:58 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51759) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cg9q9-0001ZP-25 for qemu-devel@nongnu.org; Tue, 21 Feb 2017 07:46:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cg9q7-0003Ba-Ny for qemu-devel@nongnu.org; Tue, 21 Feb 2017 07:46:45 -0500 Received: from mx1.redhat.com ([209.132.183.28]:43254) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cg9q7-0003BF-Hq for qemu-devel@nongnu.org; Tue, 21 Feb 2017 07:46:43 -0500 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9A255C05092E; Tue, 21 Feb 2017 12:46:43 +0000 (UTC) Received: from donizetti.redhat.com (ovpn-116-127.ams2.redhat.com [10.36.116.127]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5EDE115839; Tue, 21 Feb 2017 12:46:42 +0000 (UTC) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Tue, 21 Feb 2017 13:46:37 +0100 Message-Id: <20170221124638.19573-3-pbonzini@redhat.com> In-Reply-To: <20170221124638.19573-1-pbonzini@redhat.com> References: <20170221124638.19573-1-pbonzini@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Tue, 21 Feb 2017 12:46:43 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 2/3] replay: check icount in cpu exec loop X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Pavel Dovgalyuk , pavel.dovgaluk@ispras.ru Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Pavel Dovgalyuk This patch adds check to break cpu loop when icount expires without setting the TB_EXIT_ICOUNT_EXPIRED flag. It happens when there is no available translated blocks and all instructions were executed. In icount replay mode unnecessary tb_find will be called (which may cause an exception) and execution will be non-deterministic. Because cpu_loop_exec_tb does not longjmp anymore after exhausting the icount decrementer, it can use the align_clocks call in cpu_exec. Remove the one in cpu_loop_exec_tb, as well as the SyncClocks *sc argument. Signed-off-by: Pavel Dovgalyuk Message-Id: <002801d2810f$18809c20$4981d460$@ru> Signed-off-by: Paolo Bonzini --- cpu-exec.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/cpu-exec.c b/cpu-exec.c index 18e1973..bf126dd 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -517,7 +517,10 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, *last_tb =3D NULL; } } - if (unlikely(atomic_read(&cpu->exit_request) || replay_has_interrupt()= )) { + + /* Finally, check if we need to exit to the main loop. */ + if (unlikely(atomic_read(&cpu->exit_request) + || (use_icount && cpu->icount_decr.u16.low + cpu->icount_extra =3D= =3D 0))) { atomic_set(&cpu->exit_request, 0); cpu->exception_index =3D EXCP_INTERRUPT; return true; @@ -527,8 +530,7 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, } =20 static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, - TranslationBlock **last_tb, int *tb_ex= it, - SyncClocks *sc) + TranslationBlock **last_tb, int *tb_ex= it) { uintptr_t ret; int32_t insns_left; @@ -578,10 +580,7 @@ static inline void cpu_loop_exec_tb(CPUState *cpu, Tra= nslationBlock *tb, */ if (insns_left > 0) { cpu_exec_nocache(cpu, insns_left, tb, false); - align_clocks(sc, cpu); } - cpu->exception_index =3D EXCP_INTERRUPT; - cpu_loop_exit(cpu); } } =20 @@ -641,7 +640,7 @@ int cpu_exec(CPUState *cpu) =20 while (!cpu_handle_interrupt(cpu, &last_tb)) { TranslationBlock *tb =3D tb_find(cpu, last_tb, tb_exit); - cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit, &sc); + cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit); /* Try to align the host and virtual clocks if the guest is in advance */ align_clocks(&sc, cpu); --=20 2.9.3 From nobody Sat Apr 20 05:44:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487683240713641.9215267144191; Tue, 21 Feb 2017 05:20:40 -0800 (PST) Received: from localhost ([::1]:44530 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgAMu-0007wx-Mo for importer@patchew.org; Tue, 21 Feb 2017 08:20:36 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51774) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cg9q9-0001be-TT for qemu-devel@nongnu.org; Tue, 21 Feb 2017 07:46:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cg9q9-0003C3-4U for qemu-devel@nongnu.org; Tue, 21 Feb 2017 07:46:45 -0500 Received: from mx1.redhat.com ([209.132.183.28]:43348) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cg9q8-0003Bp-UA for qemu-devel@nongnu.org; Tue, 21 Feb 2017 07:46:45 -0500 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0E1EC81255; Tue, 21 Feb 2017 12:46:45 +0000 (UTC) Received: from donizetti.redhat.com (ovpn-116-127.ams2.redhat.com [10.36.116.127]) by smtp.corp.redhat.com (Postfix) with ESMTP id 0018B2DB4D; Tue, 21 Feb 2017 12:46:43 +0000 (UTC) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Tue, 21 Feb 2017 13:46:38 +0100 Message-Id: <20170221124638.19573-4-pbonzini@redhat.com> In-Reply-To: <20170221124638.19573-1-pbonzini@redhat.com> References: <20170221124638.19573-1-pbonzini@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Tue, 21 Feb 2017 12:46:45 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 3/3] cpu-exec: remove unnecessary check of cpu->exit_request X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, pavel.dovgaluk@ispras.ru Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The cpu->exit_request check in cpu_loop_exec_tb is unnecessary, because cpu->tcg_exit_req is always set after cpu->exit_request. So let the TB exit and we will pick up the exit request later in cpu_handle_interrupt. Signed-off-by: Paolo Bonzini --- cpu-exec.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/cpu-exec.c b/cpu-exec.c index bf126dd..db1de5a 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -535,10 +535,6 @@ static inline void cpu_loop_exec_tb(CPUState *cpu, Tra= nslationBlock *tb, uintptr_t ret; int32_t insns_left; =20 - if (unlikely(atomic_read(&cpu->exit_request))) { - return; - } - trace_exec_tb(tb, tb->pc); ret =3D cpu_tb_exec(cpu, tb); tb =3D (TranslationBlock *)(ret & ~TB_EXIT_MASK); --=20 2.9.3