From nobody Fri Nov 7 04:14:05 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1546397849681623.0899224430434; Tue, 1 Jan 2019 18:57:29 -0800 (PST) Received: from localhost ([127.0.0.1]:41419 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1geWih-0006NX-3q for importer@patchew.org; Tue, 01 Jan 2019 21:57:23 -0500 Received: from eggs.gnu.org ([208.118.235.92]:35863) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1geWgT-0004Os-SZ for qemu-devel@nongnu.org; Tue, 01 Jan 2019 21:55:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1geWgR-0005RZ-MS for qemu-devel@nongnu.org; Tue, 01 Jan 2019 21:55:05 -0500 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:60313) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1geWgR-0005QX-6d for qemu-devel@nongnu.org; Tue, 01 Jan 2019 21:55:03 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id EF53874569F; Wed, 2 Jan 2019 03:54:42 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 970327456BB; Wed, 2 Jan 2019 03:54:42 +0100 (CET) Message-Id: <1d0a75ac8b76ba8d070c3c1c01bad04ca2b13e26.1546394798.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Date: Wed, 02 Jan 2019 03:06:38 +0100 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:738:2001:2001::2001 Subject: [Qemu-devel] [PATCH 5/8] ppc4xx: Rename ppc4xx_sdram_t in ppc440_uc.c to ppc440_sdram_t X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" There's already a struct with the same name in ppc4xx_devs.c. They are not used outside their files so don't clash but they are also not identical so rename the ppc440 specific one to distinguish them. Signed-off-by: BALATON Zoltan Reviewed-by: David Gibson --- hw/ppc/ppc440_uc.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index 9360f781ce..e46f59fba8 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -481,7 +481,7 @@ void ppc4xx_sdr_init(CPUPPCState *env) =20 /*************************************************************************= ****/ /* SDRAM controller */ -typedef struct ppc4xx_sdram_t { +typedef struct ppc440_sdram_t { uint32_t addr; int nbanks; MemoryRegion containers[4]; /* used for clipping */ @@ -489,7 +489,7 @@ typedef struct ppc4xx_sdram_t { hwaddr ram_bases[4]; hwaddr ram_sizes[4]; uint32_t bcr[4]; -} ppc4xx_sdram_t; +} ppc440_sdram_t; =20 enum { SDRAM0_CFGADDR =3D 0x10, @@ -564,7 +564,7 @@ static target_ulong sdram_size(uint32_t bcr) return size; } =20 -static void sdram_set_bcr(ppc4xx_sdram_t *sdram, +static void sdram_set_bcr(ppc440_sdram_t *sdram, uint32_t *bcrp, uint32_t bcr, int enabled) { unsigned n =3D bcrp - sdram->bcr; @@ -589,7 +589,7 @@ static void sdram_set_bcr(ppc4xx_sdram_t *sdram, } } =20 -static void sdram_map_bcr(ppc4xx_sdram_t *sdram) +static void sdram_map_bcr(ppc440_sdram_t *sdram) { int i; =20 @@ -607,7 +607,7 @@ static void sdram_map_bcr(ppc4xx_sdram_t *sdram) =20 static uint32_t dcr_read_sdram(void *opaque, int dcrn) { - ppc4xx_sdram_t *sdram =3D opaque; + ppc440_sdram_t *sdram =3D opaque; uint32_t ret =3D 0; =20 switch (dcrn) { @@ -658,7 +658,7 @@ static uint32_t dcr_read_sdram(void *opaque, int dcrn) =20 static void dcr_write_sdram(void *opaque, int dcrn, uint32_t val) { - ppc4xx_sdram_t *sdram =3D opaque; + ppc440_sdram_t *sdram =3D opaque; =20 switch (dcrn) { case SDRAM_R0BAS: @@ -689,7 +689,7 @@ static void dcr_write_sdram(void *opaque, int dcrn, uin= t32_t val) =20 static void sdram_reset(void *opaque) { - ppc4xx_sdram_t *sdram =3D opaque; + ppc440_sdram_t *sdram =3D opaque; =20 sdram->addr =3D 0; } @@ -699,7 +699,7 @@ void ppc440_sdram_init(CPUPPCState *env, int nbanks, hwaddr *ram_bases, hwaddr *ram_sizes, int do_init) { - ppc4xx_sdram_t *sdram; + ppc440_sdram_t *sdram; =20 sdram =3D g_malloc0(sizeof(*sdram)); sdram->nbanks =3D nbanks; --=20 2.13.7