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Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost , xen-devel@lists.xenproject.org Subject: [PATCH 2/2] xen/pt: reserve PCI slot 2 for Intel igd-passthru Date: Wed, 26 Oct 2022 02:47:08 -0400 Message-Id: <1b98334dd30af4a467170237c8a31c1824ee9c37.1666764146.git.brchuckz@netscape.net> X-Mailer: git-send-email 2.37.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Length: 6998 X-ZohoMail-DKIM: pass (identity @aol.com) X-ZM-MESSAGEID: 1666766883707100003 Content-Type: text/plain; charset="utf-8" From: Chuck Zmudzinski Intel specifies that the Intel IGD must occupy slot 2 on the PCI bus, as noted in docs/igd-assign.txt in the Qemu source code. Currently, when the xl toolstack is used to configure a Xen HVM guest with Intel IGD passthrough to the guest with the Qemu upstream device model, a Qemu emulated PCI device will occupy slot 2 and the Intel IGD will occupy a different slot. This problem often prevents the guest from booting. The only available workaround is not good: Configure Xen HVM guests to use the old and no longer maintained Qemu traditional device model available from xenbits.xen.org which does reserve slot 2 for the Intel IGD. To implement this feature in the Qemu upstream device model for Xen HVM guests, introduce the following new class, functions, types, and macros: * XEN_PT_DEVICE_CLASS declaration, based on the existing TYPE_XEN_PT_DEVICE * XEN_PT_DEVICE_GET_CLASS macro helper function for XEN_PT_DEVICE_CLASS * typedef XenPTQdevRealize function pointer * XEN_PCI_IGD_SLOT_MASK, the value of slot_reserved_mask to reserve slot 2 * xen_igd_reserve_slot and xen_igd_clear_slot functions The new xen_igd_reserve_slot function uses the existing slot_reserved_mask member of PCIBus to reserve PCI slot 2 for Xen HVM guests configured using the xl toolstack with the gfx_passthru option enabled, which sets the igd-passthru=3Don option to Qemu for the Xen HVM machine type. The new xen_igd_reserve_slot function also needs to be implemented in hw/xen/xen_pt_stub.c to prevent FTBFS during the link stage for the case when Qemu is configured with --enable-xen and --disable-xen-pci-passthrough, in which case it does nothing. The new xen_igd_clear_slot function overrides qdev->realize of the parent PCI device class to enable the Intel IGD to occupy slot 2 on the PCI bus since slot 2 was reserved by xen_igd_reserve_slot when the PCI bus was created in hw/i386/pc_piix.c for the case when igd-passthru=3Don. Signed-off-by: Chuck Zmudzinski --- Notes that might be helpful to reviewers of patched code in hw/xen: The new functions and types are based on recommendations from Qemu docs: https://qemu.readthedocs.io/en/latest/devel/qom.html Notes that might be helpful to reviewers of patched code in hw/i386: The small patch to hw/i386/pc_piix.c is protected by CONFIG_XEN so it does not affect builds that do not have CONFIG_XEN defined. xen_igd_gfx_pt_enabled() in the patched hw/i386/pc_piix.c file is an existing function that is only true when Qemu is built with xen-pci-passthrough enabled and the administrator has configured the Xen HVM guest with Qemu's igd-passthru=3Don option. hw/i386/pc_piix.c | 3 +++ hw/xen/xen_pt.c | 25 +++++++++++++++++++++++++ hw/xen/xen_pt.h | 16 ++++++++++++++++ hw/xen/xen_pt_stub.c | 4 ++++ 4 files changed, 48 insertions(+) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 0b1a79c0fa..a0f04ad62e 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -402,6 +402,9 @@ static void pc_xen_hvm_init(MachineState *machine) } =20 pc_xen_hvm_init_pci(machine); + if (xen_igd_gfx_pt_enabled()) { + xen_igd_reserve_slot(pcms->bus); + } pci_create_simple(pcms->bus, -1, "xen-platform"); } #endif diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c index 0ec7e52183..ec42f47fac 100644 --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -950,11 +950,35 @@ static void xen_pci_passthrough_instance_init(Object = *obj) PCI_DEVICE(obj)->cap_present |=3D QEMU_PCI_CAP_EXPRESS; } =20 +void xen_igd_reserve_slot(PCIBus *pci_bus) +{ + XEN_PT_LOG(0, "Reserving PCI slot 2 for IGD\n"); + pci_bus->slot_reserved_mask |=3D XEN_PCI_IGD_SLOT_MASK; +} + +static void xen_igd_clear_slot(DeviceState *qdev, Error **errp) +{ + PCIDevice *pci_dev =3D (PCIDevice *)qdev; + XenPCIPassthroughState *s =3D XEN_PT_DEVICE(pci_dev); + XenPTDeviceClass *xptc =3D XEN_PT_DEVICE_GET_CLASS(s); + PCIBus *pci_bus =3D pci_get_bus(pci_dev); + + if (is_igd_vga_passthrough(&s->real_device) && + (s->real_device.vendor_id =3D=3D PCI_VENDOR_ID_INTEL)) { + pci_bus->slot_reserved_mask &=3D ~XEN_PCI_IGD_SLOT_MASK; + XEN_PT_LOG(pci_dev, "Intel IGD found, using slot 2\n"); + } + xptc->pci_qdev_realize(qdev, errp); +} + static void xen_pci_passthrough_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); =20 + XenPTDeviceClass *xptc =3D XEN_PT_DEVICE_CLASS(klass); + xptc->pci_qdev_realize =3D dc->realize; + dc->realize =3D xen_igd_clear_slot; k->realize =3D xen_pt_realize; k->exit =3D xen_pt_unregister_device; k->config_read =3D xen_pt_pci_read_config; @@ -977,6 +1001,7 @@ static const TypeInfo xen_pci_passthrough_info =3D { .instance_size =3D sizeof(XenPCIPassthroughState), .instance_finalize =3D xen_pci_passthrough_finalize, .class_init =3D xen_pci_passthrough_class_init, + .class_size =3D sizeof(XenPTDeviceClass), .instance_init =3D xen_pci_passthrough_instance_init, .interfaces =3D (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h index e7c4316a7d..40b31b5263 100644 --- a/hw/xen/xen_pt.h +++ b/hw/xen/xen_pt.h @@ -3,6 +3,7 @@ =20 #include "hw/xen/xen_common.h" #include "hw/pci/pci.h" +#include "hw/pci/pci_bus.h" #include "xen-host-pci-device.h" #include "qom/object.h" =20 @@ -41,7 +42,20 @@ typedef struct XenPTReg XenPTReg; #define TYPE_XEN_PT_DEVICE "xen-pci-passthrough" OBJECT_DECLARE_SIMPLE_TYPE(XenPCIPassthroughState, XEN_PT_DEVICE) =20 +#define XEN_PT_DEVICE_CLASS(klass) \ + OBJECT_CLASS_CHECK(XenPTDeviceClass, klass, TYPE_XEN_PT_DEVICE) +#define XEN_PT_DEVICE_GET_CLASS(obj) \ + OBJECT_GET_CLASS(XenPTDeviceClass, obj, TYPE_XEN_PT_DEVICE) + +typedef void (*XenPTQdevRealize)(DeviceState *qdev, Error **errp); + +typedef struct XenPTDeviceClass { + PCIDeviceClass parent_class; + XenPTQdevRealize pci_qdev_realize; +} XenPTDeviceClass; + uint32_t igd_read_opregion(XenPCIPassthroughState *s); +void xen_igd_reserve_slot(PCIBus *pci_bus); void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val); void xen_igd_passthrough_isa_bridge_create(XenPCIPassthroughState *s, XenHostPCIDevice *dev); @@ -76,6 +90,8 @@ typedef int (*xen_pt_conf_byte_read) =20 #define XEN_PCI_INTEL_OPREGION 0xfc =20 +#define XEN_PCI_IGD_SLOT_MASK 0x4UL /* Intel IGD slot_reserved_mask */ + typedef enum { XEN_PT_GRP_TYPE_HARDWIRED =3D 0, /* 0 Hardwired reg group */ XEN_PT_GRP_TYPE_EMU, /* emul reg group */ diff --git a/hw/xen/xen_pt_stub.c b/hw/xen/xen_pt_stub.c index 2d8cac8d54..5c108446a8 100644 --- a/hw/xen/xen_pt_stub.c +++ b/hw/xen/xen_pt_stub.c @@ -20,3 +20,7 @@ void xen_igd_gfx_pt_set(bool value, Error **errp) error_setg(errp, "Xen PCI passthrough support not built in"); } } + +void xen_igd_reserve_slot(PCIBus *pci_bus) +{ +} --=20 2.37.2