From nobody Sat Nov 15 16:07:32 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oracle.com ARC-Seal: i=1; a=rsa-sha256; t=1749576448; cv=none; d=zohomail.com; s=zohoarc; b=e+BHljyFxH5qZcBs2D4KNQ4AGTRdu4x2voe2LTuD+adFbehReru1Ke7GYA6wSJS3PQMEG3U0gry6Fxh1zgDaGAzjoGiI0a9l3E3C2n3RjDgNuFeB9oGZ70A2qU+xwEEE0Y1Yp58HGwCY6qP+GwxAlPn3/6lLgha+gvVodz3sC5M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1749576448; h=Cc:Cc:Date:Date:From:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=qizwWAStwZpnK+4Sqf4tNXNQjISpsZo+DmXa7/8Ezho=; b=ZnSh+VM2Z1vL3cBYgGR26ZkUK/yVnOXPegIdk1c9ziCWdIoHlO59cWfZP4JMR+Pvcel1dqBPthGFXSmUvzFEt2VUl2VnbYLqsHdGrTefbvz7ebPbU+QsOsGQ83AXlKRo691yvD5QXwdKWcl08PXjZM6oHfp4Jtn965t2umerPA0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1749576448931348.38062999107046; Tue, 10 Jun 2025 10:27:28 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uP2kU-0001ov-Bz; Tue, 10 Jun 2025 13:26:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uP2kQ-0001nM-H6 for qemu-devel@nongnu.org; Tue, 10 Jun 2025 13:26:54 -0400 Received: from mx0b-00069f02.pphosted.com ([205.220.177.32]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uP2kO-0002rl-F6 for qemu-devel@nongnu.org; Tue, 10 Jun 2025 13:26:54 -0400 Received: from pps.filterd (m0246631.ppops.net [127.0.0.1]) by mx0b-00069f02.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 55AGN7A0019454; Tue, 10 Jun 2025 17:26:46 GMT Received: from phxpaimrmta01.imrmtpd1.prodappphxaev1.oraclevcn.com (phxpaimrmta01.appoci.oracle.com [138.1.114.2]) by mx0b-00069f02.pphosted.com (PPS) with ESMTPS id 474c74vsed-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 10 Jun 2025 17:26:46 +0000 (GMT) Received: from pps.filterd (phxpaimrmta01.imrmtpd1.prodappphxaev1.oraclevcn.com [127.0.0.1]) by phxpaimrmta01.imrmtpd1.prodappphxaev1.oraclevcn.com (8.18.1.2/8.18.1.2) with ESMTP id 55AH8mDY007679; Tue, 10 Jun 2025 17:26:45 GMT Received: from pps.reinject (localhost [127.0.0.1]) by phxpaimrmta01.imrmtpd1.prodappphxaev1.oraclevcn.com (PPS) with ESMTPS id 474bv8s51n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 10 Jun 2025 17:26:45 +0000 Received: from phxpaimrmta01.imrmtpd1.prodappphxaev1.oraclevcn.com (phxpaimrmta01.imrmtpd1.prodappphxaev1.oraclevcn.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 55AHQiih006021; Tue, 10 Jun 2025 17:26:44 GMT Received: from ca-dev63.us.oracle.com (ca-dev63.us.oracle.com [10.211.8.221]) by phxpaimrmta01.imrmtpd1.prodappphxaev1.oraclevcn.com (PPS) with ESMTP id 474bv8s517-1; Tue, 10 Jun 2025 17:26:44 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=cc :date:from:message-id:subject:to; s=corp-2025-04-25; bh=qizwWASt wZpnK+4Sqf4tNXNQjISpsZo+DmXa7/8Ezho=; b=cBqO6c0SibMY3X/wM7FS9QD/ vnuI+wWSzchC0ufvQuqIbRp+DuvLFAywt2mJNBL5dGOslvqD+MFtsRcPRuXWDpPc eM0EqIOKFXRNGCNaidnUan6INS9TKrlRrAvRBhlxMVsoZpl5/FMhQmVGI2821I97 5a+mJCDlvxQXxp/tzD3WUFafefwTO1vjIhW+SffSsgkJQdDEQZuhZdPBX7eT7Odt 9OQN3DPP+3EoHhtm9wXc0s3hFi2JbKe6Zw4oNpklWzp6GiPkg41d3PUYK4CmB3rm 3Iibm9jQN1DF25++xAawcsWcjglFMgvW4v+1nH63+4AXeLJmJGd2cDzCDU/9ng== From: Steve Sistare To: qemu-devel@nongnu.org Cc: Alex Williamson , Cedric Le Goater , Yi Liu , Eric Auger , Zhenzhong Duan , "Michael S. Tsirkin" , Marcel Apfelbaum , Peter Xu , Fabiano Rosas , Steve Sistare Subject: [PATCH V5.1] pci: skip reset during cpr Date: Tue, 10 Jun 2025 10:26:43 -0700 Message-Id: <1749576403-25355-1-git-send-email-steven.sistare@oracle.com> X-Mailer: git-send-email 1.8.3.1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-06-10_08,2025-06-10_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 mlxlogscore=999 phishscore=0 malwarescore=0 suspectscore=0 spamscore=0 mlxscore=0 bulkscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2505160000 definitions=main-2506100140 X-Authority-Analysis: v=2.4 cv=LIpmQIW9 c=1 sm=1 tr=0 ts=68486ad6 cx=c_pps a=XiAAW1AwiKB2Y8Wsi+sD2Q==:117 a=XiAAW1AwiKB2Y8Wsi+sD2Q==:17 a=6IFa9wvqVegA:10 a=yPCof4ZbAAAA:8 a=tDKGrQQYyiCnxYLJR1YA:9 X-Proofpoint-ORIG-GUID: b7wpkCgxHvikyEEaECaRl7oKmWtzn5wZ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNjEwMDE0MSBTYWx0ZWRfX9K2bse3lTIZw i9vtBE5sKtNdpQGiPoGbw8FSho+a9oJJIYAOyFh/aU4wCBYKFyGLIbF0Bg6do3pWJWCCpa14L9H lvuLrs6qVGtDntrTw0krichrINTIFEM1kCUYSnId4+uMRf2O0RKMgbyEbodRnFmYzHKFW+szIxv IKb0FnDwSRixwTrnS1kCKa7X8yCSp5yD9+ldhkfE9pO9IQHHNUPKmeptiaviMatjusLuhSAqgP2 vBrezL/Cwvu0Faf7kFc32ATKDsGlYCdsDNWpIVMdOUC4umerK8p0ofsWyHpKuZ17vtAUPF+mgwE AKz2c858HxpYWk2kX87Fo+yZcj3iFmElsZDzpWO3I/G/9zwHeqplBpA+sZ4//yme5XgOv3Y0Fwy WiMQWzFO4uLnm11vt573y6oOtNwJXrHkrEw2wcJ2LeYDTDG5wwVUXwMNTlgn6daYhGIJ1hNT X-Proofpoint-GUID: b7wpkCgxHvikyEEaECaRl7oKmWtzn5wZ Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.177.32; envelope-from=steven.sistare@oracle.com; helo=mx0b-00069f02.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @oracle.com) X-ZM-MESSAGEID: 1749576449527116600 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Do not reset a vfio-pci device during CPR. Signed-off-by: Steve Sistare Acked-by: Michael S. Tsirkin --- hw/pci/pci.c | 5 +++++ hw/vfio/pci.c | 7 +++++++ include/hw/pci/pci.h | 2 ++ 3 files changed, 14 insertions(+) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 9b4bf48..c70b5ce 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -32,6 +32,7 @@ #include "hw/pci/pci_host.h" #include "hw/qdev-properties.h" #include "hw/qdev-properties-system.h" +#include "migration/cpr.h" #include "migration/qemu-file-types.h" #include "migration/vmstate.h" #include "net/net.h" @@ -537,6 +538,10 @@ static void pci_reset_regions(PCIDevice *dev) =20 static void pci_do_device_reset(PCIDevice *dev) { + if ((dev->cap_present & QEMU_PCI_SKIP_RESET_ON_CPR) && cpr_is_incoming= ()) { + return; + } + pci_device_deassert_intx(dev); assert(dev->irq_state =3D=3D 0); =20 diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index b1250d8..4cd92c3 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -3408,6 +3408,13 @@ static void vfio_instance_init(Object *obj) /* QEMU_PCI_CAP_EXPRESS initialization does not depend on QEMU command * line, therefore, no need to wait to realize like other devices */ pci_dev->cap_present |=3D QEMU_PCI_CAP_EXPRESS; + + /* + * A device that is resuming for cpr is already configured, so do not + * reset it during qemu_system_reset prior to cpr load, else interrupts + * may be lost. + */ + pci_dev->cap_present |=3D QEMU_PCI_SKIP_RESET_ON_CPR; } =20 static void vfio_pci_base_dev_class_init(ObjectClass *klass, const void *d= ata) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 35d59d7..df3cc7b 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -222,6 +222,8 @@ enum { QEMU_PCIE_EXT_TAG =3D (1 << QEMU_PCIE_EXT_TAG_BITNR), #define QEMU_PCI_CAP_PM_BITNR 14 QEMU_PCI_CAP_PM =3D (1 << QEMU_PCI_CAP_PM_BITNR), +#define QEMU_PCI_SKIP_RESET_ON_CPR_BITNR 15 + QEMU_PCI_SKIP_RESET_ON_CPR =3D (1 << QEMU_PCI_SKIP_RESET_ON_CPR_BITNR), }; =20 typedef struct PCIINTxRoute { --=20 1.8.3.1