From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1740146585; cv=none; d=zohomail.com; s=zohoarc; b=URyevsfUs8iq/ez9wN1zv79hfV+NbBGTB2cwTqvzKYSn0LmX3Mx1pCpVFSJXo6iY6h03NLNrKx9/I13fh4ztxAMeteDwOWVZ3sFp5gi93/GwzZ1r6VgN5jr3ES64knN01szIMJ1ZDeupMqyyErBgTdNGWWYpnfZOROntaPLROLY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1740146585; h=Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=np/5k2yKZv1pm+cgwBhYE6E+yOA272uLrRXCUF7sHr4=; b=EI/6drIHmfOkgEDeUCCXFTj+OzbEHxUiPtQQKP7L+bVqm+sK/pFhcchukIDEv9BiPHOgCevFZVi+X3KNaN3fx8QiOdwgVCgnS0IIFEoTvkwvGs6bIZQ3gy71416JnTj9ih9/TtEjV4+1FbUOFtAVy/pRtnFeZ52EWiP3Pgv+lUo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1740146585077343.02838266790593; Fri, 21 Feb 2025 06:03:05 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlTbU-0000CP-7N; Fri, 21 Feb 2025 09:02:08 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tlOWf-0006Q2-P5 for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:36:50 -0500 Received: from linux.microsoft.com ([13.77.154.182]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlOWc-000154-V2 for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:36:49 -0500 Received: by linux.microsoft.com (Postfix, from userid 1031) id 48018204E5B4; Fri, 21 Feb 2025 00:36:29 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 48018204E5B4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1740126989; bh=np/5k2yKZv1pm+cgwBhYE6E+yOA272uLrRXCUF7sHr4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ouPvQ8lmeAFKwLtE7XcjMpsPjKhTP5LyaDnM3fWH3XPpMbQjUQZrRAFEbQ6HDPsFD 38lUlRFgmN9hFTlqemuEVqFr84o2Joy4/oTc7Ss3sGR7981CKhHTQsoVjRRs1nhACy Hk9/u7XbCdEtAIDsYakwLa7PZ9moO0brSCqLsFyc= From: Wei Liu To: qemu-devel@nongnu.org Cc: wei.liu@kernel.org, dirty@apple.com, rbolshakov@ddn.com, phil@philjordan.eu, jinankjain@linux.microsoft.com, liuwe@microsoft.com, muislam@microsoft.com, ziqiaozhou@microsoft.com, mukeshrathor@microsoft.com, magnuskulke@microsoft.com, prapal@microsoft.com, jpiotrowski@microsoft.com, deviv@microsoft.com, Wei Liu Subject: [RFC PATCH v1 01/19] target/i386/hvf: fix a typo in a type name Date: Fri, 21 Feb 2025 00:36:09 -0800 Message-Id: <1740126987-8483-2-git-send-email-liuwe@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> References: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=13.77.154.182; envelope-from=liuwe@linux.microsoft.com; helo=linux.microsoft.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Fri, 21 Feb 2025 09:01:05 -0500 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linux.microsoft.com) X-ZM-MESSAGEID: 1740146587879019100 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The prefix x68 is wrong. Change it to x86. Signed-off-by: Wei Liu Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/i386/hvf/hvf.c | 2 +- target/i386/hvf/x86.c | 4 ++-- target/i386/hvf/x86.h | 8 ++++---- target/i386/hvf/x86_descr.c | 8 ++++---- target/i386/hvf/x86_descr.h | 6 +++--- target/i386/hvf/x86_task.c | 22 +++++++++++----------- target/i386/hvf/x86_task.h | 2 +- 7 files changed, 26 insertions(+), 26 deletions(-) diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index ca08f0753f..353549fa77 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -674,7 +674,7 @@ int hvf_vcpu_exec(CPUState *cpu) } case EXIT_REASON_TASK_SWITCH: { uint64_t vinfo =3D rvmcs(cpu->accel->fd, VMCS_IDT_VECTORING_IN= FO); - x68_segment_selector sel =3D {.sel =3D exit_qual & 0xffff}; + x86_segment_selector sel =3D {.sel =3D exit_qual & 0xffff}; vmx_handle_task_switch(cpu, sel, (exit_qual >> 30) & 0x3, vinfo & VMCS_INTR_VALID, vinfo & VECTORING_INFO_VECTOR_MASK, = vinfo & VMCS_INTR_T_MASK); diff --git a/target/i386/hvf/x86.c b/target/i386/hvf/x86.c index 80e36136d0..a0ede13886 100644 --- a/target/i386/hvf/x86.c +++ b/target/i386/hvf/x86.c @@ -48,7 +48,7 @@ =20 bool x86_read_segment_descriptor(CPUState *cpu, struct x86_segment_descriptor *desc, - x68_segment_selector sel) + x86_segment_selector sel) { target_ulong base; uint32_t limit; @@ -78,7 +78,7 @@ bool x86_read_segment_descriptor(CPUState *cpu, =20 bool x86_write_segment_descriptor(CPUState *cpu, struct x86_segment_descriptor *desc, - x68_segment_selector sel) + x86_segment_selector sel) { target_ulong base; uint32_t limit; diff --git a/target/i386/hvf/x86.h b/target/i386/hvf/x86.h index 3570f29aa9..063cd0b83e 100644 --- a/target/i386/hvf/x86.h +++ b/target/i386/hvf/x86.h @@ -183,7 +183,7 @@ static inline uint32_t x86_call_gate_offset(x86_call_ga= te *gate) #define GDT_SEL 0 #define LDT_SEL 1 =20 -typedef struct x68_segment_selector { +typedef struct x86_segment_selector { union { uint16_t sel; struct { @@ -192,7 +192,7 @@ typedef struct x68_segment_selector { uint16_t index:13; }; }; -} __attribute__ ((__packed__)) x68_segment_selector; +} __attribute__ ((__packed__)) x86_segment_selector; =20 /* useful register access macros */ #define x86_reg(cpu, reg) ((x86_register *) &cpu->regs[reg]) @@ -250,10 +250,10 @@ typedef struct x68_segment_selector { /* deal with GDT/LDT descriptors in memory */ bool x86_read_segment_descriptor(CPUState *cpu, struct x86_segment_descriptor *desc, - x68_segment_selector sel); + x86_segment_selector sel); bool x86_write_segment_descriptor(CPUState *cpu, struct x86_segment_descriptor *desc, - x68_segment_selector sel); + x86_segment_selector sel); =20 bool x86_read_call_gate(CPUState *cpu, struct x86_call_gate *idt_desc, int gate); diff --git a/target/i386/hvf/x86_descr.c b/target/i386/hvf/x86_descr.c index f33836d6cb..7b599c9037 100644 --- a/target/i386/hvf/x86_descr.c +++ b/target/i386/hvf/x86_descr.c @@ -60,14 +60,14 @@ uint64_t vmx_read_segment_base(CPUState *cpu, X86Seg se= g) return rvmcs(cpu->accel->fd, vmx_segment_fields[seg].base); } =20 -x68_segment_selector vmx_read_segment_selector(CPUState *cpu, X86Seg seg) +x86_segment_selector vmx_read_segment_selector(CPUState *cpu, X86Seg seg) { - x68_segment_selector sel; + x86_segment_selector sel; sel.sel =3D rvmcs(cpu->accel->fd, vmx_segment_fields[seg].selector); return sel; } =20 -void vmx_write_segment_selector(CPUState *cpu, x68_segment_selector select= or, X86Seg seg) +void vmx_write_segment_selector(CPUState *cpu, x86_segment_selector select= or, X86Seg seg) { wvmcs(cpu->accel->fd, vmx_segment_fields[seg].selector, selector.sel); } @@ -90,7 +90,7 @@ void vmx_write_segment_descriptor(CPUState *cpu, struct v= mx_segment *desc, X86Se wvmcs(cpu->accel->fd, sf->ar_bytes, desc->ar); } =20 -void x86_segment_descriptor_to_vmx(CPUState *cpu, x68_segment_selector sel= ector, +void x86_segment_descriptor_to_vmx(CPUState *cpu, x86_segment_selector sel= ector, struct x86_segment_descriptor *desc, struct vmx_segment *vmx_desc) { diff --git a/target/i386/hvf/x86_descr.h b/target/i386/hvf/x86_descr.h index 9f06014b56..ce5de98349 100644 --- a/target/i386/hvf/x86_descr.h +++ b/target/i386/hvf/x86_descr.h @@ -34,10 +34,10 @@ void vmx_read_segment_descriptor(CPUState *cpu, void vmx_write_segment_descriptor(CPUState *cpu, struct vmx_segment *desc, enum X86Seg seg); =20 -x68_segment_selector vmx_read_segment_selector(CPUState *cpu, +x86_segment_selector vmx_read_segment_selector(CPUState *cpu, enum X86Seg seg); void vmx_write_segment_selector(CPUState *cpu, - x68_segment_selector selector, + x86_segment_selector selector, enum X86Seg seg); =20 uint64_t vmx_read_segment_base(CPUState *cpu, enum X86Seg seg); @@ -45,7 +45,7 @@ void vmx_write_segment_base(CPUState *cpu, enum X86Seg se= g, uint64_t base); =20 void x86_segment_descriptor_to_vmx(CPUState *cpu, - x68_segment_selector selector, + x86_segment_selector selector, struct x86_segment_descriptor *desc, struct vmx_segment *vmx_desc); =20 diff --git a/target/i386/hvf/x86_task.c b/target/i386/hvf/x86_task.c index bcd844cff6..287fe11cf7 100644 --- a/target/i386/hvf/x86_task.c +++ b/target/i386/hvf/x86_task.c @@ -76,16 +76,16 @@ static void load_state_from_tss32(CPUState *cpu, struct= x86_tss_segment32 *tss) RSI(env) =3D tss->esi; RDI(env) =3D tss->edi; =20 - vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->ldt}}, R_= LDTR); - vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->es}}, R_E= S); - vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->cs}}, R_C= S); - vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->ss}}, R_S= S); - vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->ds}}, R_D= S); - vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->fs}}, R_F= S); - vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->gs}}, R_G= S); + vmx_write_segment_selector(cpu, (x86_segment_selector){{tss->ldt}}, R_= LDTR); + vmx_write_segment_selector(cpu, (x86_segment_selector){{tss->es}}, R_E= S); + vmx_write_segment_selector(cpu, (x86_segment_selector){{tss->cs}}, R_C= S); + vmx_write_segment_selector(cpu, (x86_segment_selector){{tss->ss}}, R_S= S); + vmx_write_segment_selector(cpu, (x86_segment_selector){{tss->ds}}, R_D= S); + vmx_write_segment_selector(cpu, (x86_segment_selector){{tss->fs}}, R_F= S); + vmx_write_segment_selector(cpu, (x86_segment_selector){{tss->gs}}, R_G= S); } =20 -static int task_switch_32(CPUState *cpu, x68_segment_selector tss_sel, x68= _segment_selector old_tss_sel, +static int task_switch_32(CPUState *cpu, x86_segment_selector tss_sel, x86= _segment_selector old_tss_sel, uint64_t old_tss_base, struct x86_segment_descri= ptor *new_desc) { struct x86_tss_segment32 tss_seg; @@ -108,7 +108,7 @@ static int task_switch_32(CPUState *cpu, x68_segment_se= lector tss_sel, x68_segme return 0; } =20 -void vmx_handle_task_switch(CPUState *cpu, x68_segment_selector tss_sel, i= nt reason, bool gate_valid, uint8_t gate, uint64_t gate_type) +void vmx_handle_task_switch(CPUState *cpu, x86_segment_selector tss_sel, i= nt reason, bool gate_valid, uint8_t gate, uint64_t gate_type) { uint64_t rip =3D rreg(cpu->accel->fd, HV_X86_RIP); if (!gate_valid || (gate_type !=3D VMCS_INTR_T_HWEXCEPTION && @@ -122,7 +122,7 @@ void vmx_handle_task_switch(CPUState *cpu, x68_segment_= selector tss_sel, int rea load_regs(cpu); =20 struct x86_segment_descriptor curr_tss_desc, next_tss_desc; - x68_segment_selector old_tss_sel =3D vmx_read_segment_selector(cpu, R_= TR); + x86_segment_selector old_tss_sel =3D vmx_read_segment_selector(cpu, R_= TR); uint64_t old_tss_base =3D vmx_read_segment_base(cpu, R_TR); uint32_t desc_limit; struct x86_call_gate task_gate_desc; @@ -140,7 +140,7 @@ void vmx_handle_task_switch(CPUState *cpu, x68_segment_= selector tss_sel, int rea x86_read_call_gate(cpu, &task_gate_desc, gate); =20 dpl =3D task_gate_desc.dpl; - x68_segment_selector cs =3D vmx_read_segment_selector(cpu, R_CS); + x86_segment_selector cs =3D vmx_read_segment_selector(cpu, R_CS); if (tss_sel.rpl > dpl || cs.rpl > dpl) ;//DPRINTF("emulate_gp"); } diff --git a/target/i386/hvf/x86_task.h b/target/i386/hvf/x86_task.h index 4eaa61a7de..b9afac6a47 100644 --- a/target/i386/hvf/x86_task.h +++ b/target/i386/hvf/x86_task.h @@ -15,6 +15,6 @@ #ifndef HVF_X86_TASK_H #define HVF_X86_TASK_H =20 -void vmx_handle_task_switch(CPUState *cpu, x68_segment_selector tss_sel, +void vmx_handle_task_switch(CPUState *cpu, x86_segment_selector tss_sel, int reason, bool gate_valid, uint8_t gate, uint64_t gate_type); #endif --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" There is a conflicting declaration for hvf_handle_io in x86_emu.c. The typ= e of the first argument is wrong. There has never been a problem because the fi= rst argument is not used in hvf_handle_io. That being said, the code shouldn't contain such an error. Use the proper declaration from hvf-i386.h. Take the chance to change the first argument's type to be CPUState. Signed-off-by: Wei Liu --- target/i386/hvf/hvf-i386.h | 2 +- target/i386/hvf/hvf.c | 6 +++--- target/i386/hvf/x86_emu.c | 4 +--- 3 files changed, 5 insertions(+), 7 deletions(-) diff --git a/target/i386/hvf/hvf-i386.h b/target/i386/hvf/hvf-i386.h index e99c02cd4b..046b681d13 100644 --- a/target/i386/hvf/hvf-i386.h +++ b/target/i386/hvf/hvf-i386.h @@ -18,7 +18,7 @@ =20 uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx, int reg); =20 -void hvf_handle_io(CPUArchState *, uint16_t, void *, int, int, int); +void hvf_handle_io(CPUState *, uint16_t, void *, int, int, int); =20 /* Host specific functions */ int hvf_inject_interrupt(CPUArchState *env, int vector); diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 353549fa77..1ecb6993ba 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -103,7 +103,7 @@ static void update_apic_tpr(CPUState *cpu) =20 #define VECTORING_INFO_VECTOR_MASK 0xff =20 -void hvf_handle_io(CPUArchState *env, uint16_t port, void *buffer, +void hvf_handle_io(CPUState *env, uint16_t port, void *buffer, int direction, int size, int count) { int i; @@ -536,7 +536,7 @@ int hvf_vcpu_exec(CPUState *cpu) if (!string && in) { uint64_t val =3D 0; load_regs(cpu); - hvf_handle_io(env, port, &val, 0, size, 1); + hvf_handle_io(env_cpu(env), port, &val, 0, size, 1); if (size =3D=3D 1) { AL(env) =3D val; } else if (size =3D=3D 2) { @@ -551,7 +551,7 @@ int hvf_vcpu_exec(CPUState *cpu) break; } else if (!string && !in) { RAX(env) =3D rreg(cpu->accel->fd, HV_X86_RAX); - hvf_handle_io(env, port, &RAX(env), 1, size, 1); + hvf_handle_io(env_cpu(env), port, &RAX(env), 1, size, 1); macvm_set_rip(cpu, rip + ins_len); break; } diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index 69c61c9c07..2c7da10c1d 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -44,9 +44,7 @@ #include "x86_flags.h" #include "vmcs.h" #include "vmx.h" - -void hvf_handle_io(CPUState *cs, uint16_t port, void *data, - int direction, int size, uint32_t count); +#include "hvf-i386.h" =20 #define EXEC_2OP_FLAGS_CMD(env, decode, cmd, FLAGS_FUNC, save_res) \ { \ --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Make the code to rely on the segment definition for checking cs.db. This allows removing HVF specific VMX related definition from the decoder. Introduce a function for retrieving the CS descriptor. No functional change intended. Signed-off-by: Wei Liu --- target/i386/hvf/x86_decode.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/target/i386/hvf/x86_decode.c b/target/i386/hvf/x86_decode.c index a4a28f113f..d6d5894e54 100644 --- a/target/i386/hvf/x86_decode.c +++ b/target/i386/hvf/x86_decode.c @@ -1893,6 +1893,16 @@ static void decode_prefix(CPUX86State *env, struct x= 86_decode *decode) } } =20 +static struct x86_segment_descriptor get_cs_descriptor(CPUState *s) +{ + struct vmx_segment vmx_cs; + x86_segment_descriptor cs; + vmx_read_segment_descriptor(s, &vmx_cs, R_CS); + vmx_segment_to_x86_descriptor(s, &vmx_cs, &cs); + + return cs; +} + void set_addressing_size(CPUX86State *env, struct x86_decode *decode) { decode->addressing_size =3D -1; @@ -1904,10 +1914,9 @@ void set_addressing_size(CPUX86State *env, struct x8= 6_decode *decode) } } else if (!x86_is_long_mode(env_cpu(env))) { /* protected */ - struct vmx_segment cs; - vmx_read_segment_descriptor(env_cpu(env), &cs, R_CS); + x86_segment_descriptor cs =3D get_cs_descriptor(env_cpu(env)); /* check db */ - if ((cs.ar >> 14) & 1) { + if (cs.db) { if (decode->addr_size_override) { decode->addressing_size =3D 2; } else { @@ -1941,10 +1950,9 @@ void set_operand_size(CPUX86State *env, struct x86_d= ecode *decode) } } else if (!x86_is_long_mode(env_cpu(env))) { /* protected */ - struct vmx_segment cs; - vmx_read_segment_descriptor(env_cpu(env), &cs, R_CS); + x86_segment_descriptor cs =3D get_cs_descriptor(env_cpu(env)); /* check db */ - if ((cs.ar >> 14) & 1) { + if (cs.db) { if (decode->op_size_override) { decode->operand_size =3D 2; } else{ --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; 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Fri, 21 Feb 2025 06:02:15 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlTbC-0008CO-7L; Fri, 21 Feb 2025 09:01:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tlOWc-0006PS-6d for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:36:47 -0500 Received: from linux.microsoft.com ([13.77.154.182]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlOWY-000146-1N for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:36:45 -0500 Received: by linux.microsoft.com (Postfix, from userid 1031) id 6EBE8204E5B7; Fri, 21 Feb 2025 00:36:29 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 6EBE8204E5B7 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1740126989; bh=ZpWdyoBCewATMN+6HT2JXYdvnRBsMjNr75QDsjaaAek=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LfRfauY2O7YHFopDVXXdYCm0foQAGm54q3Hl2lo2W35NWv8/G2dLc2UDtDnSBnpZp WMlT+m+AKuFRiOc9/FI72eJqNfmu7qW+XPTDNpw8GequxsWJZf6gtYAmUA1CPTTq+c SifUGxeRz1K66CQIBv66tuIA0grKHVq5XO60WpNE= From: Wei Liu To: qemu-devel@nongnu.org Cc: wei.liu@kernel.org, dirty@apple.com, rbolshakov@ddn.com, phil@philjordan.eu, jinankjain@linux.microsoft.com, liuwe@microsoft.com, muislam@microsoft.com, ziqiaozhou@microsoft.com, mukeshrathor@microsoft.com, magnuskulke@microsoft.com, prapal@microsoft.com, jpiotrowski@microsoft.com, deviv@microsoft.com, Wei Liu Subject: [RFC PATCH v1 04/19] target/i386/hvf: introduce x86_emul_ops Date: Fri, 21 Feb 2025 00:36:12 -0800 Message-Id: <1740126987-8483-5-git-send-email-liuwe@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> References: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" This will be used to remove HVF specific code from the instruction emulator. For now we only introduce two hooks for x86_decode.c. More hooks will be ad= ded when the code is refactored. The emulator initialization function now takes in a pointer to the ops stru= cture. Signed-off-by: Wei Liu --- target/i386/hvf/hvf.c | 20 +++++++++++++++++++- target/i386/hvf/x86_emu.c | 5 ++++- target/i386/hvf/x86_emu.h | 10 +++++++++- 3 files changed, 32 insertions(+), 3 deletions(-) diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 1ecb6993ba..e1e7cc3b7d 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -228,6 +228,24 @@ hv_return_t hvf_arch_vm_create(MachineState *ms, uint3= 2_t pa_range) return hv_vm_create(HV_VM_DEFAULT); } =20 +static void hvf_read_segment_descriptor(CPUState *s, struct x86_segment_de= scriptor *desc, + X86Seg seg) +{ + struct vmx_segment vmx_segment; + vmx_read_segment_descriptor(s, &vmx_segment, seg); + vmx_segment_to_x86_descriptor(s, &vmx_segment, desc); +} + +static void hvf_read_mem(CPUState *cpu, void *data, target_ulong gva, int = bytes) +{ + vmx_read_mem(cpu, data, gva, bytes); +} + +static const struct x86_emul_ops hvf_x86_emul_ops =3D { + .read_mem =3D hvf_read_mem, + .read_segment_descriptor =3D hvf_read_segment_descriptor, +}; + int hvf_arch_init_vcpu(CPUState *cpu) { X86CPU *x86cpu =3D X86_CPU(cpu); @@ -236,7 +254,7 @@ int hvf_arch_init_vcpu(CPUState *cpu) int r; uint64_t reqCap; =20 - init_emu(); + init_emu(&hvf_x86_emul_ops); init_decoder(); =20 if (hvf_state->hvf_caps =3D=3D NULL) { diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index 2c7da10c1d..96447ea2c0 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -1444,6 +1444,8 @@ static struct cmd_handler { =20 static struct cmd_handler _cmd_handler[X86_DECODE_CMD_LAST]; =20 +const struct x86_emul_ops *emul_ops; + static void init_cmd_handler(void) { int i; @@ -1516,7 +1518,8 @@ bool exec_instruction(CPUX86State *env, struct x86_de= code *ins) return true; } =20 -void init_emu(void) +void init_emu(const struct x86_emul_ops *o) { + emul_ops =3D o; init_cmd_handler(); } diff --git a/target/i386/hvf/x86_emu.h b/target/i386/hvf/x86_emu.h index 8bd97608c4..8f4f8f1eca 100644 --- a/target/i386/hvf/x86_emu.h +++ b/target/i386/hvf/x86_emu.h @@ -23,7 +23,15 @@ #include "x86_decode.h" #include "cpu.h" =20 -void init_emu(void); +struct x86_emul_ops { + void (*read_mem)(CPUState *cpu, void *data, target_ulong addr, int byt= es); + void (*read_segment_descriptor)(CPUState *cpu, struct x86_segment_desc= riptor *desc, + enum X86Seg seg); +}; + +extern const struct x86_emul_ops *emul_ops; + +void init_emu(const struct x86_emul_ops *ops); bool exec_instruction(CPUX86State *env, struct x86_decode *ins); =20 void load_regs(CPUState *cpu); --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1740146537; cv=none; d=zohomail.com; s=zohoarc; b=Ka+X1p5oKHAjQxypZiPyq+R2K/oM+9ZnC7zD0ldyIEUkFtdBQOMXeSJOwxCH74BdjHvniunx00ykE86vSY9gOGL6WDBUg3Jaak4pab+P3MmM+EZ1Q41EaXtjZUfwehc0aLBNz1vUe8+FpUpYjIBcZNJuvf4VzUe3w/Ui+tJI8oc= ARC-Message-Signature: i=1; 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charset="utf-8" Use the newly defined emul_ops. This allows the module to be reused by other accelerator in the future. No functional change intended. Signed-off-by: Wei Liu --- target/i386/hvf/x86_decode.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) diff --git a/target/i386/hvf/x86_decode.c b/target/i386/hvf/x86_decode.c index d6d5894e54..31285952ad 100644 --- a/target/i386/hvf/x86_decode.c +++ b/target/i386/hvf/x86_decode.c @@ -21,6 +21,7 @@ #include "panic.h" #include "x86_decode.h" #include "vmx.h" +#include "x86_emu.h" #include "x86_mmu.h" #include "x86_descr.h" =20 @@ -74,7 +75,7 @@ static inline uint64_t decode_bytes(CPUX86State *env, str= uct x86_decode *decode, break; } target_ulong va =3D linear_rip(env_cpu(env), env->eip) + decode->len; - vmx_read_mem(env_cpu(env), &val, va, size); + emul_ops->read_mem(env_cpu(env), &val, va, size); decode->len +=3D size; =20 return val; @@ -1893,16 +1894,6 @@ static void decode_prefix(CPUX86State *env, struct x= 86_decode *decode) } } =20 -static struct x86_segment_descriptor get_cs_descriptor(CPUState *s) -{ - struct vmx_segment vmx_cs; - x86_segment_descriptor cs; - vmx_read_segment_descriptor(s, &vmx_cs, R_CS); - vmx_segment_to_x86_descriptor(s, &vmx_cs, &cs); - - return cs; -} - void set_addressing_size(CPUX86State *env, struct x86_decode *decode) { decode->addressing_size =3D -1; @@ -1914,7 +1905,8 @@ void set_addressing_size(CPUX86State *env, struct x86= _decode *decode) } } else if (!x86_is_long_mode(env_cpu(env))) { /* protected */ - x86_segment_descriptor cs =3D get_cs_descriptor(env_cpu(env)); + x86_segment_descriptor cs; + emul_ops->read_segment_descriptor(env_cpu(env), &cs, R_CS); /* check db */ if (cs.db) { if (decode->addr_size_override) { @@ -1950,7 +1942,8 @@ void set_operand_size(CPUX86State *env, struct x86_de= code *decode) } } else if (!x86_is_long_mode(env_cpu(env))) { /* protected */ - x86_segment_descriptor cs =3D get_cs_descriptor(env_cpu(env)); + x86_segment_descriptor cs; + emul_ops->read_segment_descriptor(env_cpu(env), &cs, R_CS); /* check db */ if (cs.db) { if (decode->op_size_override) { --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1740146774118607.8988430964262; Fri, 21 Feb 2025 06:06:14 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlTbZ-0000Le-3Q; Fri, 21 Feb 2025 09:02:13 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tlOWh-0006Qs-Mg for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:36:52 -0500 Received: from linux.microsoft.com ([13.77.154.182]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlOWc-00015K-VM for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:36:50 -0500 Received: by linux.microsoft.com (Postfix, from userid 1031) id 88C5B204E5B9; Fri, 21 Feb 2025 00:36:29 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 88C5B204E5B9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1740126989; bh=jjeIaG9DwJUKGnit+zJ24Cl1eykEKi5ZQF8GegV2KyI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bQwyujBGnas0Wqqqf6dkojES4XJovegEaVz9bXFfdPzYA5fkxgdHIS5XHa4cLQx9p 1RgZWgEFZOJNDGcYgF21EMpe31HAC8fF99NSD+m+Oy7kJOYf6OZPqyWt05J22JcQfq xRQ6Yw8JVPRNy7M8ssPeCmv73VAxFJoUETQ/ks3o= From: Wei Liu To: qemu-devel@nongnu.org Cc: wei.liu@kernel.org, dirty@apple.com, rbolshakov@ddn.com, phil@philjordan.eu, jinankjain@linux.microsoft.com, liuwe@microsoft.com, muislam@microsoft.com, ziqiaozhou@microsoft.com, mukeshrathor@microsoft.com, magnuskulke@microsoft.com, prapal@microsoft.com, jpiotrowski@microsoft.com, deviv@microsoft.com, Wei Liu Subject: [RFC PATCH v1 06/19] target/i386/hvf: move and rename {load, store}_regs Date: Fri, 21 Feb 2025 00:36:14 -0800 Message-Id: <1740126987-8483-7-git-send-email-liuwe@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> References: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" They contain HVF specific code. Move them to a better location and add "hvf_" prefix. Fix up all the call sites. No functional change. Signed-off-by: Wei Liu --- target/i386/hvf/hvf.c | 71 +++++++++++++++++++++++++++++++------- target/i386/hvf/x86_emu.c | 46 ------------------------ target/i386/hvf/x86_emu.h | 3 -- target/i386/hvf/x86_task.c | 4 +-- target/i386/hvf/x86hvf.h | 3 ++ 5 files changed, 64 insertions(+), 63 deletions(-) diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index e1e7cc3b7d..3c306101f9 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -61,6 +61,7 @@ #include "vmx.h" #include "x86.h" #include "x86_descr.h" +#include "x86_flags.h" #include "x86_mmu.h" #include "x86_decode.h" #include "x86_emu.h" @@ -452,6 +453,52 @@ static void hvf_cpu_x86_cpuid(CPUX86State *env, uint32= _t index, uint32_t count, } } =20 +void hvf_load_regs(CPUState *cs) +{ + X86CPU *cpu =3D X86_CPU(cs); + CPUX86State *env =3D &cpu->env; + + int i =3D 0; + RRX(env, R_EAX) =3D rreg(cs->accel->fd, HV_X86_RAX); + RRX(env, R_EBX) =3D rreg(cs->accel->fd, HV_X86_RBX); + RRX(env, R_ECX) =3D rreg(cs->accel->fd, HV_X86_RCX); + RRX(env, R_EDX) =3D rreg(cs->accel->fd, HV_X86_RDX); + RRX(env, R_ESI) =3D rreg(cs->accel->fd, HV_X86_RSI); + RRX(env, R_EDI) =3D rreg(cs->accel->fd, HV_X86_RDI); + RRX(env, R_ESP) =3D rreg(cs->accel->fd, HV_X86_RSP); + RRX(env, R_EBP) =3D rreg(cs->accel->fd, HV_X86_RBP); + for (i =3D 8; i < 16; i++) { + RRX(env, i) =3D rreg(cs->accel->fd, HV_X86_RAX + i); + } + + env->eflags =3D rreg(cs->accel->fd, HV_X86_RFLAGS); + rflags_to_lflags(env); + env->eip =3D rreg(cs->accel->fd, HV_X86_RIP); +} + +void hvf_store_regs(CPUState *cs) +{ + X86CPU *cpu =3D X86_CPU(cs); + CPUX86State *env =3D &cpu->env; + + int i =3D 0; + wreg(cs->accel->fd, HV_X86_RAX, RAX(env)); + wreg(cs->accel->fd, HV_X86_RBX, RBX(env)); + wreg(cs->accel->fd, HV_X86_RCX, RCX(env)); + wreg(cs->accel->fd, HV_X86_RDX, RDX(env)); + wreg(cs->accel->fd, HV_X86_RSI, RSI(env)); + wreg(cs->accel->fd, HV_X86_RDI, RDI(env)); + wreg(cs->accel->fd, HV_X86_RBP, RBP(env)); + wreg(cs->accel->fd, HV_X86_RSP, RSP(env)); + for (i =3D 8; i < 16; i++) { + wreg(cs->accel->fd, HV_X86_RAX + i, RRX(env, i)); + } + + lflags_to_rflags(env); + wreg(cs->accel->fd, HV_X86_RFLAGS, env->eflags); + macvm_set_rip(cs, env->eip); +} + int hvf_vcpu_exec(CPUState *cpu) { X86CPU *x86_cpu =3D X86_CPU(cpu); @@ -535,10 +582,10 @@ int hvf_vcpu_exec(CPUState *cpu) if (ept_emulation_fault(slot, gpa, exit_qual)) { struct x86_decode decode; =20 - load_regs(cpu); + hvf_load_regs(cpu); decode_instruction(env, &decode); exec_instruction(env, &decode); - store_regs(cpu); + hvf_store_regs(cpu); break; } break; @@ -553,7 +600,7 @@ int hvf_vcpu_exec(CPUState *cpu) =20 if (!string && in) { uint64_t val =3D 0; - load_regs(cpu); + hvf_load_regs(cpu); hvf_handle_io(env_cpu(env), port, &val, 0, size, 1); if (size =3D=3D 1) { AL(env) =3D val; @@ -565,7 +612,7 @@ int hvf_vcpu_exec(CPUState *cpu) RAX(env) =3D (uint64_t)val; } env->eip +=3D ins_len; - store_regs(cpu); + hvf_store_regs(cpu); break; } else if (!string && !in) { RAX(env) =3D rreg(cpu->accel->fd, HV_X86_RAX); @@ -575,11 +622,11 @@ int hvf_vcpu_exec(CPUState *cpu) } struct x86_decode decode; =20 - load_regs(cpu); + hvf_load_regs(cpu); decode_instruction(env, &decode); assert(ins_len =3D=3D decode.len); exec_instruction(env, &decode); - store_regs(cpu); + hvf_store_regs(cpu); =20 break; } @@ -632,21 +679,21 @@ int hvf_vcpu_exec(CPUState *cpu) case EXIT_REASON_RDMSR: case EXIT_REASON_WRMSR: { - load_regs(cpu); + hvf_load_regs(cpu); if (exit_reason =3D=3D EXIT_REASON_RDMSR) { simulate_rdmsr(env); } else { simulate_wrmsr(env); } env->eip +=3D ins_len; - store_regs(cpu); + hvf_store_regs(cpu); break; } case EXIT_REASON_CR_ACCESS: { int cr; int reg; =20 - load_regs(cpu); + hvf_load_regs(cpu); cr =3D exit_qual & 15; reg =3D (exit_qual >> 8) & 15; =20 @@ -674,16 +721,16 @@ int hvf_vcpu_exec(CPUState *cpu) abort(); } env->eip +=3D ins_len; - store_regs(cpu); + hvf_store_regs(cpu); break; } case EXIT_REASON_APIC_ACCESS: { /* TODO */ struct x86_decode decode; =20 - load_regs(cpu); + hvf_load_regs(cpu); decode_instruction(env, &decode); exec_instruction(env, &decode); - store_regs(cpu); + hvf_store_regs(cpu); break; } case EXIT_REASON_TPR: { diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index 96447ea2c0..2fb54e1f1e 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -1454,52 +1454,6 @@ static void init_cmd_handler(void) } } =20 -void load_regs(CPUState *cs) -{ - X86CPU *cpu =3D X86_CPU(cs); - CPUX86State *env =3D &cpu->env; - - int i =3D 0; - RRX(env, R_EAX) =3D rreg(cs->accel->fd, HV_X86_RAX); - RRX(env, R_EBX) =3D rreg(cs->accel->fd, HV_X86_RBX); - RRX(env, R_ECX) =3D rreg(cs->accel->fd, HV_X86_RCX); - RRX(env, R_EDX) =3D rreg(cs->accel->fd, HV_X86_RDX); - RRX(env, R_ESI) =3D rreg(cs->accel->fd, HV_X86_RSI); - RRX(env, R_EDI) =3D rreg(cs->accel->fd, HV_X86_RDI); - RRX(env, R_ESP) =3D rreg(cs->accel->fd, HV_X86_RSP); - RRX(env, R_EBP) =3D rreg(cs->accel->fd, HV_X86_RBP); - for (i =3D 8; i < 16; i++) { - RRX(env, i) =3D rreg(cs->accel->fd, HV_X86_RAX + i); - } - - env->eflags =3D rreg(cs->accel->fd, HV_X86_RFLAGS); - rflags_to_lflags(env); - env->eip =3D rreg(cs->accel->fd, HV_X86_RIP); -} - -void store_regs(CPUState *cs) -{ - X86CPU *cpu =3D X86_CPU(cs); - CPUX86State *env =3D &cpu->env; - - int i =3D 0; - wreg(cs->accel->fd, HV_X86_RAX, RAX(env)); - wreg(cs->accel->fd, HV_X86_RBX, RBX(env)); - wreg(cs->accel->fd, HV_X86_RCX, RCX(env)); - wreg(cs->accel->fd, HV_X86_RDX, RDX(env)); - wreg(cs->accel->fd, HV_X86_RSI, RSI(env)); - wreg(cs->accel->fd, HV_X86_RDI, RDI(env)); - wreg(cs->accel->fd, HV_X86_RBP, RBP(env)); - wreg(cs->accel->fd, HV_X86_RSP, RSP(env)); - for (i =3D 8; i < 16; i++) { - wreg(cs->accel->fd, HV_X86_RAX + i, RRX(env, i)); - } - - lflags_to_rflags(env); - wreg(cs->accel->fd, HV_X86_RFLAGS, env->eflags); - macvm_set_rip(cs, env->eip); -} - bool exec_instruction(CPUX86State *env, struct x86_decode *ins) { /*if (hvf_vcpu_id(cs)) diff --git a/target/i386/hvf/x86_emu.h b/target/i386/hvf/x86_emu.h index 8f4f8f1eca..ebad7df1cc 100644 --- a/target/i386/hvf/x86_emu.h +++ b/target/i386/hvf/x86_emu.h @@ -34,9 +34,6 @@ extern const struct x86_emul_ops *emul_ops; void init_emu(const struct x86_emul_ops *ops); bool exec_instruction(CPUX86State *env, struct x86_decode *ins); =20 -void load_regs(CPUState *cpu); -void store_regs(CPUState *cpu); - void simulate_rdmsr(CPUX86State *env); void simulate_wrmsr(CPUX86State *env); =20 diff --git a/target/i386/hvf/x86_task.c b/target/i386/hvf/x86_task.c index 287fe11cf7..161217991f 100644 --- a/target/i386/hvf/x86_task.c +++ b/target/i386/hvf/x86_task.c @@ -119,7 +119,7 @@ void vmx_handle_task_switch(CPUState *cpu, x86_segment_= selector tss_sel, int rea return; } =20 - load_regs(cpu); + hvf_load_regs(cpu); =20 struct x86_segment_descriptor curr_tss_desc, next_tss_desc; x86_segment_selector old_tss_sel =3D vmx_read_segment_selector(cpu, R_= TR); @@ -178,7 +178,7 @@ void vmx_handle_task_switch(CPUState *cpu, x86_segment_= selector tss_sel, int rea x86_segment_descriptor_to_vmx(cpu, tss_sel, &next_tss_desc, &vmx_seg); vmx_write_segment_descriptor(cpu, &vmx_seg, R_TR); =20 - store_regs(cpu); + hvf_store_regs(cpu); =20 hv_vcpu_invalidate_tlb(cpu->accel->fd); } diff --git a/target/i386/hvf/x86hvf.h b/target/i386/hvf/x86hvf.h index 423a89b6ad..8c46ce8ad0 100644 --- a/target/i386/hvf/x86hvf.h +++ b/target/i386/hvf/x86hvf.h @@ -31,4 +31,7 @@ void hvf_get_xsave(CPUState *cs); void hvf_get_msrs(CPUState *cs); void vmx_clear_int_window_exiting(CPUState *cs); void vmx_update_tpr(CPUState *cs); + +void hvf_load_regs(CPUState *cpu); +void hvf_store_regs(CPUState *cpu); #endif --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1740146691; cv=none; d=zohomail.com; s=zohoarc; b=RmidLDJ2tU8xYU99qh7PqRgEIuPUE02V34gNkR8bqqRZGwl0qCNfiuCTi7RyzE9gXJMz9Rlj0SluuVqP4lcf6VpDk6NGpyGYzjBtIRds6OVhK6KxLzjWeZ+Th06u1QoAjmBqHolbFhI2RHQlcxHhE+k1Gtxcwl7yhbIqs/RPJlI= ARC-Message-Signature: i=1; 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Fri, 21 Feb 2025 09:02:20 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tlOWs-0006Ua-4k for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:37:02 -0500 Received: from linux.microsoft.com ([13.77.154.182]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlOWq-00016A-Ac for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:37:01 -0500 Received: by linux.microsoft.com (Postfix, from userid 1031) id 96136204E5BA; Fri, 21 Feb 2025 00:36:29 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 96136204E5BA DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1740126989; bh=4OTisBWuz1UgEAvCNbgnJ08H5eFQehRhh77a45l1J2U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VSrSjrmZgFbvm6G9gRGkvx58OylJxUJe53S1t0/CmTpbC8KqPMX49jQbb00DTDQ2u Qt/KeRO0FKGs44wyK39S5q5+fM2F37s3/iIqqbByhfNdCvpBl+gZEXb505Oeg92i99 zs16F0VfkZotEnLvDoDJrs65uYqmaupq5uW+wqss= From: Wei Liu To: qemu-devel@nongnu.org Cc: wei.liu@kernel.org, dirty@apple.com, rbolshakov@ddn.com, phil@philjordan.eu, jinankjain@linux.microsoft.com, liuwe@microsoft.com, muislam@microsoft.com, ziqiaozhou@microsoft.com, mukeshrathor@microsoft.com, magnuskulke@microsoft.com, prapal@microsoft.com, jpiotrowski@microsoft.com, deviv@microsoft.com, Wei Liu Subject: [RFC PATCH v1 07/19] target/i386/hvf: provide and use handle_io in emul_ops Date: Fri, 21 Feb 2025 00:36:15 -0800 Message-Id: <1740126987-8483-8-git-send-email-liuwe@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> References: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" This drops the calls to hvf_handle_io from x86_emu.c. Signed-off-by: Wei Liu --- target/i386/hvf/hvf.c | 1 + target/i386/hvf/x86_emu.c | 30 +++++++++++++++--------------- target/i386/hvf/x86_emu.h | 2 ++ 3 files changed, 18 insertions(+), 15 deletions(-) diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 3c306101f9..64e4154cdf 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -245,6 +245,7 @@ static void hvf_read_mem(CPUState *cpu, void *data, tar= get_ulong gva, int bytes) static const struct x86_emul_ops hvf_x86_emul_ops =3D { .read_mem =3D hvf_read_mem, .read_segment_descriptor =3D hvf_read_segment_descriptor, + .handle_io =3D hvf_handle_io, }; =20 int hvf_arch_init_vcpu(CPUState *cpu) diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index 2fb54e1f1e..25912e82ca 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -44,7 +44,6 @@ #include "x86_flags.h" #include "vmcs.h" #include "vmx.h" -#include "hvf-i386.h" =20 #define EXEC_2OP_FLAGS_CMD(env, decode, cmd, FLAGS_FUNC, save_res) \ { \ @@ -396,18 +395,18 @@ static void exec_out(CPUX86State *env, struct x86_dec= ode *decode) { switch (decode->opcode[0]) { case 0xe6: - hvf_handle_io(env_cpu(env), decode->op[0].val, &AL(env), 1, 1, 1); + emul_ops->handle_io(env_cpu(env), decode->op[0].val, &AL(env), 1, = 1, 1); break; case 0xe7: - hvf_handle_io(env_cpu(env), decode->op[0].val, &RAX(env), 1, - decode->operand_size, 1); + emul_ops->handle_io(env_cpu(env), decode->op[0].val, &RAX(env), 1, + decode->operand_size, 1); break; case 0xee: - hvf_handle_io(env_cpu(env), DX(env), &AL(env), 1, 1, 1); + emul_ops->handle_io(env_cpu(env), DX(env), &AL(env), 1, 1, 1); break; case 0xef: - hvf_handle_io(env_cpu(env), DX(env), &RAX(env), 1, - decode->operand_size, 1); + emul_ops->handle_io(env_cpu(env), DX(env), &RAX(env), 1, + decode->operand_size, 1); break; default: VM_PANIC("Bad out opcode\n"); @@ -421,10 +420,10 @@ static void exec_in(CPUX86State *env, struct x86_deco= de *decode) target_ulong val =3D 0; switch (decode->opcode[0]) { case 0xe4: - hvf_handle_io(env_cpu(env), decode->op[0].val, &AL(env), 0, 1, 1); + emul_ops->handle_io(env_cpu(env), decode->op[0].val, &AL(env), 0, = 1, 1); break; case 0xe5: - hvf_handle_io(env_cpu(env), decode->op[0].val, &val, 0, + emul_ops->handle_io(env_cpu(env), decode->op[0].val, &val, 0, decode->operand_size, 1); if (decode->operand_size =3D=3D 2) { AX(env) =3D val; @@ -433,10 +432,11 @@ static void exec_in(CPUX86State *env, struct x86_deco= de *decode) } break; case 0xec: - hvf_handle_io(env_cpu(env), DX(env), &AL(env), 0, 1, 1); + emul_ops->handle_io(env_cpu(env), DX(env), &AL(env), 0, 1, 1); break; case 0xed: - hvf_handle_io(env_cpu(env), DX(env), &val, 0, decode->operand_size= , 1); + emul_ops->handle_io(env_cpu(env), DX(env), &val, 0, + decode->operand_size, 1); if (decode->operand_size =3D=3D 2) { AX(env) =3D val; } else { @@ -486,8 +486,8 @@ static void exec_ins_single(CPUX86State *env, struct x8= 6_decode *decode) target_ulong addr =3D linear_addr_size(env_cpu(env), RDI(env), decode->addressing_size, R_ES); =20 - hvf_handle_io(env_cpu(env), DX(env), env->hvf_mmio_buf, 0, - decode->operand_size, 1); + emul_ops->handle_io(env_cpu(env), DX(env), env->hvf_mmio_buf, 0, + decode->operand_size, 1); vmx_write_mem(env_cpu(env), addr, env->hvf_mmio_buf, decode->operand_size); =20 @@ -511,8 +511,8 @@ static void exec_outs_single(CPUX86State *env, struct x= 86_decode *decode) =20 vmx_read_mem(env_cpu(env), env->hvf_mmio_buf, addr, decode->operand_size); - hvf_handle_io(env_cpu(env), DX(env), env->hvf_mmio_buf, 1, - decode->operand_size, 1); + emul_ops->handle_io(env_cpu(env), DX(env), env->hvf_mmio_buf, 1, + decode->operand_size, 1); =20 string_increment_reg(env, R_ESI, decode); } diff --git a/target/i386/hvf/x86_emu.h b/target/i386/hvf/x86_emu.h index ebad7df1cc..3bca541bae 100644 --- a/target/i386/hvf/x86_emu.h +++ b/target/i386/hvf/x86_emu.h @@ -27,6 +27,8 @@ struct x86_emul_ops { void (*read_mem)(CPUState *cpu, void *data, target_ulong addr, int byt= es); void (*read_segment_descriptor)(CPUState *cpu, struct x86_segment_desc= riptor *desc, enum X86Seg seg); + void (*handle_io)(CPUState *cpu, uint16_t port, void *data, int direct= ion, + int size, int count); }; =20 extern const struct x86_emul_ops *emul_ops; --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1740126989; bh=0JG/k2FedV3leSTYvugMKLbdpsUtL8gN3PYO9+FffHw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JWyJh10qkgA5ntWxsAZ1i9rMlmtoReT+RNQAoPkuVZvTxA6NoQA4xQBzgVHeBHzTr 4YWRjlYv5/5YlJ4xPGHHuNK+/VjXNPC8QDLHcWD2DaeqHWCilqXisp8Ei3yFUyqFiJ Y+oIecH0QvRP1V92g+eTVedrlvOFIhDwIE60cKZM= From: Wei Liu To: qemu-devel@nongnu.org Cc: wei.liu@kernel.org, dirty@apple.com, rbolshakov@ddn.com, phil@philjordan.eu, jinankjain@linux.microsoft.com, liuwe@microsoft.com, muislam@microsoft.com, ziqiaozhou@microsoft.com, mukeshrathor@microsoft.com, magnuskulke@microsoft.com, prapal@microsoft.com, jpiotrowski@microsoft.com, deviv@microsoft.com, Wei Liu Subject: [RFC PATCH v1 08/19] target/i386: rename hvf_mmio_buf to mmio_buf Date: Fri, 21 Feb 2025 00:36:16 -0800 Message-Id: <1740126987-8483-9-git-send-email-liuwe@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> References: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" We want to refactor HVF's instruction emulator to a common component. Renam= ing hvf_mmio_buf removes the association between HVF and the instruction emulat= or. The definition of the field is still guarded by CONFIG_HVF for now, since i= t is the only user. No functional change. Signed-off-by: Wei Liu --- target/i386/cpu.h | 2 +- target/i386/hvf/hvf.c | 4 ++-- target/i386/hvf/x86_emu.c | 12 ++++++------ 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index c67b42d34f..bfdb1f87a3 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2070,7 +2070,7 @@ typedef struct CPUArchState { #endif #if defined(CONFIG_HVF) HVFX86LazyFlags hvf_lflags; - void *hvf_mmio_buf; + void *mmio_buf; #endif =20 uint64_t mcg_cap; diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 64e4154cdf..533b05577d 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -168,7 +168,7 @@ void hvf_arch_vcpu_destroy(CPUState *cpu) X86CPU *x86_cpu =3D X86_CPU(cpu); CPUX86State *env =3D &x86_cpu->env; =20 - g_free(env->hvf_mmio_buf); + g_free(env->mmio_buf); } =20 static void init_tsc_freq(CPUX86State *env) @@ -262,7 +262,7 @@ int hvf_arch_init_vcpu(CPUState *cpu) if (hvf_state->hvf_caps =3D=3D NULL) { hvf_state->hvf_caps =3D g_new0(struct hvf_vcpu_caps, 1); } - env->hvf_mmio_buf =3D g_new(char, 4096); + env->mmio_buf =3D g_new(char, 4096); =20 if (x86cpu->vmware_cpuid_freq) { init_tsc_freq(env); diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index 25912e82ca..d0a8e221ea 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -183,8 +183,8 @@ void write_val_ext(CPUX86State *env, target_ulong ptr, = target_ulong val, int siz =20 uint8_t *read_mmio(CPUX86State *env, target_ulong ptr, int bytes) { - vmx_read_mem(env_cpu(env), env->hvf_mmio_buf, ptr, bytes); - return env->hvf_mmio_buf; + vmx_read_mem(env_cpu(env), env->mmio_buf, ptr, bytes); + return env->mmio_buf; } =20 =20 @@ -486,9 +486,9 @@ static void exec_ins_single(CPUX86State *env, struct x8= 6_decode *decode) target_ulong addr =3D linear_addr_size(env_cpu(env), RDI(env), decode->addressing_size, R_ES); =20 - emul_ops->handle_io(env_cpu(env), DX(env), env->hvf_mmio_buf, 0, + emul_ops->handle_io(env_cpu(env), DX(env), env->mmio_buf, 0, decode->operand_size, 1); - vmx_write_mem(env_cpu(env), addr, env->hvf_mmio_buf, + vmx_write_mem(env_cpu(env), addr, env->mmio_buf, decode->operand_size); =20 string_increment_reg(env, R_EDI, decode); @@ -509,9 +509,9 @@ static void exec_outs_single(CPUX86State *env, struct x= 86_decode *decode) { target_ulong addr =3D decode_linear_addr(env, decode, RSI(env), R_DS); =20 - vmx_read_mem(env_cpu(env), env->hvf_mmio_buf, addr, + vmx_read_mem(env_cpu(env), env->mmio_buf, addr, decode->operand_size); - emul_ops->handle_io(env_cpu(env), DX(env), env->hvf_mmio_buf, 1, + emul_ops->handle_io(env_cpu(env), DX(env), env->mmio_buf, 1, decode->operand_size, 1); =20 string_increment_reg(env, R_ESI, decode); --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; 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Fri, 21 Feb 2025 06:03:21 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlTbb-0000Zh-VO; Fri, 21 Feb 2025 09:02:16 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tlOWl-0006SU-TW for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:36:57 -0500 Received: from linux.microsoft.com ([13.77.154.182]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlOWg-000166-66 for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:36:55 -0500 Received: by linux.microsoft.com (Postfix, from userid 1031) id B0120204E5BC; Fri, 21 Feb 2025 00:36:29 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com B0120204E5BC DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1740126989; bh=24jpQ3ywdwX2kk6QPe3nYALV/cxBiKoSuAeM+PYw2BQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=of6fa+gHTxrppVmYplSNhm34no/CdFhgX92j3CkVccwrfWLVm4X30tXfR4Cm6CAbu AXX7kMbNP2FY9WMn76/F5sP5d8Y1T3VfpWByCHmMEAOAydwflEGySCnd/bL/w7vDIM F7tDklfIN2cKmU1teXZLUTzaa/rH6mazwKlX1ycg= From: Wei Liu To: qemu-devel@nongnu.org Cc: wei.liu@kernel.org, dirty@apple.com, rbolshakov@ddn.com, phil@philjordan.eu, jinankjain@linux.microsoft.com, liuwe@microsoft.com, muislam@microsoft.com, ziqiaozhou@microsoft.com, mukeshrathor@microsoft.com, magnuskulke@microsoft.com, prapal@microsoft.com, jpiotrowski@microsoft.com, deviv@microsoft.com, Wei Liu Subject: [RFC PATCH v1 09/19] target/i386/hvf: use emul_ops->read_mem in x86_emu.c Date: Fri, 21 Feb 2025 00:36:17 -0800 Message-Id: <1740126987-8483-10-git-send-email-liuwe@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> References: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" No functional change. Signed-off-by: Wei Liu --- target/i386/hvf/x86_emu.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index d0a8e221ea..f1244640e6 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -183,7 +183,7 @@ void write_val_ext(CPUX86State *env, target_ulong ptr, = target_ulong val, int siz =20 uint8_t *read_mmio(CPUX86State *env, target_ulong ptr, int bytes) { - vmx_read_mem(env_cpu(env), env->mmio_buf, ptr, bytes); + emul_ops->read_mem(env_cpu(env), env->mmio_buf, ptr, bytes); return env->mmio_buf; } =20 @@ -509,8 +509,8 @@ static void exec_outs_single(CPUX86State *env, struct x= 86_decode *decode) { target_ulong addr =3D decode_linear_addr(env, decode, RSI(env), R_DS); =20 - vmx_read_mem(env_cpu(env), env->mmio_buf, addr, - decode->operand_size); + emul_ops->read_mem(env_cpu(env), env->mmio_buf, addr, + decode->operand_size); emul_ops->handle_io(env_cpu(env), DX(env), env->mmio_buf, 1, decode->operand_size, 1); =20 @@ -619,7 +619,7 @@ static void exec_scas_single(CPUX86State *env, struct x= 86_decode *decode) addr =3D linear_addr_size(env_cpu(env), RDI(env), decode->addressing_size, R_ES); decode->op[1].type =3D X86_VAR_IMMEDIATE; - vmx_read_mem(env_cpu(env), &decode->op[1].val, addr, decode->operand_s= ize); + emul_ops->read_mem(env_cpu(env), &decode->op[1].val, addr, decode->ope= rand_size); =20 EXEC_2OP_FLAGS_CMD(env, decode, -, SET_FLAGS_OSZAPC_SUB, false); string_increment_reg(env, R_EDI, decode); @@ -644,7 +644,7 @@ static void exec_lods_single(CPUX86State *env, struct x= 86_decode *decode) target_ulong val =3D 0; =20 addr =3D decode_linear_addr(env, decode, RSI(env), R_DS); - vmx_read_mem(env_cpu(env), &val, addr, decode->operand_size); + emul_ops->read_mem(env_cpu(env), &val, addr, decode->operand_size); write_reg(env, R_EAX, val, decode->operand_size); =20 string_increment_reg(env, R_ESI, decode); --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Fri, 21 Feb 2025 00:36:29 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com BD416204E5BD DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1740126989; bh=WQmAzQIs09wjuC0d/dITbHT8nhrCnS/qgIZyixe90jk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eoUxXFd3mHI7SMFwQz5QZPIlZHOmj9mHHrjeowP8tvD0W1uuRt365H1whR9VVMoe2 NUIypw1n6CMdQjbj+LHJLg02MT+G0GiWvLqKJk/roMVN8cFBbtt+QrXIlE054jBngV p1kr9Zx7AItbTrz9EB8zO9VgOgaykAGTdImHYtwQ= From: Wei Liu To: qemu-devel@nongnu.org Cc: wei.liu@kernel.org, dirty@apple.com, rbolshakov@ddn.com, phil@philjordan.eu, jinankjain@linux.microsoft.com, liuwe@microsoft.com, muislam@microsoft.com, ziqiaozhou@microsoft.com, mukeshrathor@microsoft.com, magnuskulke@microsoft.com, prapal@microsoft.com, jpiotrowski@microsoft.com, deviv@microsoft.com, Wei Liu Subject: [RFC PATCH v1 10/19] taret/i386/hvf: provide and use write_mem in emul_ops Date: Fri, 21 Feb 2025 00:36:18 -0800 Message-Id: <1740126987-8483-11-git-send-email-liuwe@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> References: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Signed-off-by: Wei Liu --- target/i386/hvf/hvf.c | 6 ++++++ target/i386/hvf/x86_emu.c | 8 ++++---- target/i386/hvf/x86_emu.h | 1 + 3 files changed, 11 insertions(+), 4 deletions(-) diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 533b05577d..e108e2bbe6 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -242,8 +242,14 @@ static void hvf_read_mem(CPUState *cpu, void *data, ta= rget_ulong gva, int bytes) vmx_read_mem(cpu, data, gva, bytes); } =20 +static void hvf_write_mem(CPUState *cpu, void *data, target_ulong gva, int= bytes) +{ + vmx_write_mem(cpu, gva, data, bytes); +} + static const struct x86_emul_ops hvf_x86_emul_ops =3D { .read_mem =3D hvf_read_mem, + .write_mem =3D hvf_write_mem, .read_segment_descriptor =3D hvf_read_segment_descriptor, .handle_io =3D hvf_handle_io, }; diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index f1244640e6..ef4b77b10e 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -178,7 +178,7 @@ void write_val_ext(CPUX86State *env, target_ulong ptr, = target_ulong val, int siz write_val_to_reg(ptr, val, size); return; } - vmx_write_mem(env_cpu(env), ptr, &val, size); + emul_ops->write_mem(env_cpu(env), &val, ptr, size); } =20 uint8_t *read_mmio(CPUX86State *env, target_ulong ptr, int bytes) @@ -488,8 +488,8 @@ static void exec_ins_single(CPUX86State *env, struct x8= 6_decode *decode) =20 emul_ops->handle_io(env_cpu(env), DX(env), env->mmio_buf, 0, decode->operand_size, 1); - vmx_write_mem(env_cpu(env), addr, env->mmio_buf, - decode->operand_size); + emul_ops->write_mem(env_cpu(env), env->mmio_buf, addr, + decode->operand_size); =20 string_increment_reg(env, R_EDI, decode); } @@ -595,7 +595,7 @@ static void exec_stos_single(CPUX86State *env, struct x= 86_decode *decode) addr =3D linear_addr_size(env_cpu(env), RDI(env), decode->addressing_size, R_ES); val =3D read_reg(env, R_EAX, decode->operand_size); - vmx_write_mem(env_cpu(env), addr, &val, decode->operand_size); + emul_ops->write_mem(env_cpu(env), &val, addr, decode->operand_size); =20 string_increment_reg(env, R_EDI, decode); } diff --git a/target/i386/hvf/x86_emu.h b/target/i386/hvf/x86_emu.h index 3bca541bae..a1d1dc7d74 100644 --- a/target/i386/hvf/x86_emu.h +++ b/target/i386/hvf/x86_emu.h @@ -25,6 +25,7 @@ =20 struct x86_emul_ops { void (*read_mem)(CPUState *cpu, void *data, target_ulong addr, int byt= es); + void (*write_mem)(CPUState *cpu, void *data, target_ulong addr, int by= tes); void (*read_segment_descriptor)(CPUState *cpu, struct x86_segment_desc= riptor *desc, enum X86Seg seg); void (*handle_io)(CPUState *cpu, uint16_t port, void *data, int direct= ion, --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1740146572792810.4448773435445; Fri, 21 Feb 2025 06:02:52 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlTbY-0000KF-4m; Fri, 21 Feb 2025 09:02:12 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tlOWl-0006ST-Gm for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:36:56 -0500 Received: from linux.microsoft.com ([13.77.154.182]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlOWg-00016C-9i for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:36:54 -0500 Received: by linux.microsoft.com (Postfix, from userid 1031) id CA20D204E5BE; Fri, 21 Feb 2025 00:36:29 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com CA20D204E5BE DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1740126989; bh=TE9ju8Gk3DR1YdZvKVR7DhBrIHHXhv15wRt1POD51PI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=maJ6C1WDo65MrXqUB1mhpmYHraRrvD5k9JAcRsm1/YOKNng7gybp7cBUsbzCCrb8s PJ86ELr9GGqAPd07MBBdwpqusiry+xo8xkyc45Q5p/BZsmYsJ8Ch1tXXqQQ7DYHaUX fJIgKpAK/OVsI7nfuA2RdEBc0d2SFVEgmWfmWYEE= From: Wei Liu To: qemu-devel@nongnu.org Cc: wei.liu@kernel.org, dirty@apple.com, rbolshakov@ddn.com, phil@philjordan.eu, jinankjain@linux.microsoft.com, liuwe@microsoft.com, muislam@microsoft.com, ziqiaozhou@microsoft.com, mukeshrathor@microsoft.com, magnuskulke@microsoft.com, prapal@microsoft.com, jpiotrowski@microsoft.com, deviv@microsoft.com, Wei Liu Subject: [RFC PATCH v1 11/19] target/i386/hvf: move and rename simulate_{rdmsr, wrmsr} Date: Fri, 21 Feb 2025 00:36:19 -0800 Message-Id: <1740126987-8483-12-git-send-email-liuwe@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> References: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" This requires making raise_exception non-static. That function needs to be renamed to avoid clashing with a function in TCG. Mostly code movement. No functional change. Signed-off-by: Wei Liu --- target/i386/hvf/hvf-i386.h | 2 + target/i386/hvf/hvf.c | 216 +++++++++++++++++++++++++++++++++++- target/i386/hvf/x86_emu.c | 220 +------------------------------------ target/i386/hvf/x86_emu.h | 4 +- 4 files changed, 221 insertions(+), 221 deletions(-) diff --git a/target/i386/hvf/hvf-i386.h b/target/i386/hvf/hvf-i386.h index 046b681d13..044ad236ae 100644 --- a/target/i386/hvf/hvf-i386.h +++ b/target/i386/hvf/hvf-i386.h @@ -19,6 +19,8 @@ uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx, int reg); =20 void hvf_handle_io(CPUState *, uint16_t, void *, int, int, int); +void hvf_simulate_rdmsr(CPUX86State *env); +void hvf_simulate_wrmsr(CPUX86State *env); =20 /* Host specific functions */ int hvf_inject_interrupt(CPUArchState *env, int vector); diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index e108e2bbe6..88f5487b45 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -506,6 +506,218 @@ void hvf_store_regs(CPUState *cs) macvm_set_rip(cs, env->eip); } =20 +void hvf_simulate_rdmsr(CPUX86State *env) +{ + X86CPU *cpu =3D env_archcpu(env); + CPUState *cs =3D env_cpu(env); + uint32_t msr =3D ECX(env); + uint64_t val =3D 0; + + switch (msr) { + case MSR_IA32_TSC: + val =3D rdtscp() + rvmcs(cs->accel->fd, VMCS_TSC_OFFSET); + break; + case MSR_IA32_APICBASE: + val =3D cpu_get_apic_base(cpu->apic_state); + break; + case MSR_APIC_START ... MSR_APIC_END: { + int ret; + int index =3D (uint32_t)env->regs[R_ECX] - MSR_APIC_START; + + ret =3D apic_msr_read(index, &val); + if (ret < 0) { + x86_emul_raise_exception(env, EXCP0D_GPF, 0); + } + + break; + } + case MSR_IA32_UCODE_REV: + val =3D cpu->ucode_rev; + break; + case MSR_EFER: + val =3D rvmcs(cs->accel->fd, VMCS_GUEST_IA32_EFER); + break; + case MSR_FSBASE: + val =3D rvmcs(cs->accel->fd, VMCS_GUEST_FS_BASE); + break; + case MSR_GSBASE: + val =3D rvmcs(cs->accel->fd, VMCS_GUEST_GS_BASE); + break; + case MSR_KERNELGSBASE: + val =3D rvmcs(cs->accel->fd, VMCS_HOST_FS_BASE); + break; + case MSR_STAR: + abort(); + break; + case MSR_LSTAR: + abort(); + break; + case MSR_CSTAR: + abort(); + break; + case MSR_IA32_MISC_ENABLE: + val =3D env->msr_ia32_misc_enable; + break; + case MSR_MTRRphysBase(0): + case MSR_MTRRphysBase(1): + case MSR_MTRRphysBase(2): + case MSR_MTRRphysBase(3): + case MSR_MTRRphysBase(4): + case MSR_MTRRphysBase(5): + case MSR_MTRRphysBase(6): + case MSR_MTRRphysBase(7): + val =3D env->mtrr_var[(ECX(env) - MSR_MTRRphysBase(0)) / 2].base; + break; + case MSR_MTRRphysMask(0): + case MSR_MTRRphysMask(1): + case MSR_MTRRphysMask(2): + case MSR_MTRRphysMask(3): + case MSR_MTRRphysMask(4): + case MSR_MTRRphysMask(5): + case MSR_MTRRphysMask(6): + case MSR_MTRRphysMask(7): + val =3D env->mtrr_var[(ECX(env) - MSR_MTRRphysMask(0)) / 2].mask; + break; + case MSR_MTRRfix64K_00000: + val =3D env->mtrr_fixed[0]; + break; + case MSR_MTRRfix16K_80000: + case MSR_MTRRfix16K_A0000: + val =3D env->mtrr_fixed[ECX(env) - MSR_MTRRfix16K_80000 + 1]; + break; + case MSR_MTRRfix4K_C0000: + case MSR_MTRRfix4K_C8000: + case MSR_MTRRfix4K_D0000: + case MSR_MTRRfix4K_D8000: + case MSR_MTRRfix4K_E0000: + case MSR_MTRRfix4K_E8000: + case MSR_MTRRfix4K_F0000: + case MSR_MTRRfix4K_F8000: + val =3D env->mtrr_fixed[ECX(env) - MSR_MTRRfix4K_C0000 + 3]; + break; + case MSR_MTRRdefType: + val =3D env->mtrr_deftype; + break; + case MSR_CORE_THREAD_COUNT: + val =3D cpu_x86_get_msr_core_thread_count(cpu); + break; + default: + /* fprintf(stderr, "%s: unknown msr 0x%x\n", __func__, msr); */ + val =3D 0; + break; + } + + RAX(env) =3D (uint32_t)val; + RDX(env) =3D (uint32_t)(val >> 32); +} + +void hvf_simulate_wrmsr(CPUX86State *env) +{ + X86CPU *cpu =3D env_archcpu(env); + CPUState *cs =3D env_cpu(env); + uint32_t msr =3D ECX(env); + uint64_t data =3D ((uint64_t)EDX(env) << 32) | EAX(env); + + switch (msr) { + case MSR_IA32_TSC: + break; + case MSR_IA32_APICBASE: { + int r; + + r =3D cpu_set_apic_base(cpu->apic_state, data); + if (r < 0) { + x86_emul_raise_exception(env, EXCP0D_GPF, 0); + } + + break; + } + case MSR_APIC_START ... MSR_APIC_END: { + int ret; + int index =3D (uint32_t)env->regs[R_ECX] - MSR_APIC_START; + + ret =3D apic_msr_write(index, data); + if (ret < 0) { + x86_emul_raise_exception(env, EXCP0D_GPF, 0); + } + + break; + } + case MSR_FSBASE: + wvmcs(cs->accel->fd, VMCS_GUEST_FS_BASE, data); + break; + case MSR_GSBASE: + wvmcs(cs->accel->fd, VMCS_GUEST_GS_BASE, data); + break; + case MSR_KERNELGSBASE: + wvmcs(cs->accel->fd, VMCS_HOST_FS_BASE, data); + break; + case MSR_STAR: + abort(); + break; + case MSR_LSTAR: + abort(); + break; + case MSR_CSTAR: + abort(); + break; + case MSR_EFER: + /*printf("new efer %llx\n", EFER(cs));*/ + wvmcs(cs->accel->fd, VMCS_GUEST_IA32_EFER, data); + if (data & MSR_EFER_NXE) { + hv_vcpu_invalidate_tlb(cs->accel->fd); + } + break; + case MSR_MTRRphysBase(0): + case MSR_MTRRphysBase(1): + case MSR_MTRRphysBase(2): + case MSR_MTRRphysBase(3): + case MSR_MTRRphysBase(4): + case MSR_MTRRphysBase(5): + case MSR_MTRRphysBase(6): + case MSR_MTRRphysBase(7): + env->mtrr_var[(ECX(env) - MSR_MTRRphysBase(0)) / 2].base =3D data; + break; + case MSR_MTRRphysMask(0): + case MSR_MTRRphysMask(1): + case MSR_MTRRphysMask(2): + case MSR_MTRRphysMask(3): + case MSR_MTRRphysMask(4): + case MSR_MTRRphysMask(5): + case MSR_MTRRphysMask(6): + case MSR_MTRRphysMask(7): + env->mtrr_var[(ECX(env) - MSR_MTRRphysMask(0)) / 2].mask =3D data; + break; + case MSR_MTRRfix64K_00000: + env->mtrr_fixed[ECX(env) - MSR_MTRRfix64K_00000] =3D data; + break; + case MSR_MTRRfix16K_80000: + case MSR_MTRRfix16K_A0000: + env->mtrr_fixed[ECX(env) - MSR_MTRRfix16K_80000 + 1] =3D data; + break; + case MSR_MTRRfix4K_C0000: + case MSR_MTRRfix4K_C8000: + case MSR_MTRRfix4K_D0000: + case MSR_MTRRfix4K_D8000: + case MSR_MTRRfix4K_E0000: + case MSR_MTRRfix4K_E8000: + case MSR_MTRRfix4K_F0000: + case MSR_MTRRfix4K_F8000: + env->mtrr_fixed[ECX(env) - MSR_MTRRfix4K_C0000 + 3] =3D data; + break; + case MSR_MTRRdefType: + env->mtrr_deftype =3D data; + break; + default: + break; + } + + /* Related to support known hypervisor interface */ + /* if (g_hypervisor_iface) + g_hypervisor_iface->wrmsr_handler(cs, msr, data); + + printf("write msr %llx\n", RCX(cs));*/ +} + int hvf_vcpu_exec(CPUState *cpu) { X86CPU *x86_cpu =3D X86_CPU(cpu); @@ -688,9 +900,9 @@ int hvf_vcpu_exec(CPUState *cpu) { hvf_load_regs(cpu); if (exit_reason =3D=3D EXIT_REASON_RDMSR) { - simulate_rdmsr(env); + hvf_simulate_rdmsr(env); } else { - simulate_wrmsr(env); + hvf_simulate_wrmsr(env); } env->eip +=3D ins_len; hvf_store_regs(cpu); diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index ef4b77b10e..b6e63daea4 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -44,6 +44,7 @@ #include "x86_flags.h" #include "vmcs.h" #include "vmx.h" +#include "hvf-i386.h" =20 #define EXEC_2OP_FLAGS_CMD(env, decode, cmd, FLAGS_FUNC, save_res) \ { \ @@ -661,8 +662,7 @@ static void exec_lods(CPUX86State *env, struct x86_deco= de *decode) env->eip +=3D decode->len; } =20 -static void raise_exception(CPUX86State *env, int exception_index, - int error_code) +void x86_emul_raise_exception(CPUX86State *env, int exception_index, int e= rror_code) { env->exception_nr =3D exception_index; env->error_code =3D error_code; @@ -670,227 +670,15 @@ static void raise_exception(CPUX86State *env, int ex= ception_index, env->exception_injected =3D 1; } =20 -void simulate_rdmsr(CPUX86State *env) -{ - X86CPU *cpu =3D env_archcpu(env); - CPUState *cs =3D env_cpu(env); - uint32_t msr =3D ECX(env); - uint64_t val =3D 0; - - switch (msr) { - case MSR_IA32_TSC: - val =3D rdtscp() + rvmcs(cs->accel->fd, VMCS_TSC_OFFSET); - break; - case MSR_IA32_APICBASE: - val =3D cpu_get_apic_base(cpu->apic_state); - break; - case MSR_APIC_START ... MSR_APIC_END: { - int ret; - int index =3D (uint32_t)env->regs[R_ECX] - MSR_APIC_START; - - ret =3D apic_msr_read(index, &val); - if (ret < 0) { - raise_exception(env, EXCP0D_GPF, 0); - } - - break; - } - case MSR_IA32_UCODE_REV: - val =3D cpu->ucode_rev; - break; - case MSR_EFER: - val =3D rvmcs(cs->accel->fd, VMCS_GUEST_IA32_EFER); - break; - case MSR_FSBASE: - val =3D rvmcs(cs->accel->fd, VMCS_GUEST_FS_BASE); - break; - case MSR_GSBASE: - val =3D rvmcs(cs->accel->fd, VMCS_GUEST_GS_BASE); - break; - case MSR_KERNELGSBASE: - val =3D rvmcs(cs->accel->fd, VMCS_HOST_FS_BASE); - break; - case MSR_STAR: - abort(); - break; - case MSR_LSTAR: - abort(); - break; - case MSR_CSTAR: - abort(); - break; - case MSR_IA32_MISC_ENABLE: - val =3D env->msr_ia32_misc_enable; - break; - case MSR_MTRRphysBase(0): - case MSR_MTRRphysBase(1): - case MSR_MTRRphysBase(2): - case MSR_MTRRphysBase(3): - case MSR_MTRRphysBase(4): - case MSR_MTRRphysBase(5): - case MSR_MTRRphysBase(6): - case MSR_MTRRphysBase(7): - val =3D env->mtrr_var[(ECX(env) - MSR_MTRRphysBase(0)) / 2].base; - break; - case MSR_MTRRphysMask(0): - case MSR_MTRRphysMask(1): - case MSR_MTRRphysMask(2): - case MSR_MTRRphysMask(3): - case MSR_MTRRphysMask(4): - case MSR_MTRRphysMask(5): - case MSR_MTRRphysMask(6): - case MSR_MTRRphysMask(7): - val =3D env->mtrr_var[(ECX(env) - MSR_MTRRphysMask(0)) / 2].mask; - break; - case MSR_MTRRfix64K_00000: - val =3D env->mtrr_fixed[0]; - break; - case MSR_MTRRfix16K_80000: - case MSR_MTRRfix16K_A0000: - val =3D env->mtrr_fixed[ECX(env) - MSR_MTRRfix16K_80000 + 1]; - break; - case MSR_MTRRfix4K_C0000: - case MSR_MTRRfix4K_C8000: - case MSR_MTRRfix4K_D0000: - case MSR_MTRRfix4K_D8000: - case MSR_MTRRfix4K_E0000: - case MSR_MTRRfix4K_E8000: - case MSR_MTRRfix4K_F0000: - case MSR_MTRRfix4K_F8000: - val =3D env->mtrr_fixed[ECX(env) - MSR_MTRRfix4K_C0000 + 3]; - break; - case MSR_MTRRdefType: - val =3D env->mtrr_deftype; - break; - case MSR_CORE_THREAD_COUNT: - val =3D cpu_x86_get_msr_core_thread_count(cpu); - break; - default: - /* fprintf(stderr, "%s: unknown msr 0x%x\n", __func__, msr); */ - val =3D 0; - break; - } - - RAX(env) =3D (uint32_t)val; - RDX(env) =3D (uint32_t)(val >> 32); -} - static void exec_rdmsr(CPUX86State *env, struct x86_decode *decode) { - simulate_rdmsr(env); + hvf_simulate_rdmsr(env); env->eip +=3D decode->len; } =20 -void simulate_wrmsr(CPUX86State *env) -{ - X86CPU *cpu =3D env_archcpu(env); - CPUState *cs =3D env_cpu(env); - uint32_t msr =3D ECX(env); - uint64_t data =3D ((uint64_t)EDX(env) << 32) | EAX(env); - - switch (msr) { - case MSR_IA32_TSC: - break; - case MSR_IA32_APICBASE: { - int r; - - r =3D cpu_set_apic_base(cpu->apic_state, data); - if (r < 0) { - raise_exception(env, EXCP0D_GPF, 0); - } - - break; - } - case MSR_APIC_START ... MSR_APIC_END: { - int ret; - int index =3D (uint32_t)env->regs[R_ECX] - MSR_APIC_START; - - ret =3D apic_msr_write(index, data); - if (ret < 0) { - raise_exception(env, EXCP0D_GPF, 0); - } - - break; - } - case MSR_FSBASE: - wvmcs(cs->accel->fd, VMCS_GUEST_FS_BASE, data); - break; - case MSR_GSBASE: - wvmcs(cs->accel->fd, VMCS_GUEST_GS_BASE, data); - break; - case MSR_KERNELGSBASE: - wvmcs(cs->accel->fd, VMCS_HOST_FS_BASE, data); - break; - case MSR_STAR: - abort(); - break; - case MSR_LSTAR: - abort(); - break; - case MSR_CSTAR: - abort(); - break; - case MSR_EFER: - /*printf("new efer %llx\n", EFER(cs));*/ - wvmcs(cs->accel->fd, VMCS_GUEST_IA32_EFER, data); - if (data & MSR_EFER_NXE) { - hv_vcpu_invalidate_tlb(cs->accel->fd); - } - break; - case MSR_MTRRphysBase(0): - case MSR_MTRRphysBase(1): - case MSR_MTRRphysBase(2): - case MSR_MTRRphysBase(3): - case MSR_MTRRphysBase(4): - case MSR_MTRRphysBase(5): - case MSR_MTRRphysBase(6): - case MSR_MTRRphysBase(7): - env->mtrr_var[(ECX(env) - MSR_MTRRphysBase(0)) / 2].base =3D data; - break; - case MSR_MTRRphysMask(0): - case MSR_MTRRphysMask(1): - case MSR_MTRRphysMask(2): - case MSR_MTRRphysMask(3): - case MSR_MTRRphysMask(4): - case MSR_MTRRphysMask(5): - case MSR_MTRRphysMask(6): - case MSR_MTRRphysMask(7): - env->mtrr_var[(ECX(env) - MSR_MTRRphysMask(0)) / 2].mask =3D data; - break; - case MSR_MTRRfix64K_00000: - env->mtrr_fixed[ECX(env) - MSR_MTRRfix64K_00000] =3D data; - break; - case MSR_MTRRfix16K_80000: - case MSR_MTRRfix16K_A0000: - env->mtrr_fixed[ECX(env) - MSR_MTRRfix16K_80000 + 1] =3D data; - break; - case MSR_MTRRfix4K_C0000: - case MSR_MTRRfix4K_C8000: - case MSR_MTRRfix4K_D0000: - case MSR_MTRRfix4K_D8000: - case MSR_MTRRfix4K_E0000: - case MSR_MTRRfix4K_E8000: - case MSR_MTRRfix4K_F0000: - case MSR_MTRRfix4K_F8000: - env->mtrr_fixed[ECX(env) - MSR_MTRRfix4K_C0000 + 3] =3D data; - break; - case MSR_MTRRdefType: - env->mtrr_deftype =3D data; - break; - default: - break; - } - - /* Related to support known hypervisor interface */ - /* if (g_hypervisor_iface) - g_hypervisor_iface->wrmsr_handler(cs, msr, data); - - printf("write msr %llx\n", RCX(cs));*/ -} - static void exec_wrmsr(CPUX86State *env, struct x86_decode *decode) { - simulate_wrmsr(env); + hvf_simulate_wrmsr(env); env->eip +=3D decode->len; } =20 diff --git a/target/i386/hvf/x86_emu.h b/target/i386/hvf/x86_emu.h index a1d1dc7d74..107c1f1ac8 100644 --- a/target/i386/hvf/x86_emu.h +++ b/target/i386/hvf/x86_emu.h @@ -36,9 +36,7 @@ extern const struct x86_emul_ops *emul_ops; =20 void init_emu(const struct x86_emul_ops *ops); bool exec_instruction(CPUX86State *env, struct x86_decode *ins); - -void simulate_rdmsr(CPUX86State *env); -void simulate_wrmsr(CPUX86State *env); +void x86_emul_raise_exception(CPUX86State *env, int exception_index, int e= rror_code); =20 target_ulong read_reg(CPUX86State *env, int reg, int size); void write_reg(CPUX86State *env, int reg, target_ulong val, int size); --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1740146579571212.20342529512345; Fri, 21 Feb 2025 06:02:59 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlTbM-00004x-F4; Fri, 21 Feb 2025 09:02:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tlOWs-0006Ui-9D for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:37:02 -0500 Received: from linux.microsoft.com ([13.77.154.182]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlOWq-00016G-FM for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:37:02 -0500 Received: by linux.microsoft.com (Postfix, from userid 1031) id D7968204E5BF; Fri, 21 Feb 2025 00:36:29 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com D7968204E5BF DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1740126989; bh=BIBYYp20CH//yWy4bJewZDwiEhMoLrpDlcLszET5VZ4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oYJpl08eiSe2aCOo+VWJ0XdX6Ej43jGy4ZfVNwJmAMT8hrNnpi7a4b3OQrmuf+PLv IP0BAjb8eYZGtF36eOUNa1A5hIpJvXwhvW+JFrgtAwW8WZjk9gzj1oXLt/J1qwi1Pq EGRSaSK+84uNgDtEcHvpoX+JO254NfVR3Ly/KlPM= From: Wei Liu To: qemu-devel@nongnu.org Cc: wei.liu@kernel.org, dirty@apple.com, rbolshakov@ddn.com, phil@philjordan.eu, jinankjain@linux.microsoft.com, liuwe@microsoft.com, muislam@microsoft.com, ziqiaozhou@microsoft.com, mukeshrathor@microsoft.com, magnuskulke@microsoft.com, prapal@microsoft.com, jpiotrowski@microsoft.com, deviv@microsoft.com, Wei Liu Subject: [RFC PATCH v1 12/19] target/i386/hvf: provide and use simulate_{wrmsr, rdmsr} in emul_ops Date: Fri, 21 Feb 2025 00:36:20 -0800 Message-Id: <1740126987-8483-13-git-send-email-liuwe@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> References: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Change the first argument's type to be CPUState to match other hooks. Signed-off-by: Wei Liu --- target/i386/hvf/hvf-i386.h | 4 ++-- target/i386/hvf/hvf.c | 18 ++++++++++-------- target/i386/hvf/x86_emu.c | 4 ++-- target/i386/hvf/x86_emu.h | 2 ++ 4 files changed, 16 insertions(+), 12 deletions(-) diff --git a/target/i386/hvf/hvf-i386.h b/target/i386/hvf/hvf-i386.h index 044ad236ae..8c42ae6b01 100644 --- a/target/i386/hvf/hvf-i386.h +++ b/target/i386/hvf/hvf-i386.h @@ -19,8 +19,8 @@ uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx, int reg); =20 void hvf_handle_io(CPUState *, uint16_t, void *, int, int, int); -void hvf_simulate_rdmsr(CPUX86State *env); -void hvf_simulate_wrmsr(CPUX86State *env); +void hvf_simulate_rdmsr(CPUState *cpu); +void hvf_simulate_wrmsr(CPUState *cpu); =20 /* Host specific functions */ int hvf_inject_interrupt(CPUArchState *env, int vector); diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 88f5487b45..57a8029cfa 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -252,6 +252,8 @@ static const struct x86_emul_ops hvf_x86_emul_ops =3D { .write_mem =3D hvf_write_mem, .read_segment_descriptor =3D hvf_read_segment_descriptor, .handle_io =3D hvf_handle_io, + .simulate_rdmsr =3D hvf_simulate_rdmsr, + .simulate_wrmsr =3D hvf_simulate_wrmsr, }; =20 int hvf_arch_init_vcpu(CPUState *cpu) @@ -506,10 +508,10 @@ void hvf_store_regs(CPUState *cs) macvm_set_rip(cs, env->eip); } =20 -void hvf_simulate_rdmsr(CPUX86State *env) +void hvf_simulate_rdmsr(CPUState *cs) { - X86CPU *cpu =3D env_archcpu(env); - CPUState *cs =3D env_cpu(env); + X86CPU *cpu =3D X86_CPU(cs); + CPUX86State *env =3D &cpu->env; uint32_t msr =3D ECX(env); uint64_t val =3D 0; =20 @@ -611,10 +613,10 @@ void hvf_simulate_rdmsr(CPUX86State *env) RDX(env) =3D (uint32_t)(val >> 32); } =20 -void hvf_simulate_wrmsr(CPUX86State *env) +void hvf_simulate_wrmsr(CPUState *cs) { - X86CPU *cpu =3D env_archcpu(env); - CPUState *cs =3D env_cpu(env); + X86CPU *cpu =3D X86_CPU(cs); + CPUX86State *env =3D &cpu->env; uint32_t msr =3D ECX(env); uint64_t data =3D ((uint64_t)EDX(env) << 32) | EAX(env); =20 @@ -900,9 +902,9 @@ int hvf_vcpu_exec(CPUState *cpu) { hvf_load_regs(cpu); if (exit_reason =3D=3D EXIT_REASON_RDMSR) { - hvf_simulate_rdmsr(env); + hvf_simulate_rdmsr(cpu); } else { - hvf_simulate_wrmsr(env); + hvf_simulate_wrmsr(cpu); } env->eip +=3D ins_len; hvf_store_regs(cpu); diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index b6e63daea4..304c1ef396 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -672,13 +672,13 @@ void x86_emul_raise_exception(CPUX86State *env, int e= xception_index, int error_c =20 static void exec_rdmsr(CPUX86State *env, struct x86_decode *decode) { - hvf_simulate_rdmsr(env); + emul_ops->simulate_rdmsr(env_cpu(env)); env->eip +=3D decode->len; } =20 static void exec_wrmsr(CPUX86State *env, struct x86_decode *decode) { - hvf_simulate_wrmsr(env); + emul_ops->simulate_wrmsr(env_cpu(env)); env->eip +=3D decode->len; } =20 diff --git a/target/i386/hvf/x86_emu.h b/target/i386/hvf/x86_emu.h index 107c1f1ac8..555b567e2c 100644 --- a/target/i386/hvf/x86_emu.h +++ b/target/i386/hvf/x86_emu.h @@ -30,6 +30,8 @@ struct x86_emul_ops { enum X86Seg seg); void (*handle_io)(CPUState *cpu, uint16_t port, void *data, int direct= ion, int size, int count); + void (*simulate_rdmsr)(CPUState *cs); + void (*simulate_wrmsr)(CPUState *cs); }; =20 extern const struct x86_emul_ops *emul_ops; --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1740146664; cv=none; d=zohomail.com; s=zohoarc; b=ehIq5fN0Pve0Tx0VjZKf4v61z6l505s0IWg22YqT2ENdV1px46wVfPRq7pzd6Ifj/AHmzvF6St7hbwDWhxxErmuUxPK6eWFWUXQgqkLvpSRsIfghReFSNLPf9MxcG/AN0aY/GJ+T2KONQP4s1JmltUapuh60AYV7dlFH28cnAAM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1740146664; h=Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Fri, 21 Feb 2025 03:37:05 -0500 Received: from linux.microsoft.com ([13.77.154.182]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlOWs-000175-Nf for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:37:05 -0500 Received: by linux.microsoft.com (Postfix, from userid 1031) id E48322053679; Fri, 21 Feb 2025 00:36:29 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com E48322053679 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1740126989; bh=NAV5De61Rnf9i8r9pTLLPWYBriI7vC/J7U9MSRQKY9A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cTnE/XRgyvvcVSAnelFxiFhB2Nk8dX/Exhmm5S2/VNNt+TNl7pH9+6SuN5N2/8sXO k3Y4V+D4kgUgGLKwsTnvde30iXicP4wIfaVjS7beTogMUmzfT4mDIyLiZf6x68i2Dy Ab2Owkb5i3e+eMArdNmxs2EwG09R6a02A56ynsv0= From: Wei Liu To: qemu-devel@nongnu.org Cc: wei.liu@kernel.org, dirty@apple.com, rbolshakov@ddn.com, phil@philjordan.eu, jinankjain@linux.microsoft.com, liuwe@microsoft.com, muislam@microsoft.com, ziqiaozhou@microsoft.com, mukeshrathor@microsoft.com, magnuskulke@microsoft.com, prapal@microsoft.com, jpiotrowski@microsoft.com, deviv@microsoft.com, Wei Liu Subject: [RFC PATCH v1 13/19] target/i386: rename lazy flags field and its type Date: Fri, 21 Feb 2025 00:36:21 -0800 Message-Id: <1740126987-8483-14-git-send-email-liuwe@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> References: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" The same structure and code can be used by other accelerators. Drop the hvf prefix in the type and field name. No functional change. Signed-off-by: Wei Liu --- target/i386/cpu.h | 6 ++-- target/i386/hvf/x86_flags.c | 56 ++++++++++++++++++------------------- 2 files changed, 31 insertions(+), 31 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index bfdb1f87a3..00bb2ed79a 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1772,10 +1772,10 @@ typedef struct CPUCaches { CPUCacheInfo *l3_cache; } CPUCaches; =20 -typedef struct HVFX86LazyFlags { +typedef struct X86LazyFlags { target_ulong result; target_ulong auxbits; -} HVFX86LazyFlags; +} X86LazyFlags; =20 typedef struct CPUArchState { /* standard registers */ @@ -2069,7 +2069,7 @@ typedef struct CPUArchState { QemuMutex xen_timers_lock; #endif #if defined(CONFIG_HVF) - HVFX86LazyFlags hvf_lflags; + X86LazyFlags lflags; void *mmio_buf; #endif =20 diff --git a/target/i386/hvf/x86_flags.c b/target/i386/hvf/x86_flags.c index 03d6de5efc..3c02c9c563 100644 --- a/target/i386/hvf/x86_flags.c +++ b/target/i386/hvf/x86_flags.c @@ -62,7 +62,7 @@ #define SET_FLAGS_OSZAPC_SIZE(size, lf_carries, lf_result) { \ target_ulong temp =3D ((lf_carries) & (LF_MASK_AF)) | \ (((lf_carries) >> (size - 2)) << LF_BIT_PO); \ - env->hvf_lflags.result =3D (target_ulong)(int##size##_t)(lf_result); \ + env->lflags.result =3D (target_ulong)(int##size##_t)(lf_result); \ if ((size) =3D=3D 32) { \ temp =3D ((lf_carries) & ~(LF_MASK_PDB | LF_MASK_SD)); \ } else if ((size) =3D=3D 16) { \ @@ -72,7 +72,7 @@ } else { \ VM_PANIC("unimplemented"); \ } \ - env->hvf_lflags.auxbits =3D (target_ulong)(uint32_t)temp; \ + env->lflags.auxbits =3D (target_ulong)(uint32_t)temp; \ } =20 /* carries, result */ @@ -99,10 +99,10 @@ } else { \ VM_PANIC("unimplemented"); \ } \ - env->hvf_lflags.result =3D (target_ulong)(int##size##_t)(lf_result); \ - target_ulong delta_c =3D (env->hvf_lflags.auxbits ^ temp) & LF_MASK_CF= ; \ + env->lflags.result =3D (target_ulong)(int##size##_t)(lf_result); \ + target_ulong delta_c =3D (env->lflags.auxbits ^ temp) & LF_MASK_CF; \ delta_c ^=3D (delta_c >> 1); \ - env->hvf_lflags.auxbits =3D (target_ulong)(uint32_t)(temp ^ delta_c); \ + env->lflags.auxbits =3D (target_ulong)(uint32_t)(temp ^ delta_c); \ } =20 /* carries, result */ @@ -116,8 +116,8 @@ void SET_FLAGS_OxxxxC(CPUX86State *env, uint32_t new_of, uint32_t new_cf) { uint32_t temp_po =3D new_of ^ new_cf; - env->hvf_lflags.auxbits &=3D ~(LF_MASK_PO | LF_MASK_CF); - env->hvf_lflags.auxbits |=3D (temp_po << LF_BIT_PO) | (new_cf << LF_BI= T_CF); + env->lflags.auxbits &=3D ~(LF_MASK_PO | LF_MASK_CF); + env->lflags.auxbits |=3D (temp_po << LF_BIT_PO) | (new_cf << LF_BIT_CF= ); } =20 void SET_FLAGS_OSZAPC_SUB32(CPUX86State *env, uint32_t v1, uint32_t v2, @@ -213,27 +213,27 @@ void SET_FLAGS_OSZAPC_LOGIC8(CPUX86State *env, uint8_= t v1, uint8_t v2, =20 bool get_PF(CPUX86State *env) { - uint32_t temp =3D (255 & env->hvf_lflags.result); - temp =3D temp ^ (255 & (env->hvf_lflags.auxbits >> LF_BIT_PDB)); + uint32_t temp =3D (255 & env->lflags.result); + temp =3D temp ^ (255 & (env->lflags.auxbits >> LF_BIT_PDB)); temp =3D (temp ^ (temp >> 4)) & 0x0F; return (0x9669U >> temp) & 1; } =20 void set_PF(CPUX86State *env, bool val) { - uint32_t temp =3D (255 & env->hvf_lflags.result) ^ (!val); - env->hvf_lflags.auxbits &=3D ~(LF_MASK_PDB); - env->hvf_lflags.auxbits |=3D (temp << LF_BIT_PDB); + uint32_t temp =3D (255 & env->lflags.result) ^ (!val); + env->lflags.auxbits &=3D ~(LF_MASK_PDB); + env->lflags.auxbits |=3D (temp << LF_BIT_PDB); } =20 bool get_OF(CPUX86State *env) { - return ((env->hvf_lflags.auxbits + (1U << LF_BIT_PO)) >> LF_BIT_CF) & = 1; + return ((env->lflags.auxbits + (1U << LF_BIT_PO)) >> LF_BIT_CF) & 1; } =20 bool get_CF(CPUX86State *env) { - return (env->hvf_lflags.auxbits >> LF_BIT_CF) & 1; + return (env->lflags.auxbits >> LF_BIT_CF) & 1; } =20 void set_OF(CPUX86State *env, bool val) @@ -250,45 +250,45 @@ void set_CF(CPUX86State *env, bool val) =20 bool get_AF(CPUX86State *env) { - return (env->hvf_lflags.auxbits >> LF_BIT_AF) & 1; + return (env->lflags.auxbits >> LF_BIT_AF) & 1; } =20 void set_AF(CPUX86State *env, bool val) { - env->hvf_lflags.auxbits &=3D ~(LF_MASK_AF); - env->hvf_lflags.auxbits |=3D val << LF_BIT_AF; + env->lflags.auxbits &=3D ~(LF_MASK_AF); + env->lflags.auxbits |=3D val << LF_BIT_AF; } =20 bool get_ZF(CPUX86State *env) { - return !env->hvf_lflags.result; + return !env->lflags.result; } =20 void set_ZF(CPUX86State *env, bool val) { if (val) { - env->hvf_lflags.auxbits ^=3D - (((env->hvf_lflags.result >> LF_SIGN_BIT) & 1) << LF_BIT_SD); + env->lflags.auxbits ^=3D + (((env->lflags.result >> LF_SIGN_BIT) & 1) << LF_BIT_SD); /* merge the parity bits into the Parity Delta Byte */ - uint32_t temp_pdb =3D (255 & env->hvf_lflags.result); - env->hvf_lflags.auxbits ^=3D (temp_pdb << LF_BIT_PDB); + uint32_t temp_pdb =3D (255 & env->lflags.result); + env->lflags.auxbits ^=3D (temp_pdb << LF_BIT_PDB); /* now zero the .result value */ - env->hvf_lflags.result =3D 0; + env->lflags.result =3D 0; } else { - env->hvf_lflags.result |=3D (1 << 8); + env->lflags.result |=3D (1 << 8); } } =20 bool get_SF(CPUX86State *env) { - return ((env->hvf_lflags.result >> LF_SIGN_BIT) ^ - (env->hvf_lflags.auxbits >> LF_BIT_SD)) & 1; + return ((env->lflags.result >> LF_SIGN_BIT) ^ + (env->lflags.auxbits >> LF_BIT_SD)) & 1; } =20 void set_SF(CPUX86State *env, bool val) { bool temp_sf =3D get_SF(env); - env->hvf_lflags.auxbits ^=3D (temp_sf ^ val) << LF_BIT_SD; + env->lflags.auxbits ^=3D (temp_sf ^ val) << LF_BIT_SD; } =20 void lflags_to_rflags(CPUX86State *env) @@ -303,7 +303,7 @@ void lflags_to_rflags(CPUX86State *env) =20 void rflags_to_lflags(CPUX86State *env) { - env->hvf_lflags.auxbits =3D env->hvf_lflags.result =3D 0; + env->lflags.auxbits =3D env->lflags.result =3D 0; set_OF(env, env->eflags & CC_O); set_SF(env, env->eflags & CC_S); set_ZF(env, env->eflags & CC_Z); --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1740146665; cv=none; d=zohomail.com; s=zohoarc; b=EqfyGYM4pmBdL6bXDtXdOo79X7kZUpG+F6MKfODtREDL530XuGJnUwbI2mHYvKtHBevkolzzgVrPLms7C68ao6uE00fQbc4LHRlr8qYMP8X7wBQNd2V5OHbunU9qymn4SIGdd5X4MRDqPXp05crfiwVB7p8hA8HIB1w1Jvgea7Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1740146665; h=Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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charset="utf-8" Signed-off-by: Wei Liu --- target/i386/hvf/x86_decode.c | 3 --- target/i386/hvf/x86_emu.c | 4 ---- 2 files changed, 7 deletions(-) diff --git a/target/i386/hvf/x86_decode.c b/target/i386/hvf/x86_decode.c index 31285952ad..ffece4773b 100644 --- a/target/i386/hvf/x86_decode.c +++ b/target/i386/hvf/x86_decode.c @@ -20,10 +20,7 @@ =20 #include "panic.h" #include "x86_decode.h" -#include "vmx.h" #include "x86_emu.h" -#include "x86_mmu.h" -#include "x86_descr.h" =20 #define OPCODE_ESCAPE 0xf =20 diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index 304c1ef396..84f97ed386 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -40,11 +40,7 @@ #include "x86_decode.h" #include "x86.h" #include "x86_emu.h" -#include "x86_mmu.h" #include "x86_flags.h" -#include "vmcs.h" -#include "vmx.h" -#include "hvf-i386.h" =20 #define EXEC_2OP_FLAGS_CMD(env, decode, cmd, FLAGS_FUNC, save_res) \ { \ --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Fri, 21 Feb 2025 00:36:29 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 0A9A4205367B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1740126990; bh=+IIad8e383M03rrG6HzlvpGeyTv0Ah/46IUR/3bDc1I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=j+yHJEAWrj3FQIn+NoL3DAYjgONspruQ3ysV155Lf3Aftfh16rZT1bgnSyCqm3/rt 8ABZ/5zRyYSxE1miQL60WuPo3Peb+wgqicZ+AUu3woHk4luMa0BzVzEVsCkaRnqOnj c8VB4FG45dkNE/ytVQO6zo1p6iTgKCWHObRRaEPA= From: Wei Liu To: qemu-devel@nongnu.org Cc: wei.liu@kernel.org, dirty@apple.com, rbolshakov@ddn.com, phil@philjordan.eu, jinankjain@linux.microsoft.com, liuwe@microsoft.com, muislam@microsoft.com, ziqiaozhou@microsoft.com, mukeshrathor@microsoft.com, magnuskulke@microsoft.com, prapal@microsoft.com, jpiotrowski@microsoft.com, deviv@microsoft.com, Wei Liu Subject: [RFC PATCH v1 15/19] target/i386/hvf: drop some dead code Date: Fri, 21 Feb 2025 00:36:23 -0800 Message-Id: <1740126987-8483-16-git-send-email-liuwe@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> References: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Signed-off-by: Wei Liu --- target/i386/hvf/x86_emu.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index 84f97ed386..44ef068bef 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -1240,10 +1240,6 @@ static void init_cmd_handler(void) =20 bool exec_instruction(CPUX86State *env, struct x86_decode *ins) { - /*if (hvf_vcpu_id(cs)) - printf("%d, %llx: exec_instruction %s\n", hvf_vcpu_id(cs), env->eip, - decode_cmd_to_string(ins->cmd));*/ - if (!_cmd_handler[ins->cmd].handler) { printf("Unimplemented handler (%llx) for %d (%x %x) \n", env->eip, ins->cmd, ins->opcode[0], --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; 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Fri, 21 Feb 2025 06:06:15 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlTbu-000195-9D; Fri, 21 Feb 2025 09:02:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tlOWt-0006W3-MP for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:37:03 -0500 Received: from linux.microsoft.com ([13.77.154.182]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlOWs-00015M-1m for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:37:03 -0500 Received: by linux.microsoft.com (Postfix, from userid 1031) id 176EE205367C; Fri, 21 Feb 2025 00:36:29 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 176EE205367C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1740126990; bh=tNGPiKMnv4PpzJ0l8l0eY3vzGPXS+PFwnhEpXOSgZos=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=D2XkyGYf8SAXe5p2elN7gcw72qohFHbP2c7QIKaGxINMpSu3oUs3bQKbF7gZhu2xW sjEj9wwuDINi1xF5PmKYOMGLs8SYfgqSdlwFFNPutCxKOX/xW13S7eFrKHcfSnpgRc QcJ7630hqiYV1HL56R60S7gPMa08yQw0Qj0H1Lzw= From: Wei Liu To: qemu-devel@nongnu.org Cc: wei.liu@kernel.org, dirty@apple.com, rbolshakov@ddn.com, phil@philjordan.eu, jinankjain@linux.microsoft.com, liuwe@microsoft.com, muislam@microsoft.com, ziqiaozhou@microsoft.com, mukeshrathor@microsoft.com, magnuskulke@microsoft.com, prapal@microsoft.com, jpiotrowski@microsoft.com, deviv@microsoft.com, Wei Liu Subject: [RFC PATCH v1 16/19] target/i386/hvf: rename some include guards Date: Fri, 21 Feb 2025 00:36:24 -0800 Message-Id: <1740126987-8483-17-git-send-email-liuwe@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> References: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" These headers will be moved out to its own component. Signed-off-by: Wei Liu --- target/i386/hvf/x86.h | 4 ++-- target/i386/hvf/x86_decode.h | 4 ++-- target/i386/hvf/x86_flags.h | 6 +++--- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/target/i386/hvf/x86.h b/target/i386/hvf/x86.h index 063cd0b83e..73edccfba0 100644 --- a/target/i386/hvf/x86.h +++ b/target/i386/hvf/x86.h @@ -16,8 +16,8 @@ * License along with this program; if not, see . */ =20 -#ifndef HVF_X86_H -#define HVF_X86_H +#ifndef X86_EMU_DEFS_H +#define X86_EMU_DEFS_H =20 typedef struct x86_register { union { diff --git a/target/i386/hvf/x86_decode.h b/target/i386/hvf/x86_decode.h index a2d7a2a27b..930d965164 100644 --- a/target/i386/hvf/x86_decode.h +++ b/target/i386/hvf/x86_decode.h @@ -15,8 +15,8 @@ * License along with this program; if not, see . */ =20 -#ifndef HVF_X86_DECODE_H -#define HVF_X86_DECODE_H +#ifndef X86_EMU_DECODE_H +#define X86_EMU_DECODE_H =20 #include "cpu.h" #include "x86.h" diff --git a/target/i386/hvf/x86_flags.h b/target/i386/hvf/x86_flags.h index 75c2a7feab..6c175007b5 100644 --- a/target/i386/hvf/x86_flags.h +++ b/target/i386/hvf/x86_flags.h @@ -21,8 +21,8 @@ * x86 eflags functions */ =20 -#ifndef X86_FLAGS_H -#define X86_FLAGS_H +#ifndef X86_EMU_FLAGS_H +#define X86_EMU_FLAGS_H =20 #include "cpu.h" void lflags_to_rflags(CPUX86State *env); @@ -78,4 +78,4 @@ void SET_FLAGS_OSZAPC_LOGIC16(CPUX86State *env, uint16_t = v1, uint16_t v2, void SET_FLAGS_OSZAPC_LOGIC8(CPUX86State *env, uint8_t v1, uint8_t v2, uint8_t diff); =20 -#endif /* X86_FLAGS_H */ +#endif /* X86_EMU_FLAGS_H */ --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1740146534; cv=none; d=zohomail.com; s=zohoarc; b=eDgcuc+cCfSWbiEBVBPJp9oiaKLTm/OHbEnNH4at69SZ3fB5tsxqMQf4W3yxYrs4TXAejYNXZWINvR1rIP4dP6ecSg3o/KSZofXbMtZfIYWMCIKBBv9+rxegE/Po1QJ1NGHv96r1hqSyGt8RUGqLKZlU8Xr+QmTwOkDoLQJmhwg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1740146534; h=Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Fri, 21 Feb 2025 03:37:04 -0500 Received: from linux.microsoft.com ([13.77.154.182]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tlOWs-00015v-P5 for qemu-devel@nongnu.org; Fri, 21 Feb 2025 03:37:04 -0500 Received: by linux.microsoft.com (Postfix, from userid 1031) id 244332053686; Fri, 21 Feb 2025 00:36:29 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 244332053686 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1740126990; bh=fCHLMSx0k0Dka9n2Ye+wmkJEZwzMqBQDPD8yM1c8zGM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cY6fyB9Kfr2GsYKntWn6TYkcdHIsgUtIuhCwsZSzW/7jD8d7HeuMlHvo+Le74ydBO K5Y5TUohphAH/6pjcQXoxlrY0YW7bXbGIY7QFaYMFwwCCDNCMEwtXSjC5f05bRO0ej 1H8ldnMrPQ9viMTLQzL8HfUp1J0Z2b4XNRJJwkTo= From: Wei Liu To: qemu-devel@nongnu.org Cc: wei.liu@kernel.org, dirty@apple.com, rbolshakov@ddn.com, phil@philjordan.eu, jinankjain@linux.microsoft.com, liuwe@microsoft.com, muislam@microsoft.com, ziqiaozhou@microsoft.com, mukeshrathor@microsoft.com, magnuskulke@microsoft.com, prapal@microsoft.com, jpiotrowski@microsoft.com, deviv@microsoft.com, Wei Liu Subject: [RFC PATCH v1 17/19] target/i386: add a directory for x86 instruction emulator Date: Fri, 21 Feb 2025 00:36:25 -0800 Message-Id: <1740126987-8483-18-git-send-email-liuwe@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> References: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Signed-off-by: Wei Liu --- target/i386/meson.build | 1 + target/i386/x86-insn-emul/meson.build | 0 2 files changed, 1 insertion(+) create mode 100644 target/i386/x86-insn-emul/meson.build diff --git a/target/i386/meson.build b/target/i386/meson.build index 2e9c472f49..e93c1c20ca 100644 --- a/target/i386/meson.build +++ b/target/i386/meson.build @@ -31,6 +31,7 @@ subdir('whpx') subdir('nvmm') subdir('hvf') subdir('tcg') +subdir('x86-insn-emul') =20 target_arch +=3D {'i386': i386_ss} target_system_arch +=3D {'i386': i386_system_ss} diff --git a/target/i386/x86-insn-emul/meson.build b/target/i386/x86-insn-e= mul/meson.build new file mode 100644 index 0000000000..e69de29bb2 --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1740126990; bh=erb5rWE/+gsksSJoNRYoDKliuHhKlMd1pYrL4uHaK9M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XaXfLUCMVjz836sQ9M8Nm8qt9lPPjtKPoKqvK1ubBtZlwQQ2BDVK3puc4JXRS8grl RPkS3XDnx8Y4mIJESbJr5d3ymdfAV6vAkHLQ2XvX4B3ihSinaCP5gC6lSpZoY/8cqL HIF0RTq28dJfT9v4mNKdlKI+f5IdCPLcP+lvNhLk= From: Wei Liu To: qemu-devel@nongnu.org Cc: wei.liu@kernel.org, dirty@apple.com, rbolshakov@ddn.com, phil@philjordan.eu, jinankjain@linux.microsoft.com, liuwe@microsoft.com, muislam@microsoft.com, ziqiaozhou@microsoft.com, mukeshrathor@microsoft.com, magnuskulke@microsoft.com, prapal@microsoft.com, jpiotrowski@microsoft.com, deviv@microsoft.com, Wei Liu Subject: [RFC PATCH v1 18/19] target/i386/x86-insn-emul: add a panic.h Date: Fri, 21 Feb 2025 00:36:26 -0800 Message-Id: <1740126987-8483-19-git-send-email-liuwe@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> References: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" The macros will be used by the instruction emulator. The code is the same as the one under hvf. Signed-off-by: Wei Liu --- target/i386/x86-insn-emul/panic.h | 45 +++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 target/i386/x86-insn-emul/panic.h diff --git a/target/i386/x86-insn-emul/panic.h b/target/i386/x86-insn-emul/= panic.h new file mode 100644 index 0000000000..71c24874ba --- /dev/null +++ b/target/i386/x86-insn-emul/panic.h @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2016 Veertu Inc, + * Copyright (C) 2017 Google Inc, + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this program; if not, see . + */ +#ifndef X86_EMU_PANIC_H +#define X86_EMU_PANIC_H + +#define VM_PANIC(x) {\ + printf("%s\n", x); \ + abort(); \ +} + +#define VM_PANIC_ON(x) {\ + if (x) { \ + printf("%s\n", #x); \ + abort(); \ + } \ +} + +#define VM_PANIC_EX(...) {\ + printf(__VA_ARGS__); \ + abort(); \ +} + +#define VM_PANIC_ON_EX(x, ...) {\ + if (x) { \ + printf(__VA_ARGS__); \ + abort(); \ + } \ +} + +#endif --=20 2.39.5 (Apple Git-154) From nobody Sun Feb 23 05:24:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1740146690; cv=none; d=zohomail.com; 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b=bhLOm8MQdw/+qvNTlGB9D0Wp+N85uWzdR+4vkMVB28DN8NbJEw+o6zF022RfYSS48 iW9nyMr+tdkgwyH/kMJN8hrLDnqepr9dUXq5i8bwiiQxJ21xiOzc/24aQ3fZWVccty t2kxpE7h928g+hb8jOwsEm0x4DjE82mbIUaeTaBw= From: Wei Liu To: qemu-devel@nongnu.org Cc: wei.liu@kernel.org, dirty@apple.com, rbolshakov@ddn.com, phil@philjordan.eu, jinankjain@linux.microsoft.com, liuwe@microsoft.com, muislam@microsoft.com, ziqiaozhou@microsoft.com, mukeshrathor@microsoft.com, magnuskulke@microsoft.com, prapal@microsoft.com, jpiotrowski@microsoft.com, deviv@microsoft.com, Wei Liu Subject: [RFC PATCH v1 19/19] target/i386: move x86 instruction emulator out of hvf Date: Fri, 21 Feb 2025 00:36:27 -0800 Message-Id: <1740126987-8483-20-git-send-email-liuwe@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> References: <1740126987-8483-1-git-send-email-liuwe@linux.microsoft.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Move x86_decode, x86_emu, x86_flags and some headers to the new location. Fix up all the inclusion sites in hvf. Signed-off-by: Wei Liu --- target/i386/hvf/hvf.c | 8 ++++---- target/i386/hvf/meson.build | 3 --- target/i386/hvf/vmx.h | 2 +- target/i386/hvf/x86.c | 4 ++-- target/i386/hvf/x86_cpuid.c | 2 +- target/i386/hvf/x86_descr.h | 2 +- target/i386/hvf/x86_mmu.c | 2 +- target/i386/hvf/x86_task.c | 6 +++--- target/i386/hvf/x86hvf.c | 2 +- target/i386/x86-insn-emul/meson.build | 5 +++++ target/i386/{hvf =3D> x86-insn-emul}/x86.h | 0 target/i386/{hvf =3D> x86-insn-emul}/x86_decode.c | 0 target/i386/{hvf =3D> x86-insn-emul}/x86_decode.h | 0 target/i386/{hvf =3D> x86-insn-emul}/x86_emu.c | 0 target/i386/{hvf =3D> x86-insn-emul}/x86_emu.h | 0 target/i386/{hvf =3D> x86-insn-emul}/x86_flags.c | 0 target/i386/{hvf =3D> x86-insn-emul}/x86_flags.h | 0 17 files changed, 19 insertions(+), 17 deletions(-) rename target/i386/{hvf =3D> x86-insn-emul}/x86.h (100%) rename target/i386/{hvf =3D> x86-insn-emul}/x86_decode.c (100%) rename target/i386/{hvf =3D> x86-insn-emul}/x86_decode.h (100%) rename target/i386/{hvf =3D> x86-insn-emul}/x86_emu.c (100%) rename target/i386/{hvf =3D> x86-insn-emul}/x86_emu.h (100%) rename target/i386/{hvf =3D> x86-insn-emul}/x86_flags.c (100%) rename target/i386/{hvf =3D> x86-insn-emul}/x86_flags.h (100%) diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 57a8029cfa..aeef3dbde6 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -59,12 +59,12 @@ #include "hvf-i386.h" #include "vmcs.h" #include "vmx.h" -#include "x86.h" +#include "x86-insn-emul/x86.h" #include "x86_descr.h" -#include "x86_flags.h" +#include "x86-insn-emul/x86_flags.h" #include "x86_mmu.h" -#include "x86_decode.h" -#include "x86_emu.h" +#include "x86-insn-emul/x86_decode.h" +#include "x86-insn-emul/x86_emu.h" #include "x86_task.h" #include "x86hvf.h" =20 diff --git a/target/i386/hvf/meson.build b/target/i386/hvf/meson.build index 05c3c8cf18..519d190f0e 100644 --- a/target/i386/hvf/meson.build +++ b/target/i386/hvf/meson.build @@ -2,10 +2,7 @@ i386_system_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: fil= es( 'hvf.c', 'x86.c', 'x86_cpuid.c', - 'x86_decode.c', 'x86_descr.c', - 'x86_emu.c', - 'x86_flags.c', 'x86_mmu.c', 'x86_task.c', 'x86hvf.c', diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h index 80ce26279b..d012781d46 100644 --- a/target/i386/hvf/vmx.h +++ b/target/i386/hvf/vmx.h @@ -29,7 +29,7 @@ #include #include "vmcs.h" #include "cpu.h" -#include "x86.h" +#include "x86-insn-emul/x86.h" #include "system/hvf.h" #include "system/hvf_int.h" =20 diff --git a/target/i386/hvf/x86.c b/target/i386/hvf/x86.c index a0ede13886..3b9d0716fe 100644 --- a/target/i386/hvf/x86.c +++ b/target/i386/hvf/x86.c @@ -19,8 +19,8 @@ #include "qemu/osdep.h" =20 #include "cpu.h" -#include "x86_decode.h" -#include "x86_emu.h" +#include "x86-insn-emul/x86_decode.h" +#include "x86-insn-emul/x86_emu.h" #include "vmcs.h" #include "vmx.h" #include "x86_mmu.h" diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c index ae836f65cc..1b7a3579c8 100644 --- a/target/i386/hvf/x86_cpuid.c +++ b/target/i386/hvf/x86_cpuid.c @@ -24,7 +24,7 @@ #include "qemu/cpuid.h" #include "host/cpuinfo.h" #include "cpu.h" -#include "x86.h" +#include "x86-insn-emul/x86.h" #include "vmx.h" #include "system/hvf.h" #include "hvf-i386.h" diff --git a/target/i386/hvf/x86_descr.h b/target/i386/hvf/x86_descr.h index ce5de98349..2b403b36ce 100644 --- a/target/i386/hvf/x86_descr.h +++ b/target/i386/hvf/x86_descr.h @@ -19,7 +19,7 @@ #ifndef HVF_X86_DESCR_H #define HVF_X86_DESCR_H =20 -#include "x86.h" +#include "x86-insn-emul/x86.h" =20 typedef struct vmx_segment { uint16_t sel; diff --git a/target/i386/hvf/x86_mmu.c b/target/i386/hvf/x86_mmu.c index 579d0c3a4c..648ff6f7f2 100644 --- a/target/i386/hvf/x86_mmu.c +++ b/target/i386/hvf/x86_mmu.c @@ -19,7 +19,7 @@ #include "qemu/osdep.h" #include "panic.h" #include "cpu.h" -#include "x86.h" +#include "x86-insn-emul/x86.h" #include "x86_mmu.h" #include "vmcs.h" #include "vmx.h" diff --git a/target/i386/hvf/x86_task.c b/target/i386/hvf/x86_task.c index 161217991f..88b1c0a8bf 100644 --- a/target/i386/hvf/x86_task.c +++ b/target/i386/hvf/x86_task.c @@ -14,11 +14,11 @@ #include "hvf-i386.h" #include "vmcs.h" #include "vmx.h" -#include "x86.h" +#include "x86-insn-emul/x86.h" #include "x86_descr.h" #include "x86_mmu.h" -#include "x86_decode.h" -#include "x86_emu.h" +#include "x86-insn-emul/x86_decode.h" +#include "x86-insn-emul/x86_emu.h" #include "x86_task.h" #include "x86hvf.h" =20 diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c index 531a340b37..2c0d779bca 100644 --- a/target/i386/hvf/x86hvf.c +++ b/target/i386/hvf/x86hvf.c @@ -24,7 +24,7 @@ #include "vmcs.h" #include "cpu.h" #include "x86_descr.h" -#include "x86_decode.h" +#include "x86-insn-emul/x86_decode.h" #include "system/hw_accel.h" =20 #include "hw/i386/apic_internal.h" diff --git a/target/i386/x86-insn-emul/meson.build b/target/i386/x86-insn-e= mul/meson.build index e69de29bb2..4edd4f462f 100644 --- a/target/i386/x86-insn-emul/meson.build +++ b/target/i386/x86-insn-emul/meson.build @@ -0,0 +1,5 @@ +i386_system_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: files( + 'x86_decode.c', + 'x86_emu.c', + 'x86_flags.c', +)) diff --git a/target/i386/hvf/x86.h b/target/i386/x86-insn-emul/x86.h similarity index 100% rename from target/i386/hvf/x86.h rename to target/i386/x86-insn-emul/x86.h diff --git a/target/i386/hvf/x86_decode.c b/target/i386/x86-insn-emul/x86_d= ecode.c similarity index 100% rename from target/i386/hvf/x86_decode.c rename to target/i386/x86-insn-emul/x86_decode.c diff --git a/target/i386/hvf/x86_decode.h b/target/i386/x86-insn-emul/x86_d= ecode.h similarity index 100% rename from target/i386/hvf/x86_decode.h rename to target/i386/x86-insn-emul/x86_decode.h diff --git a/target/i386/hvf/x86_emu.c b/target/i386/x86-insn-emul/x86_emu.c similarity index 100% rename from target/i386/hvf/x86_emu.c rename to target/i386/x86-insn-emul/x86_emu.c diff --git a/target/i386/hvf/x86_emu.h b/target/i386/x86-insn-emul/x86_emu.h similarity index 100% rename from target/i386/hvf/x86_emu.h rename to target/i386/x86-insn-emul/x86_emu.h diff --git a/target/i386/hvf/x86_flags.c b/target/i386/x86-insn-emul/x86_fl= ags.c similarity index 100% rename from target/i386/hvf/x86_flags.c rename to target/i386/x86-insn-emul/x86_flags.c diff --git a/target/i386/hvf/x86_flags.h b/target/i386/x86-insn-emul/x86_fl= ags.h similarity index 100% rename from target/i386/hvf/x86_flags.h rename to target/i386/x86-insn-emul/x86_flags.h --=20 2.39.5 (Apple Git-154)