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Wed, 11 May 2022 13:03:20 -0400 Received: from git.sr.ht (unknown [173.195.146.142]) by mail-b.sr.ht (Postfix) with ESMTPSA id 0EAFF11F100; Wed, 11 May 2022 17:03:15 +0000 (UTC) Authentication-Results: mail-b.sr.ht; dkim=none From: ~eopxd Date: Mon, 07 Mar 2022 01:38:18 -0800 Subject: [PATCH qemu v16 07/15] target/riscv: rvv: Add tail agnostic for vector integer shift instructions Message-ID: <165228859378.22204.7336259119424019499-7@git.sr.ht> X-Mailer: git.sr.ht In-Reply-To: <165228859378.22204.7336259119424019499-0@git.sr.ht> To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Bin Meng , Frank Chang , WeiWei Li , eop Chen Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=173.195.146.151; envelope-from=outgoing@sr.ht; helo=mail-b.sr.ht X-Spam_score_int: 36 X-Spam_score: 3.6 X-Spam_bar: +++ X-Spam_report: (3.6 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_96_XX=3.405, FREEMAIL_FORGED_REPLYTO=2.095, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: ~eopxd Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1652289173985100001 From: eopXD Signed-off-by: eop Chen Reviewed-by: Frank Chang Reviewed-by: Weiwei Li Acked-by: Alistair Francis --- target/riscv/insn_trans/trans_rvv.c.inc | 3 ++- target/riscv/vector_helper.c | 11 +++++++++++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_tr= ans/trans_rvv.c.inc index 2a338f815e..347f7faf28 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -1832,7 +1832,7 @@ do_opivx_gvec_shift(DisasContext *s, arg_rmrr *a, GVe= cGen2sFn32 *gvec_fn, return false; } =20 - if (a->vm && s->vl_eq_vlmax) { + if (a->vm && s->vl_eq_vlmax && !(s->vta && s->lmul < 0)) { TCGv_i32 src1 =3D tcg_temp_new_i32(); =20 tcg_gen_trunc_tl_i32(src1, get_gpr(s, a->rs1, EXT_NONE)); @@ -1891,6 +1891,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a= ) \ \ data =3D FIELD_DP32(data, VDATA, VM, a->vm); \ data =3D FIELD_DP32(data, VDATA, LMUL, s->lmul); \ + data =3D FIELD_DP32(data, VDATA, VTA, s->vta); \ tcg_gen_gvec_4_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \ vreg_ofs(s, a->rs1), \ vreg_ofs(s, a->rs2), cpu_env, \ diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 65c86ba2fd..cfc6bd146e 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -1273,6 +1273,9 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, = \ { \ uint32_t vm =3D vext_vm(desc); = \ uint32_t vl =3D env->vl; = \ + uint32_t esz =3D sizeof(TS1); = \ + uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); = \ + uint32_t vta =3D vext_vta(desc); = \ uint32_t i; \ \ for (i =3D env->vstart; i < vl; i++) { = \ @@ -1284,6 +1287,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, = \ *((TS1 *)vd + HS1(i)) =3D OP(s2, s1 & MASK); = \ } \ env->vstart =3D 0; = \ + /* set tail elements to 1s */ \ + vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz); \ } =20 GEN_VEXT_SHIFT_VV(vsll_vv_b, uint8_t, uint8_t, H1, H1, DO_SLL, 0x7) @@ -1308,6 +1313,10 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s= 1, \ { \ uint32_t vm =3D vext_vm(desc); \ uint32_t vl =3D env->vl; \ + uint32_t esz =3D sizeof(TD); \ + uint32_t total_elems =3D \ + vext_get_total_elems(env, desc, esz); \ + uint32_t vta =3D vext_vta(desc); \ uint32_t i; \ \ for (i =3D env->vstart; i < vl; i++) { \ @@ -1318,6 +1327,8 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , \ *((TD *)vd + HD(i)) =3D OP(s2, s1 & MASK); \ } \ env->vstart =3D 0; \ + /* set tail elements to 1s */ \ + vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz);\ } =20 GEN_VEXT_SHIFT_VX(vsll_vx_b, uint8_t, int8_t, H1, H1, DO_SLL, 0x7) --=20 2.34.2