Hi,
We are cleanning up 'o32' code for gcc and kernel. This series only support linux-user emulation.
More about LoongArch at: https://github.com/loongson/
Latest kernel: https://github.com/loongson/linux/tree/loongarch-next
Changes for v5:
* Follow Richard's code review comments [1].
* Use force_sig_fault().
Based-on: <20210822035537.283193-6-richard.henderson@linaro.org>
* Implement setup_sigtramp.
Based-on: <20210618192951.125651-2-richard.henderson@linaro.org>
[1]: https://patchew.org/QEMU/1630586467-22463-1-git-send-email-gaosong@loongson.cn/
Changes for v4:
* Update README，add LoongArch linux-user emulation Introduction.
* Add 'make check-tcg' support(patch 20).
* Add binfmt config(patch 21).
* Fix bugs when running loongarch basic commands.
Changes for v3:
* Split trans.inc.c.
* Remove csr registers.
* Delete patchs 2, 4, 5.
* Follow Richard's code review comments [1].
* Follow Richard's riscv patches [2].
[1]: https://patchew.org/QEMU/1626861198-6133-1-git-send-email-gaosong@loongson.cn/
[2]: https://patchew.org/QEMU/20210823195529.560295-1-richard.henderson@linaro.org/
Changes for v2:
* Patch 1, remove unnecessary introduction;
* Patch 3, follow the ARM/AVR pattern to add new CPU features;
* Patch 6, remove decode_lsx();
* Patches 7-18, delete opcode definition, modify translation function;
* Patches 20-22, split V1 patch20 to V2 patch20-22.
V4: https://patchew.org/QEMU/1630586467-22463-1-git-send-email-gaosong@loongson.cn/
V3: https://patchew.org/QEMU/1630048494-2143-1-git-send-email-gaosong@loongson.cn/
V2: https://patchew.org/QEMU/1626861198-6133-1-git-send-email-gaosong@loongson.cn/
V1: https://patchew.org/QEMU/1624881885-31692-1-git-send-email-gaosong@loongson.cn/
Please review!
Thanks.
Song Gao (21):
target/loongarch: Add README
target/loongarch: Add core definition
target/loongarch: Add main translation routines
target/loongarch: Add fixed point arithmetic instruction translation
target/loongarch: Add fixed point shift instruction translation
target/loongarch: Add fixed point bit instruction translation
target/loongarch: Add fixed point load/store instruction translation
target/loongarch: Add fixed point atomic instruction translation
target/loongarch: Add fixed point extra instruction translation
target/loongarch: Add floating point arithmetic instruction
translation
target/loongarch: Add floating point comparison instruction
translation
target/loongarch: Add floating point conversion instruction
translation
target/loongarch: Add floating point move instruction translation
target/loongarch: Add floating point load/store instruction
translation
target/loongarch: Add branch instruction translation
target/loongarch: Add disassembler
LoongArch Linux User Emulation
default-configs: Add loongarch linux-user support
target/loongarch: Add target build suport
target/loongarch: 'make check-tcg' support
scripts: add loongarch64 binfmt config
MAINTAINERS | 6 +
accel/tcg/user-exec.c | 15 +
configs/targets/loongarch64-linux-user.mak | 3 +
configure | 5 +
disas/loongarch.c | 2511 +++++++++++++++++++++++++++
disas/meson.build | 1 +
include/disas/dis-asm.h | 2 +
include/elf.h | 2 +
linux-user/elfload.c | 58 +
linux-user/host/loongarch/hostdep.h | 11 +
linux-user/loongarch64/cpu_loop.c | 97 ++
linux-user/loongarch64/signal.c | 162 ++
linux-user/loongarch64/sockbits.h | 1 +
linux-user/loongarch64/syscall_nr.h | 312 ++++
linux-user/loongarch64/target_cpu.h | 35 +
linux-user/loongarch64/target_elf.h | 14 +
linux-user/loongarch64/target_errno_defs.h | 7 +
linux-user/loongarch64/target_fcntl.h | 12 +
linux-user/loongarch64/target_signal.h | 30 +
linux-user/loongarch64/target_structs.h | 49 +
linux-user/loongarch64/target_syscall.h | 46 +
linux-user/loongarch64/termbits.h | 1 +
linux-user/syscall_defs.h | 10 +-
meson.build | 3 +-
scripts/qemu-binfmt-conf.sh | 6 +-
target/loongarch/README | 76 +
target/loongarch/cpu-param.h | 19 +
target/loongarch/cpu.c | 286 +++
target/loongarch/cpu.h | 151 ++
target/loongarch/fpu_helper.c | 824 +++++++++
target/loongarch/helper.h | 93 +
target/loongarch/insn_trans/trans_arith.c | 322 ++++
target/loongarch/insn_trans/trans_atomic.c | 133 ++
target/loongarch/insn_trans/trans_bit.c | 255 +++
target/loongarch/insn_trans/trans_branch.c | 85 +
target/loongarch/insn_trans/trans_extra.c | 87 +
target/loongarch/insn_trans/trans_farith.c | 131 ++
target/loongarch/insn_trans/trans_fcmp.c | 59 +
target/loongarch/insn_trans/trans_fcnv.c | 36 +
target/loongarch/insn_trans/trans_fmemory.c | 187 ++
target/loongarch/insn_trans/trans_fmov.c | 153 ++
target/loongarch/insn_trans/trans_memory.c | 235 +++
target/loongarch/insn_trans/trans_shift.c | 131 ++
target/loongarch/insns.decode | 480 +++++
target/loongarch/internals.h | 29 +
target/loongarch/meson.build | 18 +
target/loongarch/op_helper.c | 85 +
target/loongarch/translate.c | 288 +++
target/loongarch/translate.h | 46 +
target/meson.build | 1 +
tests/tcg/configure.sh | 1 +
51 files changed, 7604 insertions(+), 6 deletions(-)
create mode 100644 configs/targets/loongarch64-linux-user.mak
create mode 100644 disas/loongarch.c
create mode 100644 linux-user/host/loongarch/hostdep.h
create mode 100644 linux-user/loongarch64/cpu_loop.c
create mode 100644 linux-user/loongarch64/signal.c
create mode 100644 linux-user/loongarch64/sockbits.h
create mode 100644 linux-user/loongarch64/syscall_nr.h
create mode 100644 linux-user/loongarch64/target_cpu.h
create mode 100644 linux-user/loongarch64/target_elf.h
create mode 100644 linux-user/loongarch64/target_errno_defs.h
create mode 100644 linux-user/loongarch64/target_fcntl.h
create mode 100644 linux-user/loongarch64/target_signal.h
create mode 100644 linux-user/loongarch64/target_structs.h
create mode 100644 linux-user/loongarch64/target_syscall.h
create mode 100644 linux-user/loongarch64/termbits.h
create mode 100644 target/loongarch/README
create mode 100644 target/loongarch/cpu-param.h
create mode 100644 target/loongarch/cpu.c
create mode 100644 target/loongarch/cpu.h
create mode 100644 target/loongarch/fpu_helper.c
create mode 100644 target/loongarch/helper.h
create mode 100644 target/loongarch/insn_trans/trans_arith.c
create mode 100644 target/loongarch/insn_trans/trans_atomic.c
create mode 100644 target/loongarch/insn_trans/trans_bit.c
create mode 100644 target/loongarch/insn_trans/trans_branch.c
create mode 100644 target/loongarch/insn_trans/trans_extra.c
create mode 100644 target/loongarch/insn_trans/trans_farith.c
create mode 100644 target/loongarch/insn_trans/trans_fcmp.c
create mode 100644 target/loongarch/insn_trans/trans_fcnv.c
create mode 100644 target/loongarch/insn_trans/trans_fmemory.c
create mode 100644 target/loongarch/insn_trans/trans_fmov.c
create mode 100644 target/loongarch/insn_trans/trans_memory.c
create mode 100644 target/loongarch/insn_trans/trans_shift.c
create mode 100644 target/loongarch/insns.decode
create mode 100644 target/loongarch/internals.h
create mode 100644 target/loongarch/meson.build
create mode 100644 target/loongarch/op_helper.c
create mode 100644 target/loongarch/translate.c
create mode 100644 target/loongarch/translate.h
--
1.8.3.1