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envelope-from=komlodi@xilinx.com; helo=NAM10-DM6-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: eric.auger@redhat.com, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @xilinx.onmicrosoft.com) X-ZM-MESSAGEID: 1627687105479100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The SMMU should access fault if AF =3D=3D 0 in a TTD, and if AFFD =3D=3D 0 = in the CD. Per the spec, an access fault has a higher priority over a permission fault. For instance, a write to a writable clean (temporarily non-writable) page w= ith AF =3D=3D 0 && AFFD =3D=3D 0 will cause an access fault. If AF =3D=3D 1 in this situation, then a permission fault would occur. Access flag handling is more complicated if HTTU is supported and HA !=3D 0= in the CD, however we currently do not support HTTU. Signed-off-by: Joe Komlodi --- hw/arm/smmu-common.c | 7 +++++++ hw/arm/smmu-internal.h | 8 ++++++++ hw/arm/smmuv3-internal.h | 1 + hw/arm/smmuv3.c | 1 + include/hw/arm/smmu-common.h | 1 + 5 files changed, 18 insertions(+) diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index 0459850..0fcc65c 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -305,6 +305,7 @@ static int smmu_ptw_64(SMMUTransCfg *cfg, uint64_t pte, gpa; dma_addr_t pte_addr =3D baseaddr + offset * sizeof(pte); uint8_t ap; + bool af; =20 if (get_pte(baseaddr, offset, &pte, info)) { goto error; @@ -341,6 +342,12 @@ static int smmu_ptw_64(SMMUTransCfg *cfg, pte_addr, pte, iova, gpa, block_size >> 20); } + af =3D PTE_AF(pte); + if (is_access_fault(af, perm)) { + info->type =3D SMMU_PTW_ERR_ACCESS; + goto error; + } + ap =3D PTE_AP(pte); if (is_permission_fault(ap, perm)) { info->type =3D SMMU_PTW_ERR_PERMISSION; diff --git a/hw/arm/smmu-internal.h b/hw/arm/smmu-internal.h index 2d75b31..9d3b22c 100644 --- a/hw/arm/smmu-internal.h +++ b/hw/arm/smmu-internal.h @@ -58,6 +58,11 @@ ((level =3D=3D 3) && = \ ((pte & ARM_LPAE_PTE_TYPE_MASK) =3D=3D ARM_LPAE_L3_PTE_TYPE_PAGE)) =20 +/* access flag */ + +#define PTE_AF(pte) \ + (extract64(pte, 10, 1)) + /* access permissions */ =20 #define PTE_AP(pte) \ @@ -66,6 +71,9 @@ #define PTE_APTABLE(pte) \ (extract64(pte, 61, 2)) =20 +#define is_access_fault(af, cfg) \ + (!cfg->affd && !af) + /* * TODO: At the moment all transactions are considered as privileged (EL1) * as IOMMU translation callback does not pass user/priv attributes. diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h index d1885ae..0ccad1d 100644 --- a/hw/arm/smmuv3-internal.h +++ b/hw/arm/smmuv3-internal.h @@ -587,6 +587,7 @@ static inline int pa_range(STE *ste) #define CD_EPD(x, sel) extract32((x)->word[0], (16 * (sel)) + 14, 1) #define CD_ENDI(x) extract32((x)->word[0], 15, 1) #define CD_IPS(x) extract32((x)->word[1], 0 , 3) +#define CD_AFFD(x) extract32((x)->word[1], 3 , 1) #define CD_TBI(x) extract32((x)->word[1], 6 , 2) #define CD_HD(x) extract32((x)->word[1], 10 , 1) #define CD_HA(x) extract32((x)->word[1], 11 , 1) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 01b60be..df5a194 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -483,6 +483,7 @@ static int decode_cd(SMMUTransCfg *cfg, CD *cd, SMMUEve= ntInfo *event) cfg->oas =3D MIN(oas2bits(SMMU_IDR5_OAS), cfg->oas); cfg->tbi =3D CD_TBI(cd); cfg->asid =3D CD_ASID(cd); + cfg->affd =3D CD_AFFD(cd); =20 trace_smmuv3_decode_cd(cfg->oas); =20 diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h index 706be3c..b0e82ad 100644 --- a/include/hw/arm/smmu-common.h +++ b/include/hw/arm/smmu-common.h @@ -71,6 +71,7 @@ typedef struct SMMUTransCfg { bool disabled; /* smmu is disabled */ bool bypassed; /* translation is bypassed */ bool aborted; /* translation is aborted */ + bool affd; /* Access Flag Fault Disabled */ uint64_t ttb; /* TT base address */ uint8_t oas; /* output address width */ uint8_t tbi; /* Top Byte Ignore */ --=20 2.7.4