From nobody Mon Feb 9 06:02:04 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=huawei.com ARC-Seal: i=1; a=rsa-sha256; t=1621914789; cv=none; d=zohomail.com; s=zohoarc; b=TygLQBtjdc2FEbPGhInCwTrNICIn1iW00X4eymmi/tLNomx5LWbUclPmf77eCTiIr2sPgduPKsKfldJsEMD/+PiDqSoAqTUNW4aNo1MUYoNe1D4jh0sG+5x8qCsqYQi0bOGkqcHYR0U81tbrzexk5Sid3P+phRKrIf0l18zW/BE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621914789; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=fiRvEFY3hxaFndll+CkEp16cvesStK3ZUsRmTanX3XM=; b=KAVfK0R/DHAoign7BonfatYJkI3yH30u9mP+DEpQmwGxkA9XptcQt45tGgy0S6mMH6memh6g0iid3rZdLm6gaZ4DpelBzcAvWRObfnUTJk2s3+IPPhbfIvFiDOpUkZJJUfb3ill5sAv4ytNLypdPVAKy/58WzwV139d6aBTHtkE= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1621914789475904.0341179921676; Mon, 24 May 2021 20:53:09 -0700 (PDT) Received: from localhost ([::1]:50958 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1llO7w-00069Z-Ga for importer@patchew.org; Mon, 24 May 2021 23:53:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57636) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1llO5L-0006OL-IO; Mon, 24 May 2021 23:50:27 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:4580) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1llO5H-0001qd-FY; Mon, 24 May 2021 23:50:27 -0400 Received: from dggems704-chm.china.huawei.com (unknown [172.30.72.58]) by szxga06-in.huawei.com (SkyGuard) with ESMTP id 4Fq0R320wDzmbJQ; Tue, 25 May 2021 11:47:59 +0800 (CST) Received: from dggpemm500009.china.huawei.com (7.185.36.225) by dggems704-chm.china.huawei.com (10.3.19.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Tue, 25 May 2021 11:50:12 +0800 Received: from huawei.com (10.174.185.226) by dggpemm500009.china.huawei.com (7.185.36.225) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Tue, 25 May 2021 11:50:11 +0800 From: Wang Xingang To: , , , , , , , , , , Subject: [PATCH v4 1/8] hw/pci/pci_host: Allow bypass iommu for pci host Date: Tue, 25 May 2021 03:49:58 +0000 Message-ID: <1621914605-14724-2-git-send-email-wangxingang5@huawei.com> X-Mailer: git-send-email 2.6.4.windows.1 In-Reply-To: <1621914605-14724-1-git-send-email-wangxingang5@huawei.com> References: <1621914605-14724-1-git-send-email-wangxingang5@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.185.226] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To dggpemm500009.china.huawei.com (7.185.36.225) X-CFilter-Loop: Reflected Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=45.249.212.32; envelope-from=wangxingang5@huawei.com; helo=szxga06-in.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: xieyingtai@huawei.com, wangxingang5@huawei.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Xingang Wang This add a bypass_iommu property for pci host, which indicates whether devices attached to the pci root bus will bypass iommu. In pci_device_iommu_address_space(), add a bypass_iommu check to avoid getting iommu address space for devices bypass iommu. Signed-off-by: Xingang Wang Reviewed-by: Eric Auger --- hw/pci/pci.c | 18 +++++++++++++++++- hw/pci/pci_host.c | 2 ++ include/hw/pci/pci.h | 1 + include/hw/pci/pci_host.h | 1 + 4 files changed, 21 insertions(+), 1 deletion(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 377084f1a8..27d588e268 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -416,6 +416,22 @@ const char *pci_root_bus_path(PCIDevice *dev) return rootbus->qbus.name; } =20 +bool pci_bus_bypass_iommu(PCIBus *bus) +{ + PCIBus *rootbus =3D bus; + PCIHostState *host_bridge; + + if (!pci_bus_is_root(bus)) { + rootbus =3D pci_device_root_bus(bus->parent_dev); + } + + host_bridge =3D PCI_HOST_BRIDGE(rootbus->qbus.parent); + + assert(host_bridge->bus =3D=3D rootbus); + + return host_bridge->bypass_iommu; +} + static void pci_root_bus_init(PCIBus *bus, DeviceState *parent, MemoryRegion *address_space_mem, MemoryRegion *address_space_io, @@ -2718,7 +2734,7 @@ AddressSpace *pci_device_iommu_address_space(PCIDevic= e *dev) =20 iommu_bus =3D parent_bus; } - if (iommu_bus && iommu_bus->iommu_fn) { + if (!pci_bus_bypass_iommu(bus) && iommu_bus && iommu_bus->iommu_fn) { return iommu_bus->iommu_fn(bus, iommu_bus->iommu_opaque, devfn); } return &address_space_memory; diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c index 8ca5fadcbd..2768db53e6 100644 --- a/hw/pci/pci_host.c +++ b/hw/pci/pci_host.c @@ -222,6 +222,8 @@ const VMStateDescription vmstate_pcihost =3D { static Property pci_host_properties_common[] =3D { DEFINE_PROP_BOOL("x-config-reg-migration-enabled", PCIHostState, mig_enabled, true), + DEFINE_PROP_BOOL("pci-host-bypass-iommu", PCIHostState, + bypass_iommu, false), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 6be4e0c460..f4d51b672b 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -480,6 +480,7 @@ void pci_for_each_bus(PCIBus *bus, =20 PCIBus *pci_device_root_bus(const PCIDevice *d); const char *pci_root_bus_path(PCIDevice *dev); +bool pci_bus_bypass_iommu(PCIBus *bus); PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn); int pci_qdev_find_device(const char *id, PCIDevice **pdev); void pci_bus_get_w64_range(PCIBus *bus, Range *range); diff --git a/include/hw/pci/pci_host.h b/include/hw/pci/pci_host.h index 52e038c019..c6f4eb4585 100644 --- a/include/hw/pci/pci_host.h +++ b/include/hw/pci/pci_host.h @@ -43,6 +43,7 @@ struct PCIHostState { uint32_t config_reg; bool mig_enabled; PCIBus *bus; + bool bypass_iommu; =20 QLIST_ENTRY(PCIHostState) next; }; --=20 2.19.1