From nobody Mon Feb 9 16:34:47 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail header.i=@quicinc.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=quicinc.com ARC-Seal: i=1; a=rsa-sha256; t=1617847356; cv=none; d=zohomail.com; s=zohoarc; b=TRjjnpkZnrA5q0+Ojt0vT0WZzh1qGtgPCPy2qgsBn1HR6FfYb7+cx9V6Ew7aIxQcaykl1Q6J4zcs14CLpRGhXkxyTob3bryKBCvztxe1HXoFs9EP/yYGrMCTId1bSaHKm5XyIC077i0bW9ntm1ZcTfcVOu5vNhYSuUBiQqb09mk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1617847356; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=NWeDatjTt897q6B/obiEIJ/JSXb13VxXrZumoLHJrpk=; b=FPKEo5HjGlV72g90OGKbZerJJJuiXi4CgCFk9Vdmo4bzT7pesYJUI5ScFNLW2ygJ6Ak9MGA5Gs9T77L5Hk3A2Pvm1sLEJ2q+EU9muDWxC6oBClWgkCIqZfzs3GOeLedOguxtaPNQF4A2SRuppSwosf9vU0mlpwKa3jYrPK82aPg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail header.i=@quicinc.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1617847356832172.39793175072805; Wed, 7 Apr 2021 19:02:36 -0700 (PDT) Received: from localhost ([::1]:35212 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lUK0B-00056r-Nb for importer@patchew.org; Wed, 07 Apr 2021 22:02:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37978) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lUJvy-0008EP-AO for qemu-devel@nongnu.org; Wed, 07 Apr 2021 21:58:14 -0400 Received: from alexa-out-sd-01.qualcomm.com ([199.106.114.38]:37875) by eggs.gnu.org with esmtps (TLS1.2:RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1lUJvk-0005z6-Ny for qemu-devel@nongnu.org; Wed, 07 Apr 2021 21:58:13 -0400 Received: from unknown (HELO ironmsg05-sd.qualcomm.com) ([10.53.140.145]) by alexa-out-sd-01.qualcomm.com with ESMTP; 07 Apr 2021 18:57:56 -0700 Received: from vu-tsimpson-aus.qualcomm.com (HELO vu-tsimpson1-aus.qualcomm.com) ([10.222.150.1]) by ironmsg05-sd.qualcomm.com with ESMTP; 07 Apr 2021 18:57:55 -0700 Received: by vu-tsimpson1-aus.qualcomm.com (Postfix, from userid 47164) id BD6F016EA; Wed, 7 Apr 2021 20:57:54 -0500 (CDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1617847080; x=1649383080; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rF1LyBcQY5mZn57QEzE60g0in08h1M+AwzZmnGg9o6k=; b=T7oecakKgJ+ZvfQ1wtWFMfaVDEutd2TaLtsAOsdlR+fsYyUsUKTLT/7k cjtwtu3tKnkEeU/Fn/Ofd4yu3L+fxGaqTKH3fWdx7vZQj2dWj/Rr26BM1 F215YREpMwMkH0j8pDnLedYF8uvr6gzJ2KI0+ZJrgs482ajBoWDRsiNo+ Q=; X-QCInternal: smtphost From: Taylor Simpson To: qemu-devel@nongnu.org Subject: [PATCH v3 06/26] Hexagon (target/hexagon) decide if pred has been written at TCG gen time Date: Wed, 7 Apr 2021 20:57:27 -0500 Message-Id: <1617847067-9867-7-git-send-email-tsimpson@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1617847067-9867-1-git-send-email-tsimpson@quicinc.com> References: <1617847067-9867-1-git-send-email-tsimpson@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=199.106.114.38; envelope-from=tsimpson@qualcomm.com; helo=alexa-out-sd-01.qualcomm.com X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ale@rev.ng, philmd@redhat.com, tsimpson@quicinc.com, richard.henderson@linaro.org, bcain@quicinc.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Multiple writes to the same preg are and'ed together. Rather than generating a runtime check, we can determine at TCG generation time if the predicate has previously been written in the packet. Test added to tests/tcg/hexagon/misc.c Suggested-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg_funcs.py | 2 +- target/hexagon/genptr.c | 22 +++++++++++++++------- target/hexagon/translate.c | 9 +++++++-- target/hexagon/translate.h | 2 ++ tests/tcg/hexagon/misc.c | 19 +++++++++++++++++++ 5 files changed, 44 insertions(+), 10 deletions(-) diff --git a/target/hexagon/gen_tcg_funcs.py b/target/hexagon/gen_tcg_funcs= .py index db9f663..7ceb25b 100755 --- a/target/hexagon/gen_tcg_funcs.py +++ b/target/hexagon/gen_tcg_funcs.py @@ -316,7 +316,7 @@ def genptr_dst_write(f, tag, regtype, regid): print("Bad register parse: ", regtype, regid) elif (regtype =3D=3D "P"): if (regid in {"d", "e", "x"}): - f.write(" gen_log_pred_write(%s%sN, %s%sV);\n" % \ + f.write(" gen_log_pred_write(ctx, %s%sN, %s%sV);\n" % \ (regtype, regid, regtype, regid)) f.write(" ctx_log_pred_write(ctx, %s%sN);\n" % \ (regtype, regid)) diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c index 07d970f..6b74344 100644 --- a/target/hexagon/genptr.c +++ b/target/hexagon/genptr.c @@ -119,20 +119,28 @@ static void gen_log_reg_write_pair(int rnum, TCGv_i64= val) #endif } =20 -static inline void gen_log_pred_write(int pnum, TCGv val) +static inline void gen_log_pred_write(DisasContext *ctx, int pnum, TCGv va= l) { TCGv zero =3D tcg_const_tl(0); TCGv base_val =3D tcg_temp_new(); TCGv and_val =3D tcg_temp_new(); TCGv pred_written =3D tcg_temp_new(); =20 - /* Multiple writes to the same preg are and'ed together */ tcg_gen_andi_tl(base_val, val, 0xff); - tcg_gen_and_tl(and_val, base_val, hex_new_pred_value[pnum]); - tcg_gen_andi_tl(pred_written, hex_pred_written, 1 << pnum); - tcg_gen_movcond_tl(TCG_COND_NE, hex_new_pred_value[pnum], - pred_written, zero, - and_val, base_val); + + /* + * Section 6.1.3 of the Hexagon V67 Programmer's Reference Manual + * + * Multiple writes to the same preg are and'ed together + * If this is the first predicate write in the packet, do a + * straight assignment. Otherwise, do an and. + */ + if (!test_bit(pnum, ctx->pregs_written)) { + tcg_gen_mov_tl(hex_new_pred_value[pnum], base_val); + } else { + tcg_gen_and_tl(hex_new_pred_value[pnum], + hex_new_pred_value[pnum], base_val); + } tcg_gen_ori_tl(hex_pred_written, hex_pred_written, 1 << pnum); =20 tcg_temp_free(zero); diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index 9f2a531..49ec8b7 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -172,6 +172,7 @@ static void gen_start_packet(DisasContext *ctx, Packet = *pkt) ctx->reg_log_idx =3D 0; bitmap_zero(ctx->regs_written, TOTAL_PER_THREAD_REGS); ctx->preg_log_idx =3D 0; + bitmap_zero(ctx->pregs_written, NUM_PREGS); for (i =3D 0; i < STORES_MAX; i++) { ctx->store_width[i] =3D 0; } @@ -226,7 +227,7 @@ static void mark_implicit_pred_write(DisasContext *ctx,= Insn *insn, } } =20 -static void mark_implicit_writes(DisasContext *ctx, Insn *insn) +static void mark_implicit_reg_writes(DisasContext *ctx, Insn *insn) { mark_implicit_reg_write(ctx, insn, A_IMPLICIT_WRITES_FP, HEX_REG_FP); mark_implicit_reg_write(ctx, insn, A_IMPLICIT_WRITES_SP, HEX_REG_SP); @@ -235,7 +236,10 @@ static void mark_implicit_writes(DisasContext *ctx, In= sn *insn) mark_implicit_reg_write(ctx, insn, A_IMPLICIT_WRITES_SA0, HEX_REG_SA0); mark_implicit_reg_write(ctx, insn, A_IMPLICIT_WRITES_LC1, HEX_REG_LC1); mark_implicit_reg_write(ctx, insn, A_IMPLICIT_WRITES_SA1, HEX_REG_SA1); +} =20 +static void mark_implicit_pred_writes(DisasContext *ctx, Insn *insn) +{ mark_implicit_pred_write(ctx, insn, A_IMPLICIT_WRITES_P0, 0); mark_implicit_pred_write(ctx, insn, A_IMPLICIT_WRITES_P1, 1); mark_implicit_pred_write(ctx, insn, A_IMPLICIT_WRITES_P2, 2); @@ -246,8 +250,9 @@ static void gen_insn(CPUHexagonState *env, DisasContext= *ctx, Insn *insn, Packet *pkt) { if (insn->generate) { - mark_implicit_writes(ctx, insn); + mark_implicit_reg_writes(ctx, insn); insn->generate(env, ctx, insn, pkt); + mark_implicit_pred_writes(ctx, insn); } else { gen_exception_end_tb(ctx, HEX_EXCP_INVALID_OPCODE); } diff --git a/target/hexagon/translate.h b/target/hexagon/translate.h index 12506c8..0ecfbd7 100644 --- a/target/hexagon/translate.h +++ b/target/hexagon/translate.h @@ -34,6 +34,7 @@ typedef struct DisasContext { DECLARE_BITMAP(regs_written, TOTAL_PER_THREAD_REGS); int preg_log[PRED_WRITES_MAX]; int preg_log_idx; + DECLARE_BITMAP(pregs_written, NUM_PREGS); uint8_t store_width[STORES_MAX]; uint8_t s1_store_processed; } DisasContext; @@ -60,6 +61,7 @@ static inline void ctx_log_pred_write(DisasContext *ctx, = int pnum) { ctx->preg_log[ctx->preg_log_idx] =3D pnum; ctx->preg_log_idx++; + set_bit(pnum, ctx->pregs_written); } =20 static inline bool is_preloaded(DisasContext *ctx, int num) diff --git a/tests/tcg/hexagon/misc.c b/tests/tcg/hexagon/misc.c index 458759f..e5d78b4 100644 --- a/tests/tcg/hexagon/misc.c +++ b/tests/tcg/hexagon/misc.c @@ -264,6 +264,22 @@ static long long creg_pair(int x, int y) return retval; } =20 +/* Check that predicates are auto-and'ed in a packet */ +static int auto_and(void) +{ + int retval; + asm ("r5 =3D #1\n\t" + "{\n\t" + " p0 =3D cmp.eq(r1, #1)\n\t" + " p0 =3D cmp.eq(r1, #2)\n\t" + "}\n\t" + "%0 =3D p0\n\t" + : "=3Dr"(retval) + : + : "r5", "p0"); + return retval; +} + int main() { =20 @@ -375,6 +391,9 @@ int main() res =3D test_clrtnew(2, 7); check(res, 7); =20 + res =3D auto_and(); + check(res, 0); + puts(err ? "FAIL" : "PASS"); return err; } --=20 2.7.4