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[147.11.124.94]) by smtp.gmail.com with ESMTPSA id s6sm11089546ild.45.2021.01.19.05.40.16 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Jan 2021 05:40:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=CwVyKj0nLazpAlMHIq5E4YX2HLtnW6e2Pi2ImRJMI34=; b=ZArDqVFUHgXs7fESjXtQHhu/ckVThhSTT7nyAI/3j+djLcsETDnNhF6tBQb+ndSYYQ ZTWfa9RVP9kzLS+EM9s55P6Zfop+rvA5AXlrf8dTZahWZsKjXCQUzy0zp6klYqJ83jD+ sCiRopyjfB5Mn2tXf/6lla8T/8ZgbdHJ73lD3VusnUzgY8hd5JpOBxB+6jw+pG2zvJ0P nPELOth0epns+G95tsmn0Mt5/YMz4QpnTf9HyLVsv2zBpW1EmhQwrpq+bvruapguabMK fgwp5ljzUfBYJaSr/4qMFnT87rhR6R172ZTR8jcAyrHH+OoK5/Ls8Pr1O5QFYHoRSgfO K6fQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=CwVyKj0nLazpAlMHIq5E4YX2HLtnW6e2Pi2ImRJMI34=; b=HfWucHryNEu9wLJ7zPxyKH+oWIpM2+v0QJarkQU6NAsK+8JkDFS8UvvpeXgblhVvW5 +SWB8SDNF85jLu9xhDcifI5P+vGy/+6wgV84GCZ60B9zSKm3b+RlolADuGflvIPa6HTZ yuld5oG0q4Luww7JPFdcesvC0OeJ/icVukEQpQ3ocmNXbk5Aa8obQEQfytCZ2x8uQyia zyoFaeDHeV2cXuVDR0gsGCHJa415E9iERLle3GyYiyMAOpoZEX6etqoP7KJkoLJuzccs xYjagCEzvZ6zj2YV11bcTjyq7HvNQH6l6itYKSX8yrDsdT74YX+CtfTz/xRAMe+ybvHR EAnA== X-Gm-Message-State: AOAM532ZYYroF6WiWV2MUOSJIksfbp5Y0hCevsvk0SVsgZXGeJ2ZV4p5 6hlG+AAY1yDLUNFvBCD2OceEzAftBBA= X-Google-Smtp-Source: ABdhPJxgHn6q9c7lcmA4lyuWlxeyqCYE8qLfq6IxpXG9jWZvKtHyAS/czLgsE2qWKVkx2MSlMKe+8Q== X-Received: by 2002:a05:6e02:12cc:: with SMTP id i12mr3341876ilm.113.1611063619499; Tue, 19 Jan 2021 05:40:19 -0800 (PST) From: Bin Meng To: Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jean-Christophe Dubois , Alistair Francis Subject: [PATCH v8 02/10] hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset() Date: Tue, 19 Jan 2021 21:38:58 +0800 Message-Id: <1611063546-20278-3-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1611063546-20278-1-git-send-email-bmeng.cn@gmail.com> References: <1611063546-20278-1-git-send-email-bmeng.cn@gmail.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::d2a; envelope-from=bmeng.cn@gmail.com; helo=mail-io1-xd2a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bin Meng , qemu-arm@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Bin Meng Usually the approach is that the device on the other end of the line is going to reset its state anyway, so there's no need to actively signal an irq line change during the reset hook. Move imx_spi_update_irq() out of imx_spi_reset(), to a new function imx_spi_soft_reset() that is called when the controller is disabled. Signed-off-by: Bin Meng Reviewed-by: Peter Maydell --- (no changes since v5) Changes in v5: - rename imx_spi_hard_reset() to imx_spi_soft_reset() Changes in v4: - adujst the patch 2,3 order - rename imx_spi_soft_reset() to imx_spi_hard_reset() to avoid confusion Changes in v3: - new patch: remove imx_spi_update_irq() in imx_spi_reset() hw/ssi/imx_spi.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c index e605049..4d488b1 100644 --- a/hw/ssi/imx_spi.c +++ b/hw/ssi/imx_spi.c @@ -241,11 +241,16 @@ static void imx_spi_reset(DeviceState *dev) imx_spi_rxfifo_reset(s); imx_spi_txfifo_reset(s); =20 - imx_spi_update_irq(s); - s->burst_length =3D 0; } =20 +static void imx_spi_soft_reset(IMXSPIState *s) +{ + imx_spi_reset(DEVICE(s)); + + imx_spi_update_irq(s); +} + static uint64_t imx_spi_read(void *opaque, hwaddr offset, unsigned size) { uint32_t value =3D 0; @@ -351,8 +356,9 @@ static void imx_spi_write(void *opaque, hwaddr offset, = uint64_t value, s->regs[ECSPI_CONREG] =3D value; =20 if (!imx_spi_is_enabled(s)) { - /* device is disabled, so this is a reset */ - imx_spi_reset(DEVICE(s)); + /* device is disabled, so this is a soft reset */ + imx_spi_soft_reset(s); + return; } =20 --=20 2.7.4