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Mon, 26 Oct 2020 21:43:02 +0800 (CST) Received: from huawei.com (10.175.101.6) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Mon, 26 Oct 2020 21:42:49 +0800 From: Chuan Zheng To: , Subject: [PATCH v1 2/4] migration/debug: Implement migration memory consistency check Date: Mon, 26 Oct 2020 21:58:43 +0800 Message-ID: <1603720725-81206-3-git-send-email-zhengchuan@huawei.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1603720725-81206-1-git-send-email-zhengchuan@huawei.com> References: <1603720725-81206-1-git-send-email-zhengchuan@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.101.6] X-CFilter-Loop: Reflected Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=45.249.212.190; envelope-from=zhengchuan@huawei.com; helo=szxga04-in.huawei.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/26 07:55:44 X-ACL-Warn: Detected OS = Linux 3.1-3.10 [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yubihong@huawei.com, zhang.zhanghailiang@huawei.com, qemu-devel@nongnu.org, xiexiangyou@huawei.com, alex.chen@huawei.com, wanghao232@huawei.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Traverse all migratable ramblocks, calculate sha256 for memory consistency = check Signed-off-by: Chuan Zheng --- migration/ram.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++ migration/ram.h | 7 ++++++ 2 files changed, 80 insertions(+) diff --git a/migration/ram.c b/migration/ram.c index aa39908..f04594e 100644 --- a/migration/ram.c +++ b/migration/ram.c @@ -55,6 +55,8 @@ #include "sysemu/cpu-throttle.h" #include "savevm.h" #include "qemu/iov.h" +#include "crypto/hash.h" +#include "qemu/typedefs.h" #include "multifd.h" =20 /***********************************************************/ @@ -198,6 +200,77 @@ int foreach_not_ignored_block(RAMBlockIterFunc func, v= oid *opaque) return ret; } =20 +#define SHA256_DIGEST_LENGTH 32 +#define SHA256_CHUNK_SIZE 0x80000000 + +static void ram_debug_dump_sha256(uint8_t *md, const char *idstr, + const char *prefix) +{ + int i; + char buf[2 * SHA256_DIGEST_LENGTH + 1] =3D { 0 }; + + for (i =3D 0; i < SHA256_DIGEST_LENGTH; i++) { + sprintf(&buf[2 * i], "%02x", md[i]); + } + + fprintf(stderr, "CheckPoint: %s, Ramblock: %s, CheckValue: %s\n", + prefix, idstr, buf); +} + +static void ram_debug_calc_sha256(RAMBlock *block, const char *idstr, + const char *prefix) +{ + uint8_t *md =3D NULL; + size_t sha256_len; + size_t i, niov; + void *addr =3D NULL; + ram_addr_t remaining =3D 0; + size_t resultlen =3D 0; + struct iovec *iov_array =3D NULL; + + sha256_len =3D qcrypto_hash_digest_len(QCRYPTO_HASH_ALG_SHA256); + assert(sha256_len =3D=3D SHA256_DIGEST_LENGTH); + + niov =3D DIV_ROUND_UP(qemu_ram_get_used_length(block), SHA256_CHUNK_SI= ZE); + iov_array =3D g_malloc0_n(niov, sizeof(struct iovec)); + + addr =3D qemu_ram_get_host_addr(block); + remaining =3D qemu_ram_get_used_length(block); + for (i =3D 0; i < niov; i++) { + iov_array[i].iov_base =3D addr; + iov_array[i].iov_len =3D MIN(SHA256_CHUNK_SIZE, remaining); + addr +=3D SHA256_CHUNK_SIZE; + remaining -=3D SHA256_CHUNK_SIZE; + } + + if (qcrypto_hash_bytesv(QCRYPTO_HASH_ALG_SHA256, + iov_array, niov, + &md, &resultlen, NULL) || !md) { + fprintf(stderr, "Consistency check(%s) calc failed.\n", prefix); + goto out; + } + + ram_debug_dump_sha256(md, idstr, prefix); + +out: + g_free(iov_array); +} + +static int ram_debug_consistency(RAMBlock *block, void *opaque) +{ + const char *prefix =3D opaque; + const char *idstr =3D qemu_ram_get_idstr(block); + + ram_debug_calc_sha256(block, idstr, prefix); + + return 0; +} + +void migration_debug_ram_consistency(const char *prefix) +{ + foreach_migratable_block(ram_debug_consistency, (void *)prefix); +} + static void ramblock_recv_map_init(void) { RAMBlock *rb; diff --git a/migration/ram.h b/migration/ram.h index 011e854..d73de6e 100644 --- a/migration/ram.h +++ b/migration/ram.h @@ -47,6 +47,13 @@ bool ramblock_is_ignored(RAMBlock *block); INTERNAL_RAMBLOCK_FOREACH(block) \ if (!qemu_ram_is_migratable(block)) {} else =20 +void migration_debug_ram_consistency(const char *prefix); + +#define MIGRATION_RAM_CONSISTENCY_CHECK() \ +do { \ + migration_debug_ram_consistency(__func__); \ +} while (0) + int xbzrle_cache_resize(int64_t new_size, Error **errp); uint64_t ram_bytes_remaining(void); uint64_t ram_bytes_total(void); --=20 1.8.3.1