From nobody Mon Feb 9 11:51:18 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1602103128; cv=none; d=zohomail.com; s=zohoarc; b=Rzf7O/ZaXbrE8Ie1De7YzWpVuC0Ki5zOkiWBEs3YUo24B60T2fTbdk1JLanUgZTw7y3q186xs5rKu4wMRxiW/iRJDeBzRY09wKHjg7TaHM+A3cuX44H1NHZ6hWOIcgLKQlkncysQQ5wkmWYlQmpHL2dnm+7BXZG5XkpZSrSRm00= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1602103128; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=EKtvPHZiQ6oYWEIEFjZg8EoMRM75qY1XkqdS1cjxQJA=; b=OjqjaoNNGn9QWe9JSHXXyNmAk6hCcBcezGu5on8EXtIdPsiI5Hy8LqTVNPORIlqNWOx6Vp4ekf+ocDFXDKqzLCkj1qiDasGINEOi1tpxMNRl39hST22wpcv/RNqjhph21u1zpLoL611ckJI4sFaDP0boZf0M9opuYMt0fUaz3vQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1602103128331485.4919120335635; Wed, 7 Oct 2020 13:38:48 -0700 (PDT) Received: from localhost ([::1]:55792 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kQGD0-0001fa-Vl for importer@patchew.org; Wed, 07 Oct 2020 16:38:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40280) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kQGBq-0000L7-FA for qemu-devel@nongnu.org; Wed, 07 Oct 2020 16:37:34 -0400 Received: from mail-wm1-x344.google.com ([2a00:1450:4864:20::344]:36191) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kQGBo-0000fU-Md for qemu-devel@nongnu.org; Wed, 07 Oct 2020 16:37:34 -0400 Received: by mail-wm1-x344.google.com with SMTP id e2so4035587wme.1 for ; Wed, 07 Oct 2020 13:37:32 -0700 (PDT) Received: from rtrkw774-lin.syrmia.com ([46.240.135.226]) by smtp.gmail.com with ESMTPSA id d2sm4359083wro.34.2020.10.07.13.37.30 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 07 Oct 2020 13:37:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EKtvPHZiQ6oYWEIEFjZg8EoMRM75qY1XkqdS1cjxQJA=; b=Xhtb3k0utshMnCq3uWDI6Ke5JrKy6Mjwl0uzU6QNaXPz9GrDNdZRVU+OElqlClgqBF Vi5hdmGK3IqPiTNR3KVVrDm6DrZP4tS0vJyv8l6Q5Qfo5Ts3o6EsVXK3cabwo8DqKEhJ Gzsm5Wn3dq9aQAJoAq7zXTvhp9yLhfne2oWJAbQULPKGhrjMNvAmfZZZaO6BAYqtkiIo S0wCb6DB1JT6yZ/7ZivOC0daYCuTICu+yUK9OfJ7YRacMHXgyhOiscHqqD0wqXyS7qtq zEUd2gGVTx1G5JGn6z2ZkqN6KnHM/diImQblLwGT9ApUpF6/JZSae5Gspln9Bi8tGH12 ZiJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=EKtvPHZiQ6oYWEIEFjZg8EoMRM75qY1XkqdS1cjxQJA=; b=k69blzYBryNpmMYezMHJzFBIADf4vqSZUTTjG5SEkjbCElYCjuflUFgEDqNzWV3+/w PFpEIyRQtogoJgL4a8hFwayaby8ssieEDpNeiqRAAXfnJcMsxB8HEGkGQP9bDfpgsz9N WeJTl7eBNCGYfHTfXGlbcqRJoX9aMiZpTmun1NzbAgYIZK73hPUCgikAP7ytTq8363wN V6D7n8txx1Pput9l/CEd3AU1BIR1XuJKDLAwk1xNuM+iKgnu7qylW4J+tfxM+4iIDaeu gJdMmsfeo90rokuATp+1FzmFDmLUquk9WnnNyQef/JT0GKpzjoQacs5V/wZg75uYJ9ga 0Z9A== X-Gm-Message-State: AOAM5319bAbLXELt4mTykSsOJZeWmsFviJ42Kgk5RnhqYw08bfhTFzq1 cI1mXFg36K8hTOD2Rdjp09znM+gw4aA= X-Google-Smtp-Source: ABdhPJyLTzyA5/TNTgdo1eEhawPxOxeBq0VB4ORkxFqOv54rPvCAEsGkDCxkKW13hBV2vxHy982Hww== X-Received: by 2002:a1c:4904:: with SMTP id w4mr4774432wma.99.1602103051267; Wed, 07 Oct 2020 13:37:31 -0700 (PDT) From: Aleksandar Markovic To: qemu-devel@nongnu.org Subject: [PATCH v2 4/5] target/mips: Refactor helpers for fp comparison instructions Date: Wed, 7 Oct 2020 22:37:20 +0200 Message-Id: <1602103041-32017-5-git-send-email-aleksandar.qemu.devel@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1602103041-32017-1-git-send-email-aleksandar.qemu.devel@gmail.com> References: <1602103041-32017-1-git-send-email-aleksandar.qemu.devel@gmail.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::344; envelope-from=aleksandar.qemu.devel@gmail.com; helo=mail-wm1-x344.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, aleksandar.rikalo@syrmia.com, f4bug@amsat.org, jiaxun.yang@flygoat.com, Aleksandar Markovic , hpoussin@reactos.org, chenhc@lemote.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This change causes slighlty better performance of emulation of fp comparison instructions via better compiler optimization of refactored code. The functionality is otherwise unchanged. Signed-off-by: Aleksandar Markovic --- target/mips/fpu_helper.c | 56 +++++++++++++++++++++++++++-----------------= ---- 1 file changed, 32 insertions(+), 24 deletions(-) diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c index 6cc956c..8d48a5b 100644 --- a/target/mips/fpu_helper.c +++ b/target/mips/fpu_helper.c @@ -1780,11 +1780,12 @@ void helper_cmp_d_ ## op(CPUMIPSState *env, uint64_= t fdt0, \ { \ int c; \ c =3D cond; \ - update_fcr31(env, GETPC()); \ - if (c) \ + if (c) { \ SET_FP_COND(cc, env->active_fpu); \ - else \ + } else { \ CLEAR_FP_COND(cc, env->active_fpu); \ + } \ + update_fcr31(env, GETPC()); \ } \ void helper_cmpabs_d_ ## op(CPUMIPSState *env, uint64_t fdt0, \ uint64_t fdt1, int cc) \ @@ -1793,11 +1794,12 @@ void helper_cmpabs_d_ ## op(CPUMIPSState *env, uint= 64_t fdt0, \ fdt0 =3D float64_abs(fdt0); \ fdt1 =3D float64_abs(fdt1); \ c =3D cond; \ - update_fcr31(env, GETPC()); \ - if (c) \ + if (c) { \ SET_FP_COND(cc, env->active_fpu); \ - else \ + } else { \ CLEAR_FP_COND(cc, env->active_fpu); \ + } \ + update_fcr31(env, GETPC()); \ } =20 /* @@ -1859,11 +1861,12 @@ void helper_cmp_s_ ## op(CPUMIPSState *env, uint32_= t fst0, \ { \ int c; \ c =3D cond; \ - update_fcr31(env, GETPC()); \ - if (c) \ + if (c) { \ SET_FP_COND(cc, env->active_fpu); \ - else \ + } else { \ CLEAR_FP_COND(cc, env->active_fpu); \ + } \ + update_fcr31(env, GETPC()); \ } \ void helper_cmpabs_s_ ## op(CPUMIPSState *env, uint32_t fst0, \ uint32_t fst1, int cc) \ @@ -1872,11 +1875,12 @@ void helper_cmpabs_s_ ## op(CPUMIPSState *env, uint= 32_t fst0, \ fst0 =3D float32_abs(fst0); \ fst1 =3D float32_abs(fst1); \ c =3D cond; \ - update_fcr31(env, GETPC()); \ - if (c) \ + if (c) { \ SET_FP_COND(cc, env->active_fpu); \ - else \ + } else { \ CLEAR_FP_COND(cc, env->active_fpu); \ + } \ + update_fcr31(env, GETPC()); \ } =20 /* @@ -1944,15 +1948,17 @@ void helper_cmp_ps_ ## op(CPUMIPSState *env, uint64= _t fdt0, \ fsth1 =3D fdt1 >> 32; \ cl =3D condl; \ ch =3D condh; \ - update_fcr31(env, GETPC()); \ - if (cl) \ + if (cl) { \ SET_FP_COND(cc, env->active_fpu); \ - else \ + } else { \ CLEAR_FP_COND(cc, env->active_fpu); \ - if (ch) \ + } \ + if (ch) { \ SET_FP_COND(cc + 1, env->active_fpu); \ - else \ + } else { \ CLEAR_FP_COND(cc + 1, env->active_fpu); \ + } \ + update_fcr31(env, GETPC()); \ } \ void helper_cmpabs_ps_ ## op(CPUMIPSState *env, uint64_t fdt0, \ uint64_t fdt1, int cc) \ @@ -1965,15 +1971,17 @@ void helper_cmpabs_ps_ ## op(CPUMIPSState *env, uin= t64_t fdt0, \ fsth1 =3D float32_abs(fdt1 >> 32); \ cl =3D condl; \ ch =3D condh; \ - update_fcr31(env, GETPC()); \ - if (cl) \ + if (cl) { \ SET_FP_COND(cc, env->active_fpu); \ - else \ + } else { \ CLEAR_FP_COND(cc, env->active_fpu); \ - if (ch) \ + } \ + if (ch) { \ SET_FP_COND(cc + 1, env->active_fpu); \ - else \ + } else { \ CLEAR_FP_COND(cc + 1, env->active_fpu); \ + } \ + update_fcr31(env, GETPC()); \ } =20 /* @@ -2080,12 +2088,12 @@ uint64_t helper_r6_cmp_d_ ## op(CPUMIPSState *env, = uint64_t fdt0, \ { \ uint64_t c; \ c =3D cond; \ - update_fcr31(env, GETPC()); \ if (c) { \ return -1; \ } else { \ return 0; \ } \ + update_fcr31(env, GETPC()); \ } =20 /* @@ -2175,12 +2183,12 @@ uint32_t helper_r6_cmp_s_ ## op(CPUMIPSState *env, = uint32_t fst0, \ { \ uint64_t c; \ c =3D cond; \ - update_fcr31(env, GETPC()); \ if (c) { \ return -1; \ } else { \ return 0; \ } \ + update_fcr31(env, GETPC()); \ } =20 /* --=20 2.7.4