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charset="utf-8" This patch starts making the hcd-xhci.c pci free, as part of this restructuring dma read/writes are handled without passing pci object. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/usb/hcd-xhci.c | 24 +++++++++++------------- hw/usb/hcd-xhci.h | 1 + 2 files changed, 12 insertions(+), 13 deletions(-) diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index 46a2186..254cf1e 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -495,7 +495,7 @@ static inline void xhci_dma_read_u32s(XHCIState *xhci, = dma_addr_t addr, =20 assert((len % sizeof(uint32_t)) =3D=3D 0); =20 - pci_dma_read(PCI_DEVICE(xhci), addr, buf, len); + dma_memory_read(xhci->as, addr, buf, len); =20 for (i =3D 0; i < (len / sizeof(uint32_t)); i++) { buf[i] =3D le32_to_cpu(buf[i]); @@ -515,7 +515,7 @@ static inline void xhci_dma_write_u32s(XHCIState *xhci,= dma_addr_t addr, for (i =3D 0; i < n; i++) { tmp[i] =3D cpu_to_le32(buf[i]); } - pci_dma_write(PCI_DEVICE(xhci), addr, tmp, len); + dma_memory_write(xhci->as, addr, tmp, len); } =20 static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport) @@ -644,7 +644,6 @@ static void xhci_die(XHCIState *xhci) =20 static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v) { - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); XHCIInterrupter *intr =3D &xhci->intr[v]; XHCITRB ev_trb; dma_addr_t addr; @@ -663,7 +662,7 @@ static void xhci_write_event(XHCIState *xhci, XHCIEvent= *event, int v) ev_trb.status, ev_trb.control); =20 addr =3D intr->er_start + TRB_SIZE*intr->er_ep_idx; - pci_dma_write(pci_dev, addr, &ev_trb, TRB_SIZE); + dma_memory_write(xhci->as, addr, &ev_trb, TRB_SIZE); =20 intr->er_ep_idx++; if (intr->er_ep_idx >=3D intr->er_size) { @@ -720,12 +719,11 @@ static void xhci_ring_init(XHCIState *xhci, XHCIRing = *ring, static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *t= rb, dma_addr_t *addr) { - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); uint32_t link_cnt =3D 0; =20 while (1) { TRBType type; - pci_dma_read(pci_dev, ring->dequeue, trb, TRB_SIZE); + dma_memory_read(xhci->as, ring->dequeue, trb, TRB_SIZE); trb->addr =3D ring->dequeue; trb->ccs =3D ring->ccs; le64_to_cpus(&trb->parameter); @@ -762,7 +760,6 @@ static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRin= g *ring, XHCITRB *trb, =20 static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring) { - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); XHCITRB trb; int length =3D 0; dma_addr_t dequeue =3D ring->dequeue; @@ -773,7 +770,7 @@ static int xhci_ring_chain_length(XHCIState *xhci, cons= t XHCIRing *ring) =20 while (1) { TRBType type; - pci_dma_read(pci_dev, dequeue, &trb, TRB_SIZE); + dma_memory_read(xhci->as, dequeue, &trb, TRB_SIZE); le64_to_cpus(&trb.parameter); le32_to_cpus(&trb.status); le32_to_cpus(&trb.control); @@ -828,7 +825,7 @@ static void xhci_er_reset(XHCIState *xhci, int v) xhci_die(xhci); return; } - pci_dma_read(PCI_DEVICE(xhci), erstba, &seg, sizeof(seg)); + dma_memory_read(xhci->as, erstba, &seg, sizeof(seg)); le32_to_cpus(&seg.addr_low); le32_to_cpus(&seg.addr_high); le32_to_cpus(&seg.size); @@ -1440,7 +1437,7 @@ static int xhci_xfer_create_sgl(XHCITransfer *xfer, i= nt in_xfer) int i; =20 xfer->int_req =3D false; - pci_dma_sglist_init(&xfer->sgl, PCI_DEVICE(xhci), xfer->trb_count); + qemu_sglist_init(&xfer->sgl, DEVICE(xhci), xfer->trb_count, xhci->as); for (i =3D 0; i < xfer->trb_count; i++) { XHCITRB *trb =3D &xfer->trbs[i]; dma_addr_t addr; @@ -2104,7 +2101,7 @@ static TRBCCode xhci_address_slot(XHCIState *xhci, un= signed int slotid, assert(slotid >=3D 1 && slotid <=3D xhci->numslots); =20 dcbaap =3D xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high); - poctx =3D ldq_le_pci_dma(PCI_DEVICE(xhci), dcbaap + 8 * slotid); + poctx =3D ldq_le_dma(xhci->as, dcbaap + 8 * slotid); ictx =3D xhci_mask64(pictx); octx =3D xhci_mask64(poctx); =20 @@ -2442,7 +2439,7 @@ static TRBCCode xhci_get_port_bandwidth(XHCIState *xh= ci, uint64_t pctx) /* TODO: actually implement real values here */ bw_ctx[0] =3D 0; memset(&bw_ctx[1], 80, xhci->numports); /* 80% */ - pci_dma_write(PCI_DEVICE(xhci), ctx, bw_ctx, sizeof(bw_ctx)); + dma_memory_write(xhci->as, ctx, bw_ctx, sizeof(bw_ctx)); =20 return CC_SUCCESS; } @@ -3434,6 +3431,7 @@ static void usb_xhci_realize(struct PCIDevice *dev, E= rror **errp) } =20 usb_xhci_init(xhci); + xhci->as =3D pci_get_address_space(dev); xhci->mfwrap_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, xhci_mfwrap_ti= mer, xhci); =20 memory_region_init(&xhci->mem, OBJECT(xhci), "xhci", LEN_REGS); @@ -3534,7 +3532,7 @@ static int usb_xhci_post_load(void *opaque, int versi= on_id) continue; } slot->ctx =3D - xhci_mask64(ldq_le_pci_dma(pci_dev, dcbaap + 8 * slotid)); + xhci_mask64(ldq_le_dma(xhci->as, dcbaap + 8 * slotid)); xhci_dma_read_u32s(xhci, slot->ctx, slot_ctx, sizeof(slot_ctx)); slot->uport =3D xhci_lookup_uport(xhci, slot_ctx); if (!slot->uport) { diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index c3dfc14..c8a8ae4 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -188,6 +188,7 @@ struct XHCIState { =20 USBBus bus; MemoryRegion mem; + AddressSpace *as; MemoryRegion mem_cap; MemoryRegion mem_oper; MemoryRegion mem_runtime; --=20 2.7.4