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Tue, 18 Aug 2020 11:52:03 -0400 Received: from unknown (HELO ironmsg02-sd.qualcomm.com) ([10.53.140.142]) by alexa-out-sd-02.qualcomm.com with ESMTP; 18 Aug 2020 08:51:00 -0700 Received: from vu-tsimpson-aus.qualcomm.com (HELO vu-tsimpson1-aus.qualcomm.com) ([10.222.150.1]) by ironmsg02-sd.qualcomm.com with ESMTP; 18 Aug 2020 08:50:59 -0700 Received: by vu-tsimpson1-aus.qualcomm.com (Postfix, from userid 47164) id C410418F7; Tue, 18 Aug 2020 10:50:58 -0500 (CDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1597765919; x=1629301919; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wcrIB56amxbiYM/beOEIWqzODLY47PJu/66JH/Z34K0=; b=pRoZM3nUEjGRRSbh4sKs9neUB5B/9ShMBA+6HPC8cz+9OdSx0QqNjpsE gWGZL1mB8Iju4N4+js0QOVI6pbu1EQxoxhHFCWOjHfwDUmdZIeaeAJJpz qbr/+dlkMdIMLdc6WQCW9NDxGzJ7eOAr612rTfaA6nas/BleKKfAcEVJs 8=; From: Taylor Simpson To: qemu-devel@nongnu.org Subject: [RFC PATCH v3 30/34] Hexagon (target/hexagon) TCG for instructions with multiple definitions Date: Tue, 18 Aug 2020 10:50:43 -0500 Message-Id: <1597765847-16637-31-git-send-email-tsimpson@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1597765847-16637-1-git-send-email-tsimpson@quicinc.com> References: <1597765847-16637-1-git-send-email-tsimpson@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=199.106.114.39; envelope-from=tsimpson@qualcomm.com; helo=alexa-out-sd-02.qualcomm.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/18 11:50:57 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -32 X-Spam_score: -3.3 X-Spam_bar: --- X-Spam_report: (-3.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ale@rev.ng, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, tsimpson@quicinc.com, philmd@redhat.com, aleksandar.m.mail@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Helpers won't work if there are multiple definitions, so we override these instructions using #define fGEN_TCG_. Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg.h | 198 +++++++++++++++++++++++++++++++++++++++++++= ++++ target/hexagon/helper.h | 2 + target/hexagon/genptr.c | 1 + 3 files changed, 201 insertions(+) create mode 100644 target/hexagon/gen_tcg.h diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h new file mode 100644 index 0000000..35568d1 --- /dev/null +++ b/target/hexagon/gen_tcg.h @@ -0,0 +1,198 @@ +/* + * Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights Res= erved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ + +#ifndef HEXAGON_GEN_TCG_H +#define HEXAGON_GEN_TCG_H + +/* + * Here is a primer to understand the tag names for load/store instructions + * + * Data types + * b signed byte r0 =3D memb(r2+#0) + * ub unsigned byte r0 =3D memub(r2+#0) + * h signed half word (16 bits) r0 =3D memh(r2+#0) + * uh unsigned half word r0 =3D memuh(r2+#0) + * i integer (32 bits) r0 =3D memw(r2+#0) + * d double word (64 bits) r1:0 =3D memd(r2+#0) + * + * Addressing modes + * _io indirect with offset r0 =3D memw(r1+#4) + * _ur absolute with register offset r0 =3D memw(r1<<#4+##va= riable) + * _rr indirect with register offset r0 =3D memw(r1+r4<<#2) + * gp global pointer relative r0 =3D memw(gp+#200) + * _sp stack pointer relative r0 =3D memw(r29+#12) + * _ap absolute set r0 =3D memw(r1=3D##vari= able) + * _pr post increment register r0 =3D memw(r1++m1) + * _pi post increment immediate r0 =3D memb(r1++#1) + */ + +/* Macros for complex addressing modes */ +#define GET_EA_ap \ + do { \ + fEA_IMM(UiV); \ + tcg_gen_movi_tl(ReV, UiV); \ + } while (0) +#define GET_EA_pr \ + do { \ + fEA_REG(RxV); \ + fPM_M(RxV, MuV); \ + } while (0) +#define GET_EA_pi \ + do { \ + fEA_REG(RxV); \ + fPM_I(RxV, siV); \ + } while (0) + + +/* Instructions with multiple definitions */ +#define fGEN_TCG_LOAD_AP(RES, SIZE, SIGN) \ + do { \ + fMUST_IMMEXT(UiV); \ + fEA_IMM(UiV); \ + fLOAD(1, SIZE, SIGN, EA, RES); \ + tcg_gen_movi_tl(ReV, UiV); \ + } while (0) + +#define fGEN_TCG_L4_loadrub_ap(SHORTCODE) \ + fGEN_TCG_LOAD_AP(RdV, 1, u) +#define fGEN_TCG_L4_loadrb_ap(SHORTCODE) \ + fGEN_TCG_LOAD_AP(RdV, 1, s) +#define fGEN_TCG_L4_loadruh_ap(SHORTCODE) \ + fGEN_TCG_LOAD_AP(RdV, 2, u) +#define fGEN_TCG_L4_loadrh_ap(SHORTCODE) \ + fGEN_TCG_LOAD_AP(RdV, 2, s) +#define fGEN_TCG_L4_loadri_ap(SHORTCODE) \ + fGEN_TCG_LOAD_AP(RdV, 4, u) +#define fGEN_TCG_L4_loadrd_ap(SHORTCODE) \ + fGEN_TCG_LOAD_AP(RddV, 8, u) + +#define fGEN_TCG_L2_loadrub_pr(SHORTCODE) SHORTCODE +#define fGEN_TCG_L2_loadrub_pi(SHORTCODE) SHORTCODE +#define fGEN_TCG_L2_loadrb_pr(SHORTCODE) SHORTCODE +#define fGEN_TCG_L2_loadrb_pi(SHORTCODE) SHORTCODE; +#define fGEN_TCG_L2_loadruh_pr(SHORTCODE) SHORTCODE +#define fGEN_TCG_L2_loadruh_pi(SHORTCODE) SHORTCODE; +#define fGEN_TCG_L2_loadrh_pr(SHORTCODE) SHORTCODE +#define fGEN_TCG_L2_loadrh_pi(SHORTCODE) SHORTCODE +#define fGEN_TCG_L2_loadri_pr(SHORTCODE) SHORTCODE +#define fGEN_TCG_L2_loadri_pi(SHORTCODE) SHORTCODE +#define fGEN_TCG_L2_loadrd_pr(SHORTCODE) SHORTCODE +#define fGEN_TCG_L2_loadrd_pi(SHORTCODE) SHORTCODE + +/* + * Predicated loads + * Here is a primer to understand the tag names + * + * Predicate used + * t true "old" value if (p0) r0 =3D memb(r2+= #0) + * f false "old" value if (!p0) r0 =3D memb(r2= +#0) + * tnew true "new" value if (p0.new) r0 =3D memb= (r2+#0) + * fnew false "new" value if (!p0.new) r0 =3D mem= b(r2+#0) + */ +#define fGEN_TCG_PRED_LOAD(GET_EA, PRED, SIZE, SIGN) \ + do { \ + TCGv LSB =3D tcg_temp_local_new(); \ + TCGLabel *label =3D gen_new_label(); \ + GET_EA; \ + PRED; \ + PRED_LOAD_CANCEL(LSB, EA); \ + tcg_gen_movi_tl(RdV, 0); \ + tcg_gen_brcondi_tl(TCG_COND_EQ, LSB, 0, label); \ + fLOAD(1, SIZE, SIGN, EA, RdV); \ + gen_set_label(label); \ + tcg_temp_free(LSB); \ + } while (0) + +#define fGEN_TCG_L2_ploadrubt_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBOLD(PtV), 1, u) +#define fGEN_TCG_L2_ploadrubf_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBOLDNOT(PtV), 1, u) +#define fGEN_TCG_L2_ploadrubtnew_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBNEW(PtN), 1, u) +#define fGEN_TCG_L2_ploadrubfnew_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBNEWNOT(PtN), 1, u) +#define fGEN_TCG_L2_ploadrbt_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBOLD(PtV), 1, s) +#define fGEN_TCG_L2_ploadrbf_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBOLDNOT(PtV), 1, s) +#define fGEN_TCG_L2_ploadrbtnew_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBNEW(PtN), 1, s) +#define fGEN_TCG_L2_ploadrbfnew_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD({ fEA_REG(RxV); fPM_I(RxV, siV); }, \ + fLSBNEWNOT(PtN), 1, s) + +#define fGEN_TCG_L2_ploadruht_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBOLD(PtV), 2, u) +#define fGEN_TCG_L2_ploadruhf_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBOLDNOT(PtV), 2, u) +#define fGEN_TCG_L2_ploadruhtnew_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBNEW(PtN), 2, u) +#define fGEN_TCG_L2_ploadruhfnew_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBNEWNOT(PtN), 2, u) +#define fGEN_TCG_L2_ploadrht_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBOLD(PtV), 2, s) +#define fGEN_TCG_L2_ploadrhf_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBOLDNOT(PtV), 2, s) +#define fGEN_TCG_L2_ploadrhtnew_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBNEW(PtN), 2, s) +#define fGEN_TCG_L2_ploadrhfnew_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBNEWNOT(PtN), 2, s) + +#define fGEN_TCG_L2_ploadrit_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBOLD(PtV), 4, u) +#define fGEN_TCG_L2_ploadrif_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBOLDNOT(PtV), 4, u) +#define fGEN_TCG_L2_ploadritnew_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBNEW(PtN), 4, u) +#define fGEN_TCG_L2_ploadrifnew_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD(GET_EA_pi, fLSBNEWNOT(PtN), 4, u) + +/* Predicated loads into a register pair */ +#define fGEN_TCG_PRED_LOAD_PAIR(GET_EA, PRED) \ + do { \ + TCGv LSB =3D tcg_temp_local_new(); \ + TCGLabel *label =3D gen_new_label(); \ + GET_EA; \ + PRED; \ + PRED_LOAD_CANCEL(LSB, EA); \ + tcg_gen_movi_i64(RddV, 0); \ + tcg_gen_brcondi_tl(TCG_COND_EQ, LSB, 0, label); \ + fLOAD(1, 8, u, EA, RddV); \ + gen_set_label(label); \ + tcg_temp_free(LSB); \ + } while (0) + +#define fGEN_TCG_L2_ploadrdt_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD_PAIR(GET_EA_pi, fLSBOLD(PtV)) +#define fGEN_TCG_L2_ploadrdf_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD_PAIR(GET_EA_pi, fLSBOLDNOT(PtV)) +#define fGEN_TCG_L2_ploadrdtnew_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD_PAIR(GET_EA_pi, fLSBNEW(PtN)) +#define fGEN_TCG_L2_ploadrdfnew_pi(SHORTCODE) \ + fGEN_TCG_PRED_LOAD_PAIR(GET_EA_pi, fLSBNEWNOT(PtN)) + +/* load-locked and store-locked */ +#define fGEN_TCG_L2_loadw_locked(SHORTCODE) \ + SHORTCODE +#define fGEN_TCG_L4_loadd_locked(SHORTCODE) \ + SHORTCODE +#define fGEN_TCG_S2_storew_locked(SHORTCODE) \ + do { SHORTCODE; READ_PREG(PdV, PdN); } while (0) +#define fGEN_TCG_S4_stored_locked(SHORTCODE) \ + do { SHORTCODE; READ_PREG(PdV, PdN); } while (0) + +#endif diff --git a/target/hexagon/helper.h b/target/hexagon/helper.h index 48b1917..cee902b 100644 --- a/target/hexagon/helper.h +++ b/target/hexagon/helper.h @@ -15,6 +15,8 @@ * along with this program; if not, see . */ =20 +#include "gen_tcg.h" + DEF_HELPER_2(raise_exception, noreturn, env, i32) DEF_HELPER_1(debug_start_packet, void, env) DEF_HELPER_3(debug_check_store_width, void, env, int, int) diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c index a85fc14..1808660 100644 --- a/target/hexagon/genptr.c +++ b/target/hexagon/genptr.c @@ -26,6 +26,7 @@ #include "translate.h" #include "macros.h" #include "genptr_helpers.h" +#include "gen_tcg.h" =20 #define DEF_TCG_FUNC(TAG, GENFN) \ static void generate_##TAG(CPUHexagonState *env, DisasContext *ctx, \ --=20 2.7.4