From nobody Sat Apr 27 18:09:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1dmarc=pass fromdomain=xilinx.com) ARC-Seal: i=2; a=rsa-sha256; t=1594141852; cv=pass; d=zohomail.com; s=zohoarc; b=QrNVmi8hw/nfEUluXorz6UTQBwFn1LWSyO/pFy/kXJfFG/hDYqU3sfctIAq9DbMnfKM64/CY7v2WTeJob4JmSud8g/0T7/i17q/mx/K/IrMm/fkyeA94/UkjTTYpyVrkTcx6AKZaidB61nYmmn/+KmtWvMUUETdqG9QLFBy698M= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1594141852; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=2xSCGBQT5JVCAl052Jo/DSOxgKalQi04E7jJxj+edes=; b=Kk33xhyNpkOzoIseN5939cHr3h4WQTKh0rdDWED3kxcKf8AQV4OWg2FGpt+YKrRVX1rsdEhkDhTKbMY7sWF3X3s9WiUF2TffcGMhSF4FFuKwBrjULXPQ3ZPbij93Z/CoCbqROcPWh4ojesgBZ1CpFDZEWyCx2TZ1AZrYXDfsrOA= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1dmarc=pass fromdomain=xilinx.com) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1594141852208761.9170365604966; Tue, 7 Jul 2020 10:10:52 -0700 (PDT) Received: from localhost ([::1]:38156 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jsr7K-0000ZM-NL for importer@patchew.org; Tue, 07 Jul 2020 13:10:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44440) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jsqsP-0004HU-1A for qemu-devel@nongnu.org; Tue, 07 Jul 2020 12:55:25 -0400 Received: from mail-bn7nam10on2086.outbound.protection.outlook.com ([40.107.92.86]:6784 helo=NAM10-BN7-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jsqsL-0007Bj-DI for qemu-devel@nongnu.org; Tue, 07 Jul 2020 12:55:24 -0400 Received: from SN4PR0501CA0026.namprd05.prod.outlook.com (2603:10b6:803:40::39) by DM6PR02MB7002.namprd02.prod.outlook.com (2603:10b6:5:250::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3153.23; Tue, 7 Jul 2020 16:55:19 +0000 Received: from SN1NAM02FT038.eop-nam02.prod.protection.outlook.com (2603:10b6:803:40:cafe::4a) by SN4PR0501CA0026.outlook.office365.com (2603:10b6:803:40::39) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3174.14 via Frontend Transport; Tue, 7 Jul 2020 16:55:19 +0000 Received: from xsj-pvapsmtpgw01 (149.199.60.83) by SN1NAM02FT038.mail.protection.outlook.com (10.152.72.69) with Microsoft SMTP Server id 15.20.3153.24 via Frontend Transport; Tue, 7 Jul 2020 16:55:19 +0000 Received: from [149.199.38.66] (port=59927 helo=xsj-pvapsmtp01) by xsj-pvapsmtpgw01 with esmtp (Exim 4.90) (envelope-from ) id 1jsqqo-0003gr-Vq; Tue, 07 Jul 2020 09:53:46 -0700 Received: from [127.0.0.1] (helo=xsj-smtp-dlp2.xlnx.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jsqsI-0001ev-UW; Tue, 07 Jul 2020 09:55:18 -0700 Received: from xsj-pvapsmtp01 (xsj-mail.xilinx.com [149.199.38.66]) by xsj-smtp-dlp2.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id 067GtH0a015039; Tue, 7 Jul 2020 09:55:18 -0700 Received: from [10.140.6.35] (helo=xhdsaipava40.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jsqsH-0001eO-Do; Tue, 07 Jul 2020 09:55:17 -0700 Received: by xhdsaipava40.xilinx.com (Postfix, from userid 14131) id 1FB4613C0347; Tue, 7 Jul 2020 22:14:39 +0530 (IST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=DhL/aa4wrcT150Jhc2ygpI+M74VrcaJA69tpk6jIXdy9T9P7QB8Nggj6KpIsVXryjuKdK3YeYsqkigeKlKH/GQPHf6kVcApd1vNmgkTAjF3xTPwj8m1sX/a4290m0UBP0amK5vWUJZ6Fpz5z61HoKbO7k1qJoIfuEnaG3ZaHcXbfSNqZD3IV8cNk6bydtVwD02TVreMblfg48/+E6OhKlaDVy5R4f3B6iW2mlE5rwkb8qGX7NgoBzKATrSWq9OKrqwOYvt2TjLzUcN6z1bPHX4vlVfLnoMwhnXLvC6h5Y/Mg0dR69EGbaD/7Hheq6/dLKvOxAb5/oMWBxt7ZstbLjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=2xSCGBQT5JVCAl052Jo/DSOxgKalQi04E7jJxj+edes=; b=l3/DT4lGQJ2Hj0+p0C5RcS9UlajB7d4Li5nmHBvseoO4IcYs7EPdSfZHlPbkas/a7Ir/wNRsmqX6M1UFBygL8u2Xld/eHwpUdZEUhq94p+MugI+v1EWAX6VguHTS9DQmoPFvMeTK/GPI1JI2w+cRGIjRkx6dNPkOfGAzNVP0PSMUnU6ymugIHirqLg7sXp9tU8h/FJAJWjaBzBAasoGiG5w3hkod1wYbA6bYBCXVso7BpLRflPMN6fVzZ5/YWwIOT82BMNM7Urd/m80EtLdMFvcq0XT8nL3Qjd/k1l10qfJ8wxux71uGzmyILAl/ZiBT+Wp+4kDbkO158dfOgKyRfg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 149.199.60.83) smtp.rcpttodomain=wdc.com smtp.mailfrom=xilinx.com; dmarc=bestguesspass action=none header.from=xilinx.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=xilinx.onmicrosoft.com; s=selector2-xilinx-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=2xSCGBQT5JVCAl052Jo/DSOxgKalQi04E7jJxj+edes=; b=Ry6V88FsCPS/q3RYHw0GlrMs+4Gwfj42BD+gvnegSAvUxtwgoyVhU/fbovCwuF/etV2ct4vexAAFxriPTXfHd4g+YWFBbwEDTPX09+h5/g4SH8jQothFAemSZsUC5M4gHz91FmqR1eigPRZrxDbGuQMd/R56aQ3KAONUD6MrSdM= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=xilinx.com; wdc.com; dkim=none (message not signed) header.d=none;wdc.com; dmarc=bestguesspass action=none header.from=xilinx.com; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: Pass (protection.outlook.com: domain of xilinx.com designates 149.199.60.83 as permitted sender) receiver=protection.outlook.com; client-ip=149.199.60.83; helo=xsj-pvapsmtpgw01; From: Sai Pavan Boddu To: Gerd Hoffmann , Peter Maydell , Markus Armbruster Subject: [PATCH v3 1/3] usb/hcd-xhci: Make dma read/writes hooks pci free Date: Tue, 7 Jul 2020 22:14:29 +0530 Message-Id: <1594140271-16462-2-git-send-email-sai.pavan.boddu@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1594140271-16462-1-git-send-email-sai.pavan.boddu@xilinx.com> References: <1594140271-16462-1-git-send-email-sai.pavan.boddu@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:xsj-pvapsmtpgw01; PTR:unknown-60-83.xilinx.com; CAT:NONE; SFTY:; SFS:(46966005)(356005)(2616005)(36756003)(6666004)(47076004)(186003)(70586007)(8936002)(70206006)(4326008)(2906002)(26005)(5660300002)(54906003)(42186006)(110136005)(81166007)(82310400002)(107886003)(498600001)(83380400001)(6266002)(426003)(336012)(7416002)(8676002); DIR:OUT; SFP:1101; X-MS-PublicTrafficType: Email MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 2b5ce76d-cf9f-4dd9-6c1e-08d8229687e1 X-MS-TrafficTypeDiagnostic: DM6PR02MB7002: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:3173; X-Forefront-PRVS: 0457F11EAF X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: vaKuFMj7qBkOdjv4ILeFCdQhjeYUhwb3iVmddTMhnqyhoTY+dIMf+YTrZmzF2qtCE6EkeJURU/44MTk8p0+eB0G9XV6OYaibHK7q7l585aHO8GZFrx4E8dpmhma+Ql8KMi1DLLxvU+Svut2iIF/527kimRV5WjZgrPvKO3h6QVDtCC7mrUEEyoqi1ARx35DD5pEXjHto9arSrJqPFrnJFJbabzT5jP+NMBOBaqtbhm4zlhXEZHKAagtlkNujmrJtBMMctgNpsZHBJAd5CFecWzltI3yTorIC4Pe4JSN7Ml+ecl+At8Z7R9+LgDQ64E8+ohZ7hhqBi6HNCHFQlIXgJnL5ebZZwIB49RvW08aQzT+oIoyMORYaqy76K8V9dMtgY/fTdhHPvxJRfjyFIRhySA== X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jul 2020 16:55:19.2881 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2b5ce76d-cf9f-4dd9-6c1e-08d8229687e1 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-AuthSource: SN1NAM02FT038.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR02MB7002 Received-SPF: pass client-ip=40.107.92.86; envelope-from=saipava@xilinx.com; helo=NAM10-BN7-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/07/07 12:55:20 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Eduardo Habkost , Vikram Garhwal , sai.pavan.boddu@xilinx.com, qemu-devel@nongnu.org, Paul Zimmerman , Alistair Francis , Paolo Bonzini , Ying Fang , =?UTF-8?q?=27Marc-Andr=C3=A9=20Lureau=27?= , =?UTF-8?q?=27Philippe=20Mathieu-Daud=C3=A9=27?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @xilinx.onmicrosoft.com) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch starts making the hcd-xhci.c pci free, as part of this restructuring dma read/writes are handled without passing pci object. Signed-off-by: Sai Pavan Boddu --- hw/usb/hcd-xhci.c | 24 +++++++++++------------- hw/usb/hcd-xhci.h | 3 +++ 2 files changed, 14 insertions(+), 13 deletions(-) diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index b330e36..fa6ce98 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -495,7 +495,7 @@ static inline void xhci_dma_read_u32s(XHCIState *xhci, = dma_addr_t addr, =20 assert((len % sizeof(uint32_t)) =3D=3D 0); =20 - pci_dma_read(PCI_DEVICE(xhci), addr, buf, len); + dma_memory_read(xhci->as, addr, buf, len); =20 for (i =3D 0; i < (len / sizeof(uint32_t)); i++) { buf[i] =3D le32_to_cpu(buf[i]); @@ -515,7 +515,7 @@ static inline void xhci_dma_write_u32s(XHCIState *xhci,= dma_addr_t addr, for (i =3D 0; i < n; i++) { tmp[i] =3D cpu_to_le32(buf[i]); } - pci_dma_write(PCI_DEVICE(xhci), addr, tmp, len); + dma_memory_write(xhci->as, addr, tmp, len); } =20 static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport) @@ -644,7 +644,6 @@ static void xhci_die(XHCIState *xhci) =20 static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v) { - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); XHCIInterrupter *intr =3D &xhci->intr[v]; XHCITRB ev_trb; dma_addr_t addr; @@ -663,7 +662,7 @@ static void xhci_write_event(XHCIState *xhci, XHCIEvent= *event, int v) ev_trb.status, ev_trb.control); =20 addr =3D intr->er_start + TRB_SIZE*intr->er_ep_idx; - pci_dma_write(pci_dev, addr, &ev_trb, TRB_SIZE); + dma_memory_write(xhci->as, addr, &ev_trb, TRB_SIZE); =20 intr->er_ep_idx++; if (intr->er_ep_idx >=3D intr->er_size) { @@ -720,12 +719,11 @@ static void xhci_ring_init(XHCIState *xhci, XHCIRing = *ring, static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *t= rb, dma_addr_t *addr) { - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); uint32_t link_cnt =3D 0; =20 while (1) { TRBType type; - pci_dma_read(pci_dev, ring->dequeue, trb, TRB_SIZE); + dma_memory_read(xhci->as, ring->dequeue, trb, TRB_SIZE); trb->addr =3D ring->dequeue; trb->ccs =3D ring->ccs; le64_to_cpus(&trb->parameter); @@ -762,7 +760,6 @@ static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRin= g *ring, XHCITRB *trb, =20 static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring) { - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); XHCITRB trb; int length =3D 0; dma_addr_t dequeue =3D ring->dequeue; @@ -773,7 +770,7 @@ static int xhci_ring_chain_length(XHCIState *xhci, cons= t XHCIRing *ring) =20 while (1) { TRBType type; - pci_dma_read(pci_dev, dequeue, &trb, TRB_SIZE); + dma_memory_read(xhci->as, dequeue, &trb, TRB_SIZE); le64_to_cpus(&trb.parameter); le32_to_cpus(&trb.status); le32_to_cpus(&trb.control); @@ -828,7 +825,7 @@ static void xhci_er_reset(XHCIState *xhci, int v) xhci_die(xhci); return; } - pci_dma_read(PCI_DEVICE(xhci), erstba, &seg, sizeof(seg)); + dma_memory_read(xhci->as, erstba, &seg, sizeof(seg)); le32_to_cpus(&seg.addr_low); le32_to_cpus(&seg.addr_high); le32_to_cpus(&seg.size); @@ -1440,7 +1437,7 @@ static int xhci_xfer_create_sgl(XHCITransfer *xfer, i= nt in_xfer) int i; =20 xfer->int_req =3D false; - pci_dma_sglist_init(&xfer->sgl, PCI_DEVICE(xhci), xfer->trb_count); + qemu_sglist_init(&xfer->sgl, DEVICE(xhci), xfer->trb_count, xhci->as); for (i =3D 0; i < xfer->trb_count; i++) { XHCITRB *trb =3D &xfer->trbs[i]; dma_addr_t addr; @@ -2101,7 +2098,7 @@ static TRBCCode xhci_address_slot(XHCIState *xhci, un= signed int slotid, assert(slotid >=3D 1 && slotid <=3D xhci->numslots); =20 dcbaap =3D xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high); - poctx =3D ldq_le_pci_dma(PCI_DEVICE(xhci), dcbaap + 8 * slotid); + poctx =3D ldq_le_dma(xhci->as, dcbaap + 8 * slotid); ictx =3D xhci_mask64(pictx); octx =3D xhci_mask64(poctx); =20 @@ -2439,7 +2436,7 @@ static TRBCCode xhci_get_port_bandwidth(XHCIState *xh= ci, uint64_t pctx) /* TODO: actually implement real values here */ bw_ctx[0] =3D 0; memset(&bw_ctx[1], 80, xhci->numports); /* 80% */ - pci_dma_write(PCI_DEVICE(xhci), ctx, bw_ctx, sizeof(bw_ctx)); + dma_memory_write(xhci->as, ctx, bw_ctx, sizeof(bw_ctx)); =20 return CC_SUCCESS; } @@ -3431,6 +3428,7 @@ static void usb_xhci_realize(struct PCIDevice *dev, E= rror **errp) } =20 usb_xhci_init(xhci); + xhci->as =3D pci_get_address_space(dev); xhci->mfwrap_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, xhci_mfwrap_ti= mer, xhci); =20 memory_region_init(&xhci->mem, OBJECT(xhci), "xhci", LEN_REGS); @@ -3531,7 +3529,7 @@ static int usb_xhci_post_load(void *opaque, int versi= on_id) continue; } slot->ctx =3D - xhci_mask64(ldq_le_pci_dma(pci_dev, dcbaap + 8 * slotid)); + xhci_mask64(ldq_le_dma(xhci->as, dcbaap + 8 * slotid)); xhci_dma_read_u32s(xhci, slot->ctx, slot_ctx, sizeof(slot_ctx)); slot->uport =3D xhci_lookup_uport(xhci, slot_ctx); if (!slot->uport) { diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index 946af51..edbd926 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -22,6 +22,8 @@ #ifndef HW_USB_HCD_XHCI_H #define HW_USB_HCD_XHCI_H =20 +#include "sysemu/dma.h" + #define TYPE_XHCI "base-xhci" #define TYPE_NEC_XHCI "nec-usb-xhci" #define TYPE_QEMU_XHCI "qemu-xhci" @@ -189,6 +191,7 @@ struct XHCIState { =20 USBBus bus; MemoryRegion mem; + AddressSpace *as; MemoryRegion mem_cap; MemoryRegion mem_oper; MemoryRegion mem_runtime; --=20 2.7.4 From nobody Sat Apr 27 18:09:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1dmarc=pass fromdomain=xilinx.com) ARC-Seal: i=2; a=rsa-sha256; t=1594141954; cv=pass; d=zohomail.com; s=zohoarc; b=Q5sDCl8n4NqsjrnuXqGkz5upPsGKfJDruP43j6dQNz5vzmPixgBcy/m0+Lis22yiTVtVv71ubTNhOx4DBp0rz2h4A7L8qJZEoOUPS5TfxNqtllxbIOe84LFLEPXuTMIsLvt/bqpUdPNA92GpZ5JIUu7+RI4g65u3WGUimUx7Zo0= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1594141954; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Cjt9EbqZl8h/te347O1Na0uYflpzWN9ZYZrP/vrcpXA=; b=SBp5BFpmuu/JiIAe08081j77knUt1yRdJtdPIBn2x+q2MrFjhthyzk+Ohb9um7GJxKbSO5npCBnJwA2MLO+iUDplObHnhh8rdzgMXCMbkxIvWurhOQhQo6dsCCG3yKAbNjAD+dBgmUHK4Ft+utYxSP/oaArT44gtElelncjQpdI= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1dmarc=pass fromdomain=xilinx.com) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1594141954078586.9223306194416; Tue, 7 Jul 2020 10:12:34 -0700 (PDT) Received: from localhost ([::1]:44674 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jsr8y-0003P1-N7 for importer@patchew.org; Tue, 07 Jul 2020 13:12:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44458) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jsqsW-0004QI-D0 for qemu-devel@nongnu.org; Tue, 07 Jul 2020 12:55:32 -0400 Received: from mail-dm6nam11on2073.outbound.protection.outlook.com ([40.107.223.73]:59008 helo=NAM11-DM6-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jsqsQ-0007CB-2A for qemu-devel@nongnu.org; Tue, 07 Jul 2020 12:55:28 -0400 Received: from CY4PR1101CA0023.namprd11.prod.outlook.com (2603:10b6:910:15::33) by BYAPR02MB5797.namprd02.prod.outlook.com (2603:10b6:a03:11c::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3153.27; Tue, 7 Jul 2020 16:55:23 +0000 Received: from CY1NAM02FT043.eop-nam02.prod.protection.outlook.com (2603:10b6:910:15:cafe::f3) by CY4PR1101CA0023.outlook.office365.com (2603:10b6:910:15::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3174.21 via Frontend Transport; Tue, 7 Jul 2020 16:55:23 +0000 Received: from xsj-pvapsmtpgw01 (149.199.60.83) by CY1NAM02FT043.mail.protection.outlook.com (10.152.74.182) with Microsoft SMTP Server id 15.20.3153.24 via Frontend Transport; Tue, 7 Jul 2020 16:55:23 +0000 Received: from [149.199.38.66] (port=59980 helo=xsj-pvapsmtp01) by xsj-pvapsmtpgw01 with esmtp (Exim 4.90) (envelope-from ) id 1jsqqs-0003gx-Vl; Tue, 07 Jul 2020 09:53:50 -0700 Received: from [127.0.0.1] (helo=xsj-smtp-dlp2.xlnx.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jsqsM-0001fR-U6; Tue, 07 Jul 2020 09:55:22 -0700 Received: from xsj-pvapsmtp01 (xsj-smtp.xilinx.com [149.199.38.66]) by xsj-smtp-dlp2.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id 067GtIrZ015049; Tue, 7 Jul 2020 09:55:18 -0700 Received: from [10.140.6.35] (helo=xhdsaipava40.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jsqsI-0001ee-8a; Tue, 07 Jul 2020 09:55:18 -0700 Received: by xhdsaipava40.xilinx.com (Postfix, from userid 14131) id E8F3F13C0366; Tue, 7 Jul 2020 22:14:39 +0530 (IST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=b8lBAKOU4JmkimpULEvFFwHO2rpVY8AZCk9D9X2L4C13OqBxZUY0Q8wDrmzHJthEZVzapL5je6hn6ocnw3wLP0vGw9gUth7+FmtkcBtB011xRCFTzOJOvOHK5UByTwwRAktwJ5OU9VEKtIh+67Ntof3I0RtqeJhdwZ5KszdyV38zfHZ/B2/gcoNbofYpR2soqw9hEuQ7tiQmpCPiSeG8wyPtKvpTrr3pHp3dlF9G6wfZu7vcIPo3SX10aiKZCIyvYW+sMcZLipYdgub1R77VizG8/GNdogTeZYEbhuEx8MmL89I3JuEHGzaQL8owKwAOl0Z/oYWCAFCZF5MxH212IA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Cjt9EbqZl8h/te347O1Na0uYflpzWN9ZYZrP/vrcpXA=; b=dImeHGdFHX/bQ7dfglCrhf7pnghsgyiGOJWj61bHqhhD1hlH3FuzgKnsBwHG32b7SFbfIJr5Kj4qXd2NAK/QYlrgvPA093oqg+d575yrOQytmXyQB9kYB6uwEvwKYH8DzeVaQvToDqX1Jm4NjrjXzkmnITz/VwPTCBsKVvRFONRF2IEmYOsKXKQakM/K8G7jPtIcatp+IskJLsWOI20+8q7bs8sKk9NcNAUTNAVZFwvMiGgOcPr1wcBks0eKTuVL1UwNm72LxqKbv8pQ/ePWcUJiNu/vM5ZNmgiwoSw92iTeZohcUEfMeVC/l/WOlhRe5aiozG1wMKEw0AdsRjHIWg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 149.199.60.83) smtp.rcpttodomain=wdc.com smtp.mailfrom=xilinx.com; dmarc=bestguesspass action=none header.from=xilinx.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=xilinx.onmicrosoft.com; s=selector2-xilinx-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Cjt9EbqZl8h/te347O1Na0uYflpzWN9ZYZrP/vrcpXA=; b=k1/8rM5QbGfeVhN0McP1xq1dE9+ktl9MA7SYHA2htCgwAjj+yTZ3B/+HN0tvgMxvD60qhQuupTJh4FSsn/Ov72pvyxLLTa6Ap5hQFtlVIQTZVa7kbwxHGofuOHvXwmoAgQdhmsC6a9p0Z3lYjqwlXikxAWe6DLlhBvhekFq+Nl0= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=xilinx.com; wdc.com; dkim=none (message not signed) header.d=none;wdc.com; dmarc=bestguesspass action=none header.from=xilinx.com; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: Pass (protection.outlook.com: domain of xilinx.com designates 149.199.60.83 as permitted sender) receiver=protection.outlook.com; client-ip=149.199.60.83; helo=xsj-pvapsmtpgw01; From: Sai Pavan Boddu To: Gerd Hoffmann , Peter Maydell , Markus Armbruster Subject: [PATCH v3 2/3] usb/hcd-xhci: Move qemu-xhci device to hcd-xhci-pci.c Date: Tue, 7 Jul 2020 22:14:30 +0530 Message-Id: <1594140271-16462-3-git-send-email-sai.pavan.boddu@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1594140271-16462-1-git-send-email-sai.pavan.boddu@xilinx.com> References: <1594140271-16462-1-git-send-email-sai.pavan.boddu@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:xsj-pvapsmtpgw01; PTR:unknown-60-83.xilinx.com; CAT:NONE; SFTY:; SFS:(46966005)(8676002)(70586007)(70206006)(5660300002)(186003)(2616005)(4326008)(54906003)(498600001)(36756003)(26005)(8936002)(107886003)(6666004)(81166007)(7416002)(47076004)(83380400001)(426003)(110136005)(42186006)(356005)(82310400002)(2906002)(336012)(6266002)(2004002); DIR:OUT; SFP:1101; X-MS-PublicTrafficType: Email MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 904ead4d-a57b-4197-be19-08d822968a3c X-MS-TrafficTypeDiagnostic: BYAPR02MB5797: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:5516; X-Forefront-PRVS: 0457F11EAF X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: LFyCsxQLZtT5hlahPb7dhFCCY+jZpDm1vgjoXqwIbFyITyJ7X6tJ8HQ1hZE3+lXOr2ZIFAUcbER3wVNxXVwlGY9m6cWTHSQnjI8OOcpo9CpdNzEkdq8j5cksUJg8uxYOCiT2yifqqTcLZ91x0UbSlruN571HKbW4ifOPnhffP85xgWp03wajxmikyz5+LppTjQBLgHfQ2knuJ9VlMI/Ke75eb2rVGCyaaZvtzE3YHqeLVNAXBY+U7k0vIdHq6WiCZebJSsZyAA1vzi+12BAbs0yGOEoDLWyseTKcr0oow8d8PlTcfyZVXlEShBSe63h260lc9wsXfkXirI16IthBMPGNOluw2Q2e7gk1swVdw/N30m+5WTGYql5d6F0Yh37nUlTIjH3WXbcOyrkhglJwKaFArS3KQbr6GtpIbzeZgVQQH2XXasjhD11CIXFGNmSBYCZEa+NrHbfWka0shiyUmgOJV4CQFXPs9VkMz/gfgxy89sHQ36+VlW2mXQlPOAqc X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jul 2020 16:55:23.2410 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 904ead4d-a57b-4197-be19-08d822968a3c X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-AuthSource: CY1NAM02FT043.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR02MB5797 Received-SPF: pass client-ip=40.107.223.73; envelope-from=saipava@xilinx.com; helo=NAM11-DM6-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/07/07 12:55:24 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Eduardo Habkost , Vikram Garhwal , sai.pavan.boddu@xilinx.com, qemu-devel@nongnu.org, Paul Zimmerman , Alistair Francis , Paolo Bonzini , Ying Fang , =?UTF-8?q?=27Marc-Andr=C3=A9=20Lureau=27?= , =?UTF-8?q?=27Philippe=20Mathieu-Daud=C3=A9=27?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @xilinx.onmicrosoft.com) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move pci specific devices to new file. This set the environment to move all pci specific hooks in hcd-xhci.c to hcd-xhci-pci.c. Signed-off-by: Sai Pavan Boddu --- hw/usb/hcd-xhci-pci.c | 64 +++++++++++++++++++++++++++++++++++++++++++++++= ++++ hw/usb/hcd-xhci.c | 40 ++------------------------------ hw/usb/hcd-xhci.h | 2 ++ 3 files changed, 68 insertions(+), 38 deletions(-) create mode 100644 hw/usb/hcd-xhci-pci.c diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c new file mode 100644 index 0000000..26af683 --- /dev/null +++ b/hw/usb/hcd-xhci-pci.c @@ -0,0 +1,64 @@ +/* + * USB xHCI controller with PCI system bus emulation + * + * Copyright (c) 2011 Securiforest + * Date: 2011-05-11 ; Author: Hector Martin + * Based on usb-ohci.c, emulates Renesas NEC USB 3.0 + * Date: 2020-03-01; Author: Sai Pavan Boddu + * Moved the pci specific content for hcd-xhci.c to hcd-xhci-pci.c + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#include "qemu/osdep.h" +#include "hw/pci/pci.h" +#include "hw/qdev-properties.h" +#include "hw/pci/msi.h" +#include "hw/pci/msix.h" +#include "hcd-xhci.h" +#include "trace.h" +#include "qapi/error.h" + +static void qemu_xhci_class_init(ObjectClass *klass, void *data) +{ + PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); + + k->vendor_id =3D PCI_VENDOR_ID_REDHAT; + k->device_id =3D PCI_DEVICE_ID_REDHAT_XHCI; + k->revision =3D 0x01; +} + +static void qemu_xhci_instance_init(Object *obj) +{ + XHCIState *xhci =3D XHCI(obj); + + xhci->msi =3D ON_OFF_AUTO_OFF; + xhci->msix =3D ON_OFF_AUTO_AUTO; + xhci->numintrs =3D MAXINTRS; + xhci->numslots =3D MAXSLOTS; + xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST); +} + +static const TypeInfo qemu_xhci_info =3D { + .name =3D TYPE_QEMU_XHCI, + .parent =3D TYPE_XHCI, + .class_init =3D qemu_xhci_class_init, + .instance_init =3D qemu_xhci_instance_init, +}; + +static void xhci_register_types(void) +{ + type_register_static(&qemu_xhci_info); +} + +type_init(xhci_register_types) diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index fa6ce98..052e26e 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -429,12 +429,12 @@ static const char *ep_state_name(uint32_t state) ARRAY_SIZE(ep_state_names)); } =20 -static bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit) +bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit) { return xhci->flags & (1 << bit); } =20 -static void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit) +void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit) { xhci->flags |=3D (1 << bit); } @@ -3692,13 +3692,6 @@ static Property xhci_properties[] =3D { DEFINE_PROP_END_OF_LIST(), }; =20 -static void xhci_instance_init(Object *obj) -{ - /* QEMU_PCI_CAP_EXPRESS initialization does not depend on QEMU command - * line, therefore, no need to wait to realize like other devices */ - PCI_DEVICE(obj)->cap_present |=3D QEMU_PCI_CAP_EXPRESS; -} - static void xhci_class_init(ObjectClass *klass, void *data) { PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); @@ -3718,7 +3711,6 @@ static const TypeInfo xhci_info =3D { .parent =3D TYPE_PCI_DEVICE, .instance_size =3D sizeof(XHCIState), .class_init =3D xhci_class_init, - .instance_init =3D xhci_instance_init, .abstract =3D true, .interfaces =3D (InterfaceInfo[]) { { INTERFACE_PCIE_DEVICE }, @@ -3727,37 +3719,9 @@ static const TypeInfo xhci_info =3D { }, }; =20 -static void qemu_xhci_class_init(ObjectClass *klass, void *data) -{ - PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); - - k->vendor_id =3D PCI_VENDOR_ID_REDHAT; - k->device_id =3D PCI_DEVICE_ID_REDHAT_XHCI; - k->revision =3D 0x01; -} - -static void qemu_xhci_instance_init(Object *obj) -{ - XHCIState *xhci =3D XHCI(obj); - - xhci->msi =3D ON_OFF_AUTO_OFF; - xhci->msix =3D ON_OFF_AUTO_AUTO; - xhci->numintrs =3D MAXINTRS; - xhci->numslots =3D MAXSLOTS; - xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST); -} - -static const TypeInfo qemu_xhci_info =3D { - .name =3D TYPE_QEMU_XHCI, - .parent =3D TYPE_XHCI, - .class_init =3D qemu_xhci_class_init, - .instance_init =3D qemu_xhci_instance_init, -}; - static void xhci_register_types(void) { type_register_static(&xhci_info); - type_register_static(&qemu_xhci_info); } =20 type_init(xhci_register_types) diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index edbd926..34bdb22 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -232,4 +232,6 @@ struct XHCIState { bool nec_quirks; }; =20 +bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit); +void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit); #endif --=20 2.7.4 From nobody Sat Apr 27 18:09:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1dmarc=pass fromdomain=xilinx.com) ARC-Seal: i=2; a=rsa-sha256; t=1594142021; cv=pass; d=zohomail.com; s=zohoarc; b=dP7pI/iNRxjeo5bP8JAhJPJbDGUjAxohh/kSQqXYoJv0F/jLPiK+O/zJ5jvqeLLktKgfOy8iUa5HJqVavNY4LazJuq3TAlyty01YsO0S4jhSzrLaFGnLu1tnFtCMvlkc7BNqAiFFdi5xiMA9J8sG861Z4jMpclL48szSo5luG6g= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1594142021; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=djbD26+5keGcBJLa9CwzfjV67K1wvcpc8cR+ZzHZVSw=; b=baO9y+ASTWG6+AFrkekvKiVSxaZXYR8OtL68bpyR0IPtxVlMEWVDq9dXHH6xo1+Et9pv83dND9eNJnIT4H2t/u5jKNdh23slg0uBdv3em4ooCWKcJWMoAzS1PvRhjHQ/fwFCxHHzrnYw5H1ToAPs5ZqCGs/tMFm1L/EpN7cb7ZM= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1dmarc=pass fromdomain=xilinx.com) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1594142021174933.1561722266018; Tue, 7 Jul 2020 10:13:41 -0700 (PDT) Received: from localhost ([::1]:48826 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jsrA3-0005BJ-Sk for importer@patchew.org; Tue, 07 Jul 2020 13:13:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44488) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jsqsa-0004Ut-Bq for qemu-devel@nongnu.org; Tue, 07 Jul 2020 12:55:37 -0400 Received: from mail-dm6nam11on2089.outbound.protection.outlook.com ([40.107.223.89]:6218 helo=NAM11-DM6-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jsqsX-0007DN-84 for qemu-devel@nongnu.org; Tue, 07 Jul 2020 12:55:36 -0400 Received: from SN4PR0501CA0081.namprd05.prod.outlook.com (2603:10b6:803:22::19) by DM5PR02MB2458.namprd02.prod.outlook.com (2603:10b6:3:48::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3153.20; Tue, 7 Jul 2020 16:55:30 +0000 Received: from SN1NAM02FT025.eop-nam02.prod.protection.outlook.com (2603:10b6:803:22:cafe::6e) by SN4PR0501CA0081.outlook.office365.com (2603:10b6:803:22::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3174.12 via Frontend Transport; Tue, 7 Jul 2020 16:55:30 +0000 Received: from xsj-pvapsmtpgw01 (149.199.60.83) by SN1NAM02FT025.mail.protection.outlook.com (10.152.72.87) with Microsoft SMTP Server id 15.20.3153.24 via Frontend Transport; Tue, 7 Jul 2020 16:55:29 +0000 Received: from [149.199.38.66] (port=60070 helo=xsj-pvapsmtp01) by xsj-pvapsmtpgw01 with esmtp (Exim 4.90) (envelope-from ) id 1jsqqz-0003h5-IL; Tue, 07 Jul 2020 09:53:57 -0700 Received: from [127.0.0.1] (helo=xsj-smtp-dlp2.xlnx.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jsqsT-0001gW-Gz; Tue, 07 Jul 2020 09:55:29 -0700 Received: from xsj-pvapsmtp01 (mailman.xilinx.com [149.199.38.66]) by xsj-smtp-dlp2.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id 067GtS2P015112; Tue, 7 Jul 2020 09:55:28 -0700 Received: from [10.140.6.35] (helo=xhdsaipava40.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jsqsR-0001gB-Sk; Tue, 07 Jul 2020 09:55:28 -0700 Received: by xhdsaipava40.xilinx.com (Postfix, from userid 14131) id 9154113C0347; Tue, 7 Jul 2020 22:14:49 +0530 (IST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Fk2GyR8LzjkSiCHLXKV6zysdrCgKb3zZOl8ekNoK+1JU9jI829fAwawN9KNSyDHN3XL3Y/VKgArNDhXrIdi7Xn2AXF5g16wf8qEczt7QPw0PpLLyUJAuKcrL5Q5CUn1VmEDmzVeAeUbHRlw9kU5I5eaPJpvIsa1nLmMJlxZTiUOp/R7zEMxUiNoocmRIltLAU8nhMXAa169bFlx9WZa9NmufMLwrhKje6RTE8qX4ZuxgSKy5nyOoyBu441i6qzG91Lv2hEZBtw0j4YT6v5/FydhrBk7+o9SiR8aruQA9E68VyrX4t5DM/X+682vjxqLavy0guPdsifADdZ+SwjKhgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=djbD26+5keGcBJLa9CwzfjV67K1wvcpc8cR+ZzHZVSw=; b=X2RjsED0EIxwVqt4g/cNnwgHMQpny1PENYsZymaojvIY1z3iYXR/4rnpjsnyD3iuMC/IE3eVfp3kUL8NW6Dpv0HsHGqiTfViGVYAght6RHfopqWVFuaeYgjF0anWn7IGmv8uFtVI4IVW2jK6dRvE/m1jFYrsyoUrVXCweLnsAbv4UQRV9ltWEhMXj5G1zT/VlY8dh+q2PYRkJslvc/CFjQ15UUsQnbbUVFLakfDlZjSLapB8xgYgdrBCgyht8d2UPCRjvP2/RbkKqRNppo0TKEd9BOBO3v5SIcBTqAh2E0KH1tUTgwpntJthb320D36Fmoj0z1ZWQpAFab2N4ujXwQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 149.199.60.83) smtp.rcpttodomain=wdc.com smtp.mailfrom=xilinx.com; dmarc=bestguesspass action=none header.from=xilinx.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=xilinx.onmicrosoft.com; s=selector2-xilinx-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=djbD26+5keGcBJLa9CwzfjV67K1wvcpc8cR+ZzHZVSw=; b=VvaqVdmemaLWBVvJHAivjNNDUViEXnF/DNkpIB8b7EPuA17BMqR5XsReAj21WaeBD/8A2s8/xrolwod7tS04l8qpPycAhHvZLZkeJXX2ZfjQtrEg7XExgvlIoYt9VUaITKxRzNAs6UPNKZELG+sPLqUaoY0EEEcvqfPJ/t2J9XU= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=xilinx.com; wdc.com; dkim=none (message not signed) header.d=none;wdc.com; dmarc=bestguesspass action=none header.from=xilinx.com; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: Pass (protection.outlook.com: domain of xilinx.com designates 149.199.60.83 as permitted sender) receiver=protection.outlook.com; client-ip=149.199.60.83; helo=xsj-pvapsmtpgw01; From: Sai Pavan Boddu To: Gerd Hoffmann , Peter Maydell , Markus Armbruster Subject: [PATCH v3 3/3] usb/hcd-xhci: Split pci wrapper for xhci base model Date: Tue, 7 Jul 2020 22:14:31 +0530 Message-Id: <1594140271-16462-4-git-send-email-sai.pavan.boddu@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1594140271-16462-1-git-send-email-sai.pavan.boddu@xilinx.com> References: <1594140271-16462-1-git-send-email-sai.pavan.boddu@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:xsj-pvapsmtpgw01; PTR:unknown-60-83.xilinx.com; CAT:NONE; SFTY:; SFS:(46966005)(186003)(30864003)(83380400001)(26005)(8676002)(498600001)(82310400002)(70206006)(107886003)(4326008)(8936002)(356005)(81166007)(42186006)(70586007)(110136005)(36756003)(6666004)(426003)(6266002)(47076004)(5660300002)(2906002)(7416002)(336012)(2616005)(54906003)(2004002)(309714004); DIR:OUT; SFP:1101; X-MS-PublicTrafficType: Email MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 1ee3ec9e-bc2a-4d49-85f2-08d822968e30 X-MS-TrafficTypeDiagnostic: DM5PR02MB2458: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:98; X-Forefront-PRVS: 0457F11EAF X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: BHj1pA3RVOaJoNrpcrksFuM0gKHVg1G6x39kcjq9SCZ+eU+Pe6INvmqpbqnzdAT8n/mEyFm3fSyGtks3N+pFoJtqeLXu3+YYCFo4F0fqTHoamWoEM/oDd8MsgB2J/j91Q/yZ+iS38x1Wl4uwwDuwyoiQmfQnnDkje++HcIAgINn6s2jiO4trBkxUqjDWSVInWgfNB/0JG3twuwtveMAkpwW7w3MFLMn5qLmC+ao731lvRhJIoXyeNROutxPiNDVoVSPdiflyWl5opj22qpBHWAmeugmMHiAXslWrybewOx/VaQXNcD/oLy3886RsKzElpyLuesYLvIlYfanxNvjQZ8OHWaNxoKGJHMu/a+n6ddo6INoVUdeeh73+eiRZ1bfLlS69c1siPfOlP2YvvlPDq9ZJHi8ZT/kgN+5zRlKNVECBQ9dbwLZQcUeHFfLD7lXUz7uEytKdz5ZRzeP3L19YeUWmgK52UcufLqlAV1aKG3qJCRrAT2IOq01wrGnIyLiAzIbAnGmOWevq08KALwIaSQ== X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jul 2020 16:55:29.8728 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1ee3ec9e-bc2a-4d49-85f2-08d822968e30 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-AuthSource: SN1NAM02FT025.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR02MB2458 Received-SPF: pass client-ip=40.107.223.89; envelope-from=saipava@xilinx.com; helo=NAM11-DM6-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/07/07 12:55:32 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Eduardo Habkost , Vikram Garhwal , sai.pavan.boddu@xilinx.com, qemu-devel@nongnu.org, Paul Zimmerman , Alistair Francis , Paolo Bonzini , Ying Fang , =?UTF-8?q?=27Marc-Andr=C3=A9=20Lureau=27?= , =?UTF-8?q?=27Philippe=20Mathieu-Daud=C3=A9=27?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @xilinx.onmicrosoft.com) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch sets the base to use xhci as sysbus model, for which pci specific hooks are moved to hcd-xhci-pci.c. As a part of this requirment msi/msix interrupts handling is moved under XHCIPCIState. Made required changes for qemu-xhci-nec. Signed-off-by: Sai Pavan Boddu --- hw/usb/Kconfig | 6 ++ hw/usb/Makefile.objs | 1 + hw/usb/hcd-xhci-nec.c | 18 ++--- hw/usb/hcd-xhci-pci.c | 188 +++++++++++++++++++++++++++++++++++++++++++++-- hw/usb/hcd-xhci-pci.h | 45 ++++++++++++ hw/usb/hcd-xhci.c | 197 ++++++++++------------------------------------= ---- hw/usb/hcd-xhci.h | 15 ++-- 7 files changed, 291 insertions(+), 179 deletions(-) create mode 100644 hw/usb/hcd-xhci-pci.h diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig index d4d8c37..d9965c1 100644 --- a/hw/usb/Kconfig +++ b/hw/usb/Kconfig @@ -36,6 +36,12 @@ config USB_XHCI depends on PCI select USB =20 +config USB_XHCI_PCI + bool + default y if PCI_DEVICES + depends on PCI + select USB_XHCI + config USB_XHCI_NEC bool default y if PCI_DEVICES diff --git a/hw/usb/Makefile.objs b/hw/usb/Makefile.objs index fa5c3fa..98b1899 100644 --- a/hw/usb/Makefile.objs +++ b/hw/usb/Makefile.objs @@ -11,6 +11,7 @@ common-obj-$(CONFIG_USB_EHCI_PCI) +=3D hcd-ehci-pci.o common-obj-$(CONFIG_USB_EHCI_SYSBUS) +=3D hcd-ehci-sysbus.o common-obj-$(CONFIG_USB_XHCI) +=3D hcd-xhci.o common-obj-$(CONFIG_USB_XHCI_NEC) +=3D hcd-xhci-nec.o +common-obj-$(CONFIG_USB_XHCI_PCI) +=3D hcd-xhci-pci.o common-obj-$(CONFIG_USB_MUSB) +=3D hcd-musb.o common-obj-$(CONFIG_USB_DWC2) +=3D hcd-dwc2.o =20 diff --git a/hw/usb/hcd-xhci-nec.c b/hw/usb/hcd-xhci-nec.c index e6a5a22..2efa6fa 100644 --- a/hw/usb/hcd-xhci-nec.c +++ b/hw/usb/hcd-xhci-nec.c @@ -25,17 +25,17 @@ #include "hw/pci/pci.h" #include "hw/qdev-properties.h" =20 -#include "hcd-xhci.h" +#include "hcd-xhci-pci.h" =20 static Property nec_xhci_properties[] =3D { - DEFINE_PROP_ON_OFF_AUTO("msi", XHCIState, msi, ON_OFF_AUTO_AUTO), - DEFINE_PROP_ON_OFF_AUTO("msix", XHCIState, msix, ON_OFF_AUTO_AUTO), - DEFINE_PROP_BIT("superspeed-ports-first", - XHCIState, flags, XHCI_FLAG_SS_FIRST, true), - DEFINE_PROP_BIT("force-pcie-endcap", XHCIState, flags, + DEFINE_PROP_ON_OFF_AUTO("msi", XHCIPciState, msi, ON_OFF_AUTO_AUTO), + DEFINE_PROP_ON_OFF_AUTO("msix", XHCIPciState, msix, ON_OFF_AUTO_AUTO), + DEFINE_PROP_BIT("superspeed-ports-first", XHCIPciState, + xhci.flags, XHCI_FLAG_SS_FIRST, true), + DEFINE_PROP_BIT("force-pcie-endcap", XHCIPciState, xhci.flags, XHCI_FLAG_FORCE_PCIE_ENDCAP, false), - DEFINE_PROP_UINT32("intrs", XHCIState, numintrs, MAXINTRS), - DEFINE_PROP_UINT32("slots", XHCIState, numslots, MAXSLOTS), + DEFINE_PROP_UINT32("intrs", XHCIPciState, xhci.numintrs, MAXINTRS), + DEFINE_PROP_UINT32("slots", XHCIPciState, xhci.numslots, MAXSLOTS), DEFINE_PROP_END_OF_LIST(), }; =20 @@ -52,7 +52,7 @@ static void nec_xhci_class_init(ObjectClass *klass, void = *data) =20 static const TypeInfo nec_xhci_info =3D { .name =3D TYPE_NEC_XHCI, - .parent =3D TYPE_XHCI, + .parent =3D TYPE_XHCI_PCI, .class_init =3D nec_xhci_class_init, }; =20 diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c index 26af683..fe6bbb1 100644 --- a/hw/usb/hcd-xhci-pci.c +++ b/hw/usb/hcd-xhci-pci.c @@ -23,12 +23,188 @@ #include "qemu/osdep.h" #include "hw/pci/pci.h" #include "hw/qdev-properties.h" +#include "migration/vmstate.h" #include "hw/pci/msi.h" #include "hw/pci/msix.h" -#include "hcd-xhci.h" +#include "hcd-xhci-pci.h" #include "trace.h" #include "qapi/error.h" =20 +#define OFF_MSIX_TABLE 0x3000 +#define OFF_MSIX_PBA 0x3800 + +static void xhci_pci_intr_update(XHCIState *xhci, int n, bool enable) +{ + XHCIPciState *s =3D container_of(xhci, XHCIPciState, xhci); + PCIDevice *pci_dev =3D PCI_DEVICE(s); + + if (!msix_enabled(pci_dev)) { + return; + } + if (enable =3D=3D !!s->msix_used[n]) { + return; + } + if (enable) { + trace_usb_xhci_irq_msix_use(n); + msix_vector_use(pci_dev, n); + s->msix_used[n] =3D 1; + } else { + trace_usb_xhci_irq_msix_unuse(n); + msix_vector_unuse(pci_dev, n); + s->msix_used[n] =3D 0; + } +} + +static void xhci_pci_intr_raise(XHCIState *xhci, int n, bool level) +{ + XHCIPciState *s =3D container_of(xhci, XHCIPciState, xhci); + PCIDevice *pci_dev =3D PCI_DEVICE(s); + + if (n =3D=3D 0 && + !(msix_enabled(pci_dev) || + msi_enabled(pci_dev))) { + pci_set_irq(pci_dev, level); + } + if (msix_enabled(pci_dev)) { + msix_notify(pci_dev, n); + return; + } + + if (msi_enabled(pci_dev)) { + msi_notify(pci_dev, n); + return; + } +} + +static void xhci_pci_reset(DeviceState *dev) +{ + XHCIPciState *s =3D XHCI_PCI(dev); + + device_legacy_reset(DEVICE(&s->xhci)); +} + +static void usb_xhci_pci_realize(struct PCIDevice *dev, Error **errp) +{ + int ret; + Error *err =3D NULL; + XHCIPciState *s =3D XHCI_PCI(dev); + + dev->config[PCI_CLASS_PROG] =3D 0x30; /* xHCI */ + dev->config[PCI_INTERRUPT_PIN] =3D 0x01; /* interrupt pin 1 */ + dev->config[PCI_CACHE_LINE_SIZE] =3D 0x10; + dev->config[0x60] =3D 0x30; /* release number */ + + object_property_set_link(OBJECT(&s->xhci), OBJECT(s), "host", NULL); + s->xhci.intr_update =3D xhci_pci_intr_update; + s->xhci.intr_raise =3D xhci_pci_intr_raise; + object_property_set_bool(OBJECT(&s->xhci), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + if (strcmp(object_get_typename(OBJECT(dev)), TYPE_NEC_XHCI) =3D=3D 0) { + s->xhci.nec_quirks =3D true; + } + + if (s->msi !=3D ON_OFF_AUTO_OFF) { + ret =3D msi_init(dev, 0x70, s->xhci.numintrs, true, false, &err); + /* + * Any error other than -ENOTSUP(board's MSI support is broken) + * is a programming error + */ + assert(!ret || ret =3D=3D -ENOTSUP); + if (ret && s->msi =3D=3D ON_OFF_AUTO_ON) { + /* Can't satisfy user's explicit msi=3Don request, fail */ + error_append_hint(&err, "You have to use msi=3Dauto (default) = or " + "msi=3Doff with this machine type.\n"); + error_propagate(errp, err); + return; + } + assert(!err || s->msi =3D=3D ON_OFF_AUTO_AUTO); + /* With msi=3Dauto, we fall back to MSI off silently */ + error_free(err); + } + pci_register_bar(dev, 0, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &s->xhci.mem); + + if (pci_bus_is_express(pci_get_bus(dev)) || + xhci_get_flag(&s->xhci, XHCI_FLAG_FORCE_PCIE_ENDCAP)) { + ret =3D pcie_endpoint_cap_init(dev, 0xa0); + assert(ret > 0); + } + + if (s->msix !=3D ON_OFF_AUTO_OFF) { + /* TODO check for errors, and should fail when msix=3Don */ + msix_init(dev, s->xhci.numintrs, + &s->xhci.mem, 0, OFF_MSIX_TABLE, + &s->xhci.mem, 0, OFF_MSIX_PBA, + 0x90, NULL); + } + s->xhci.as =3D pci_get_address_space(dev); +} + +static void usb_xhci_pci_exit(PCIDevice *dev) +{ + XHCIPciState *s =3D XHCI_PCI(dev); + /* destroy msix memory region */ + if (dev->msix_table && dev->msix_pba + && dev->msix_entry_used) { + msix_uninit(dev, &s->xhci.mem, &s->xhci.mem); + } +} + +static const VMStateDescription vmstate_xhci_pci =3D { + .name =3D "xhci-pci", + .version_id =3D 1, + .fields =3D (VMStateField[]) { + VMSTATE_PCI_DEVICE(parent_obj, XHCIPciState), + VMSTATE_MSIX(parent_obj, XHCIPciState), + VMSTATE_UINT8_ARRAY(msix_used, XHCIPciState, MAXINTRS), + VMSTATE_END_OF_LIST() + } +}; + +static void xhci_instance_init(Object *obj) +{ + XHCIPciState *s =3D XHCI_PCI(obj); + /* + * QEMU_PCI_CAP_EXPRESS initialization does not depend on QEMU command + * line, therefore, no need to wait to realize like other devices + */ + PCI_DEVICE(obj)->cap_present |=3D QEMU_PCI_CAP_EXPRESS; + object_initialize_child(obj, "xhci-core", &s->xhci, TYPE_XHCI); + qdev_alias_all_properties(DEVICE(&s->xhci), obj); +} + +static void xhci_class_init(ObjectClass *klass, void *data) +{ + PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->reset =3D xhci_pci_reset; + dc->vmsd =3D &vmstate_xhci_pci; + set_bit(DEVICE_CATEGORY_USB, dc->categories); + k->realize =3D usb_xhci_pci_realize; + k->exit =3D usb_xhci_pci_exit; + k->class_id =3D PCI_CLASS_SERIAL_USB; +} + +static const TypeInfo xhci_pci_info =3D { + .name =3D TYPE_XHCI_PCI, + .parent =3D TYPE_PCI_DEVICE, + .instance_size =3D sizeof(XHCIPciState), + .class_init =3D xhci_class_init, + .instance_init =3D xhci_instance_init, + .abstract =3D true, + .interfaces =3D (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, +}; + static void qemu_xhci_class_init(ObjectClass *klass, void *data) { PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); @@ -40,10 +216,11 @@ static void qemu_xhci_class_init(ObjectClass *klass, v= oid *data) =20 static void qemu_xhci_instance_init(Object *obj) { - XHCIState *xhci =3D XHCI(obj); + XHCIPciState *s =3D XHCI_PCI(obj); + XHCIState *xhci =3D &s->xhci; =20 - xhci->msi =3D ON_OFF_AUTO_OFF; - xhci->msix =3D ON_OFF_AUTO_AUTO; + s->msi =3D ON_OFF_AUTO_OFF; + s->msix =3D ON_OFF_AUTO_AUTO; xhci->numintrs =3D MAXINTRS; xhci->numslots =3D MAXSLOTS; xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST); @@ -51,13 +228,14 @@ static void qemu_xhci_instance_init(Object *obj) =20 static const TypeInfo qemu_xhci_info =3D { .name =3D TYPE_QEMU_XHCI, - .parent =3D TYPE_XHCI, + .parent =3D TYPE_XHCI_PCI, .class_init =3D qemu_xhci_class_init, .instance_init =3D qemu_xhci_instance_init, }; =20 static void xhci_register_types(void) { + type_register_static(&xhci_pci_info); type_register_static(&qemu_xhci_info); } =20 diff --git a/hw/usb/hcd-xhci-pci.h b/hw/usb/hcd-xhci-pci.h new file mode 100644 index 0000000..e7c005e --- /dev/null +++ b/hw/usb/hcd-xhci-pci.h @@ -0,0 +1,45 @@ +/* + * USB xHCI controller emulation + * + * Copyright (c) 2011 Securiforest + * Date: 2011-05-11 ; Author: Hector Martin + * Based on usb-ohci.c, emulates Renesas NEC USB 3.0 + * Date: 2020-01-1; Author: Sai Pavan Boddu + * PCI hooks are moved from XHCIState to XHCIPciState + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef HW_USB_HCD_XHCI_PCI_H +#define HW_USB_HCD_XHCI_PCI_H + +#include "hw/usb.h" +#include "hcd-xhci.h" + +#define TYPE_XHCI_PCI "pci-xhci" +#define XHCI_PCI(obj) \ + OBJECT_CHECK(XHCIPciState, (obj), TYPE_XHCI_PCI) + + +typedef struct XHCIPciState { + /*< private >*/ + PCIDevice parent_obj; + /*< public >*/ + XHCIState xhci; + OnOffAuto msi; + OnOffAuto msix; + uint8_t msix_used[MAXINTRS]; +} XHCIPciState; + +#endif diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index 052e26e..450a935 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -25,10 +25,7 @@ #include "qemu/queue.h" #include "hw/usb.h" #include "migration/vmstate.h" -#include "hw/pci/pci.h" #include "hw/qdev-properties.h" -#include "hw/pci/msi.h" -#include "hw/pci/msix.h" #include "trace.h" #include "qapi/error.h" =20 @@ -57,8 +54,6 @@ #define OFF_OPER LEN_CAP #define OFF_RUNTIME 0x1000 #define OFF_DOORBELL 0x2000 -#define OFF_MSIX_TABLE 0x3000 -#define OFF_MSIX_PBA 0x3800 /* must be power of 2 */ #define LEN_REGS 0x4000 =20 @@ -548,54 +543,28 @@ static XHCIPort *xhci_lookup_port(XHCIState *xhci, st= ruct USBPort *uport) return &xhci->ports[index]; } =20 -static void xhci_intx_update(XHCIState *xhci) +static void xhci_intr_update(XHCIState *xhci, int v) { - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); int level =3D 0; =20 - if (msix_enabled(pci_dev) || - msi_enabled(pci_dev)) { - return; - } - - if (xhci->intr[0].iman & IMAN_IP && - xhci->intr[0].iman & IMAN_IE && - xhci->usbcmd & USBCMD_INTE) { - level =3D 1; - } - - trace_usb_xhci_irq_intx(level); - pci_set_irq(pci_dev, level); -} - -static void xhci_msix_update(XHCIState *xhci, int v) -{ - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); - bool enabled; - - if (!msix_enabled(pci_dev)) { - return; - } - - enabled =3D xhci->intr[v].iman & IMAN_IE; - if (enabled =3D=3D xhci->intr[v].msix_used) { - return; + if (v =3D=3D 0) { + if (xhci->intr[0].iman & IMAN_IP && + xhci->intr[0].iman & IMAN_IE && + xhci->usbcmd & USBCMD_INTE) { + level =3D 1; + } + if (xhci->intr_raise) { + xhci->intr_raise(xhci, 0, level); + } } - - if (enabled) { - trace_usb_xhci_irq_msix_use(v); - msix_vector_use(pci_dev, v); - xhci->intr[v].msix_used =3D true; - } else { - trace_usb_xhci_irq_msix_unuse(v); - msix_vector_unuse(pci_dev, v); - xhci->intr[v].msix_used =3D false; + if (xhci->intr_update) { + xhci->intr_update(xhci, v, + xhci->intr[v].iman & IMAN_IE); } } =20 static void xhci_intr_raise(XHCIState *xhci, int v) { - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); bool pending =3D (xhci->intr[v].erdp_low & ERDP_EHB); =20 xhci->intr[v].erdp_low |=3D ERDP_EHB; @@ -612,22 +581,8 @@ static void xhci_intr_raise(XHCIState *xhci, int v) if (!(xhci->usbcmd & USBCMD_INTE)) { return; } - - if (msix_enabled(pci_dev)) { - trace_usb_xhci_irq_msix(v); - msix_notify(pci_dev, v); - return; - } - - if (msi_enabled(pci_dev)) { - trace_usb_xhci_irq_msi(v); - msi_notify(pci_dev, v); - return; - } - - if (v =3D=3D 0) { - trace_usb_xhci_irq_intx(1); - pci_irq_assert(pci_dev); + if (xhci->intr_raise) { + xhci->intr_raise(xhci, v, true); } } =20 @@ -2715,7 +2670,6 @@ static void xhci_reset(DeviceState *dev) xhci->intr[i].erstba_high =3D 0; xhci->intr[i].erdp_low =3D 0; xhci->intr[i].erdp_high =3D 0; - xhci->intr[i].msix_used =3D 0; =20 xhci->intr[i].er_ep_idx =3D 0; xhci->intr[i].er_pcs =3D 1; @@ -2937,8 +2891,7 @@ static uint64_t xhci_oper_read(void *ptr, hwaddr reg,= unsigned size) static void xhci_oper_write(void *ptr, hwaddr reg, uint64_t val, unsigned size) { - XHCIState *xhci =3D ptr; - DeviceState *d =3D DEVICE(ptr); + XHCIState *xhci =3D XHCI(ptr); =20 trace_usb_xhci_oper_write(reg, val); =20 @@ -2960,15 +2913,15 @@ static void xhci_oper_write(void *ptr, hwaddr reg, xhci->usbcmd =3D val & 0xc0f; xhci_mfwrap_update(xhci); if (val & USBCMD_HCRST) { - xhci_reset(d); + xhci_reset(DEVICE(xhci)); } - xhci_intx_update(xhci); + xhci_intr_update(xhci, 0); break; =20 case 0x04: /* USBSTS */ /* these bits are write-1-to-clear */ xhci->usbsts &=3D ~(val & (USBSTS_HSE|USBSTS_EINT|USBSTS_PCD|USBST= S_SRE)); - xhci_intx_update(xhci); + xhci_intr_update(xhci, 0); break; =20 case 0x14: /* DNCTRL */ @@ -3071,10 +3024,7 @@ static void xhci_runtime_write(void *ptr, hwaddr reg, } intr->iman &=3D ~IMAN_IE; intr->iman |=3D val & IMAN_IE; - if (v =3D=3D 0) { - xhci_intx_update(xhci); - } - xhci_msix_update(xhci, v); + xhci_intr_update(xhci, v); break; case 0x04: /* IMOD */ intr->imod =3D val; @@ -3319,7 +3269,6 @@ static USBBusOps xhci_bus_ops =3D { =20 static void usb_xhci_init(XHCIState *xhci) { - DeviceState *dev =3D DEVICE(xhci); XHCIPort *port; unsigned int i, usbports, speedmask; =20 @@ -3334,7 +3283,7 @@ static void usb_xhci_init(XHCIState *xhci) usbports =3D MAX(xhci->numports_2, xhci->numports_3); xhci->numports =3D xhci->numports_2 + xhci->numports_3; =20 - usb_bus_new(&xhci->bus, sizeof(xhci->bus), &xhci_bus_ops, dev); + usb_bus_new(&xhci->bus, sizeof(xhci->bus), &xhci_bus_ops, xhci->hostOp= aque); =20 for (i =3D 0; i < usbports; i++) { speedmask =3D 0; @@ -3374,21 +3323,12 @@ static void usb_xhci_init(XHCIState *xhci) } } =20 -static void usb_xhci_realize(struct PCIDevice *dev, Error **errp) +static void usb_xhci_realize(DeviceState *dev, Error **errp) { - int i, ret; - Error *err =3D NULL; + int i; =20 XHCIState *xhci =3D XHCI(dev); =20 - dev->config[PCI_CLASS_PROG] =3D 0x30; /* xHCI */ - dev->config[PCI_INTERRUPT_PIN] =3D 0x01; /* interrupt pin 1 */ - dev->config[PCI_CACHE_LINE_SIZE] =3D 0x10; - dev->config[0x60] =3D 0x30; /* release number */ - - if (strcmp(object_get_typename(OBJECT(dev)), TYPE_NEC_XHCI) =3D=3D 0) { - xhci->nec_quirks =3D true; - } if (xhci->numintrs > MAXINTRS) { xhci->numintrs =3D MAXINTRS; } @@ -3410,36 +3350,18 @@ static void usb_xhci_realize(struct PCIDevice *dev,= Error **errp) xhci->max_pstreams_mask =3D 0; } =20 - if (xhci->msi !=3D ON_OFF_AUTO_OFF) { - ret =3D msi_init(dev, 0x70, xhci->numintrs, true, false, &err); - /* Any error other than -ENOTSUP(board's MSI support is broken) - * is a programming error */ - assert(!ret || ret =3D=3D -ENOTSUP); - if (ret && xhci->msi =3D=3D ON_OFF_AUTO_ON) { - /* Can't satisfy user's explicit msi=3Don request, fail */ - error_append_hint(&err, "You have to use msi=3Dauto (default) = or " - "msi=3Doff with this machine type.\n"); - error_propagate(errp, err); - return; - } - assert(!err || xhci->msi =3D=3D ON_OFF_AUTO_AUTO); - /* With msi=3Dauto, we fall back to MSI off silently */ - error_free(err); - } - usb_xhci_init(xhci); - xhci->as =3D pci_get_address_space(dev); xhci->mfwrap_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, xhci_mfwrap_ti= mer, xhci); =20 - memory_region_init(&xhci->mem, OBJECT(xhci), "xhci", LEN_REGS); - memory_region_init_io(&xhci->mem_cap, OBJECT(xhci), &xhci_cap_ops, xhc= i, + memory_region_init(&xhci->mem, OBJECT(dev), "xhci", LEN_REGS); + memory_region_init_io(&xhci->mem_cap, OBJECT(dev), &xhci_cap_ops, xhci, "capabilities", LEN_CAP); - memory_region_init_io(&xhci->mem_oper, OBJECT(xhci), &xhci_oper_ops, x= hci, + memory_region_init_io(&xhci->mem_oper, OBJECT(dev), &xhci_oper_ops, xh= ci, "operational", 0x400); - memory_region_init_io(&xhci->mem_runtime, OBJECT(xhci), &xhci_runtime_= ops, xhci, - "runtime", LEN_RUNTIME); - memory_region_init_io(&xhci->mem_doorbell, OBJECT(xhci), &xhci_doorbel= l_ops, xhci, - "doorbell", LEN_DOORBELL); + memory_region_init_io(&xhci->mem_runtime, OBJECT(dev), &xhci_runtime_o= ps, + xhci, "runtime", LEN_RUNTIME); + memory_region_init_io(&xhci->mem_doorbell, OBJECT(dev), &xhci_doorbell= _ops, + xhci, "doorbell", LEN_DOORBELL); =20 memory_region_add_subregion(&xhci->mem, 0, &xhci->mem_cap); memory_region_add_subregion(&xhci->mem, OFF_OPER, &xhci->mem_oper); @@ -3450,31 +3372,13 @@ static void usb_xhci_realize(struct PCIDevice *dev,= Error **errp) XHCIPort *port =3D &xhci->ports[i]; uint32_t offset =3D OFF_OPER + 0x400 + 0x10 * i; port->xhci =3D xhci; - memory_region_init_io(&port->mem, OBJECT(xhci), &xhci_port_ops, po= rt, + memory_region_init_io(&port->mem, OBJECT(dev), &xhci_port_ops, por= t, port->name, 0x10); memory_region_add_subregion(&xhci->mem, offset, &port->mem); } - - pci_register_bar(dev, 0, - PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TY= PE_64, - &xhci->mem); - - if (pci_bus_is_express(pci_get_bus(dev)) || - xhci_get_flag(xhci, XHCI_FLAG_FORCE_PCIE_ENDCAP)) { - ret =3D pcie_endpoint_cap_init(dev, 0xa0); - assert(ret > 0); - } - - if (xhci->msix !=3D ON_OFF_AUTO_OFF) { - /* TODO check for errors, and should fail when msix=3Don */ - msix_init(dev, xhci->numintrs, - &xhci->mem, 0, OFF_MSIX_TABLE, - &xhci->mem, 0, OFF_MSIX_PBA, - 0x90, NULL); - } } =20 -static void usb_xhci_exit(PCIDevice *dev) +static void usb_xhci_unrealize(DeviceState *dev) { int i; XHCIState *xhci =3D XHCI(dev); @@ -3501,19 +3405,12 @@ static void usb_xhci_exit(PCIDevice *dev) memory_region_del_subregion(&xhci->mem, &port->mem); } =20 - /* destroy msix memory region */ - if (dev->msix_table && dev->msix_pba - && dev->msix_entry_used) { - msix_uninit(dev, &xhci->mem, &xhci->mem); - } - usb_bus_release(&xhci->bus); } =20 static int usb_xhci_post_load(void *opaque, int version_id) { XHCIState *xhci =3D opaque; - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); XHCISlot *slot; XHCIEPContext *epctx; dma_addr_t dcbaap, pctx; @@ -3559,11 +3456,7 @@ static int usb_xhci_post_load(void *opaque, int vers= ion_id) } =20 for (intr =3D 0; intr < xhci->numintrs; intr++) { - if (xhci->intr[intr].msix_used) { - msix_vector_use(pci_dev, intr); - } else { - msix_vector_unuse(pci_dev, intr); - } + xhci_intr_update(xhci, intr); } =20 return 0; @@ -3632,7 +3525,6 @@ static const VMStateDescription vmstate_xhci_intr =3D= { VMSTATE_UINT32(erdp_high, XHCIInterrupter), =20 /* state */ - VMSTATE_BOOL(msix_used, XHCIInterrupter), VMSTATE_BOOL(er_pcs, XHCIInterrupter), VMSTATE_UINT64(er_start, XHCIInterrupter), VMSTATE_UINT32(er_size, XHCIInterrupter), @@ -3655,9 +3547,6 @@ static const VMStateDescription vmstate_xhci =3D { .version_id =3D 1, .post_load =3D usb_xhci_post_load, .fields =3D (VMStateField[]) { - VMSTATE_PCI_DEVICE(parent_obj, XHCIState), - VMSTATE_MSIX(parent_obj, XHCIState), - VMSTATE_STRUCT_VARRAY_UINT32(ports, XHCIState, numports, 1, vmstate_xhci_port, XHCIPort), VMSTATE_STRUCT_VARRAY_UINT32(slots, XHCIState, numslots, 1, @@ -3689,34 +3578,28 @@ static Property xhci_properties[] =3D { XHCI_FLAG_ENABLE_STREAMS, true), DEFINE_PROP_UINT32("p2", XHCIState, numports_2, 4), DEFINE_PROP_UINT32("p3", XHCIState, numports_3, 4), + DEFINE_PROP_LINK("host", XHCIState, hostOpaque, TYPE_DEVICE, + DeviceState *), DEFINE_PROP_END_OF_LIST(), }; =20 static void xhci_class_init(ObjectClass *klass, void *data) { - PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); DeviceClass *dc =3D DEVICE_CLASS(klass); =20 + dc->realize =3D usb_xhci_realize; + dc->unrealize =3D usb_xhci_unrealize; + dc->reset =3D xhci_reset; dc->vmsd =3D &vmstate_xhci; device_class_set_props(dc, xhci_properties); - dc->reset =3D xhci_reset; - set_bit(DEVICE_CATEGORY_USB, dc->categories); - k->realize =3D usb_xhci_realize; - k->exit =3D usb_xhci_exit; - k->class_id =3D PCI_CLASS_SERIAL_USB; + dc->user_creatable =3D false; } =20 static const TypeInfo xhci_info =3D { .name =3D TYPE_XHCI, - .parent =3D TYPE_PCI_DEVICE, + .parent =3D TYPE_DEVICE, .instance_size =3D sizeof(XHCIState), .class_init =3D xhci_class_init, - .abstract =3D true, - .interfaces =3D (InterfaceInfo[]) { - { INTERFACE_PCIE_DEVICE }, - { INTERFACE_CONVENTIONAL_PCI_DEVICE }, - { } - }, }; =20 static void xhci_register_types(void) diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index 34bdb22..dcdffd8 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -170,7 +170,7 @@ typedef struct XHCIInterrupter { uint32_t erdp_low; uint32_t erdp_high; =20 - bool msix_used, er_pcs; + bool er_pcs; =20 dma_addr_t er_start; uint32_t er_size; @@ -184,10 +184,8 @@ typedef struct XHCIInterrupter { =20 } XHCIInterrupter; =20 -struct XHCIState { - /*< private >*/ - PCIDevice parent_obj; - /*< public >*/ +typedef struct XHCIState { + DeviceState parent; =20 USBBus bus; MemoryRegion mem; @@ -204,8 +202,9 @@ struct XHCIState { uint32_t numslots; uint32_t flags; uint32_t max_pstreams_mask; - OnOffAuto msi; - OnOffAuto msix; + void (*intr_update)(XHCIState *s, int n, bool enable); + void (*intr_raise)(XHCIState *s, int n, bool level); + DeviceState *hostOpaque; =20 /* Operational Registers */ uint32_t usbcmd; @@ -230,7 +229,7 @@ struct XHCIState { XHCIRing cmd_ring; =20 bool nec_quirks; -}; +} XHCIState; =20 bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit); void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit); --=20 2.7.4