From nobody Mon May 6 12:14:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1593991413; cv=none; d=zohomail.com; s=zohoarc; b=XvGSe3PqCsWd/UMltTiqZc9mZPrJViuIYSpv8aB6EWdNjMYU6vZpjzTGlOxe6sBYzuF5wlCPkXU0CMO17LE/dfeo25jTU0wPkIhTy0VYPYGSkohi9PnVrXgKz6ln1tiBoH+O+FNdbobxBLoRlSsHpud0ZGVjbk951sPKlUsrXlA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1593991413; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=iqXmku9C5oX5TmRqo0F4sM6jDHzt1ALGPypEUOod5AU=; b=YTFzZ7OBdDofHVorxAj9JNB+T4yZ9UouEcudK7nUneNlgLhjdiJi2OitcMP2JxyHYFb5zKNfuSBvuWJdyab4xDTZn+1rP9w3f8GY4jJXBeZG9NHg/J7VdEPyMN7adeVk4Gj7YTwe1YltblXkSagVZHVZQMctaqMMUQ5EPvegc1E= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1593991413779148.31832098246082; Sun, 5 Jul 2020 16:23:33 -0700 (PDT) Received: from localhost ([::1]:35986 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jsDyu-0004i2-Be for importer@patchew.org; Sun, 05 Jul 2020 19:23:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48866) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jsDy7-0003Pj-0Y for qemu-devel@nongnu.org; Sun, 05 Jul 2020 19:22:43 -0400 Received: from mga17.intel.com ([192.55.52.151]:47203) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jsDy4-0008JT-3J for qemu-devel@nongnu.org; Sun, 05 Jul 2020 19:22:42 -0400 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jul 2020 16:22:32 -0700 Received: from unknown (HELO localhost.localdomain.bj.intel.com) ([10.238.156.127]) by fmsmga001.fm.intel.com with ESMTP; 05 Jul 2020 16:22:32 -0700 IronPort-SDR: wbWzaOcBxL8b2F2m0nabkeLBEqlac9peVESLWE+Q5nLW58J49HIJzs/glhLT5+V1Lk8l0VMxSp jiOwl0cN5CTw== X-IronPort-AV: E=McAfee;i="6000,8403,9673"; a="127412308" X-IronPort-AV: E=Sophos;i="5.75,317,1589266800"; d="scan'208";a="127412308" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False IronPort-SDR: owIgXnEnycUTI/OUAluS49bm4mQ4p8m6bE0U/JHEa8OwEwv8GHczAD0qgJIODHc2Lqswm+mZ7m ADgfpmM/G77g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,317,1589266800"; d="scan'208";a="388044992" From: Cathy Zhang To: qemu-devel@nongnu.org Subject: [PATCH 1/2] target/i386: Add SERIALIZE cpu feature Date: Mon, 6 Jul 2020 07:17:15 +0800 Message-Id: <1593991036-12183-2-git-send-email-cathy.zhang@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1593991036-12183-1-git-send-email-cathy.zhang@intel.com> References: <1593991036-12183-1-git-send-email-cathy.zhang@intel.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=192.55.52.151; envelope-from=cathy.zhang@intel.com; helo=mga17.intel.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/07/05 19:22:32 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Cathy Zhang , pbonzini@redhat.com, ehabkost@redhat.com, rth@twiddle.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The availability of the SERIALIZATION instruction is indicated by the presence of the CPUID feature flag SERIALIZE, which is defined as CPUID.(EAX=3D7,ECX=3D0):ECX[bit 14]. The release spec link is as follows: https://software.intel.com/content/dam/develop/public/us/en/documents/\ architecture-instruction-set-extensions-programming-reference.pdf The associated kvm patch link is as follows: https://lore.kernel.org/patchwork/patch/1268025/ Signed-off-by: Cathy Zhang --- target/i386/cpu.c | 2 +- target/i386/cpu.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 36cbd3d..92716f4 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -986,7 +986,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS]= =3D { NULL, NULL, "avx512-4vnniw", "avx512-4fmaps", NULL, NULL, NULL, NULL, "avx512-vp2intersect", NULL, "md-clear", NULL, - NULL, NULL, NULL, NULL, + NULL, NULL, "serialize", NULL, NULL, NULL, NULL /* pconfig */, NULL, NULL, NULL, NULL, NULL, NULL, NULL, "spec-ctrl", "stibp", diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 7d77efd..3ef1123 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -777,6 +777,8 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Vector Pair Intersection to a Pair of Mask Registers */ #define CPUID_7_0_EDX_AVX512_VP2INTERSECT (1U << 8) +/* SERIALIZE instruction */ +#define CPUID_7_0_EDX_SERIALIZE (1U << 14) /* Speculation Control */ #define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Single Thread Indirect Branch Predictors */ --=20 1.8.3.1 From nobody Mon May 6 12:14:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1593991468; cv=none; d=zohomail.com; s=zohoarc; b=I6LumfqD/9v2H2Rl0wL4+TOTbKuklR61k8Sk1Xd1iLjtPMlFc152Iu44QweCkt6SSV0Z4OFGhXIZf9fMRiB0y9NlsR4v5fUUwHo2kZFWdty/MzRuyHDBTKCOYaVthMMleLMVOvw/I+hptYlrcfHqJfy6cgiIt9aiYHO3mh2vRqU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; 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d="scan'208";a="388044995" From: Cathy Zhang To: qemu-devel@nongnu.org Subject: [PATCH 2/2] target/i386: Enable TSX Suspend Load Address Tracking feature Date: Mon, 6 Jul 2020 07:17:16 +0800 Message-Id: <1593991036-12183-3-git-send-email-cathy.zhang@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1593991036-12183-1-git-send-email-cathy.zhang@intel.com> References: <1593991036-12183-1-git-send-email-cathy.zhang@intel.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=192.55.52.151; envelope-from=cathy.zhang@intel.com; helo=mga17.intel.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/07/05 19:22:32 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Cathy Zhang , pbonzini@redhat.com, ehabkost@redhat.com, rth@twiddle.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This instruction aims to give a way to choose which memory accesses do not need to be tracked in the TSX read set, which is defined as CPUID.(EAX=3D7,ECX=3D0):EDX[bit 16]. The release spec link is as follows: https://software.intel.com/content/dam/develop/public/us/en/documents/\ architecture-instruction-set-extensions-programming-reference.pdf The associated kvm patch link is as follows: https://lore.kernel.org/patchwork/patch/1268026/ Signed-off-by: Cathy Zhang --- target/i386/cpu.c | 2 +- target/i386/cpu.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 92716f4..256a9a1 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -987,7 +987,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS]= =3D { NULL, NULL, NULL, NULL, "avx512-vp2intersect", NULL, "md-clear", NULL, NULL, NULL, "serialize", NULL, - NULL, NULL, NULL /* pconfig */, NULL, + "tsx-ldtrk", NULL, NULL /* pconfig */, NULL, NULL, NULL, NULL, NULL, NULL, NULL, "spec-ctrl", "stibp", NULL, "arch-capabilities", "core-capability", "ssbd", diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 3ef1123..155972b 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -779,6 +779,8 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_7_0_EDX_AVX512_VP2INTERSECT (1U << 8) /* SERIALIZE instruction */ #define CPUID_7_0_EDX_SERIALIZE (1U << 14) +/* TSX Suspend Load Address Tracking instruction */ +#define CPUID_7_0_EDX_TSX_LDTRK (1U << 16) /* Speculation Control */ #define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Single Thread Indirect Branch Predictors */ --=20 1.8.3.1