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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=40.107.68.81; envelope-from=Babu.Moger@amd.com; helo=NAM04-BN3-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/07/01 13:31:08 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, FORGED_SPF_HELO=1, MSGID_FROM_MTA_HEADER=0.001, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_PASS=-0.001, SPF_NONE=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @amdcloud.onmicrosoft.com) This is in preparation to build the apic_id from user provided topology information. Signed-off-by: Babu Moger --- include/hw/i386/topology.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h index 07239f95f4..7cb21e9c82 100644 --- a/include/hw/i386/topology.h +++ b/include/hw/i386/topology.h @@ -40,6 +40,7 @@ =20 =20 #include "qemu/bitops.h" +#include "qapi/qapi-types-machine.h" =20 /* APIC IDs can be 32-bit, but beware: APIC IDs > 255 require x2APIC suppo= rt */ @@ -196,6 +197,24 @@ static inline void x86_topo_ids_from_apicid_epyc(apic_= id_t apicid, topo_ids->pkg_id =3D apicid >> apicid_pkg_offset_epyc(topo_info); } =20 + +/* + * Initialize topo_ids from CpuInstanceProperties + * node_id in CpuInstanceProperties(or in CPU device) is a sequential + * number, but while building the topology we need to separate it for + * each socket(mod nodes_per_pkg). + */ +static inline void x86_init_topo_ids(X86CPUTopoInfo *topo_info, + CpuInstanceProperties props, + X86CPUTopoIDs *topo_ids) +{ + topo_ids->smt_id =3D props.has_thread_id ? props.thread_id : 0; + topo_ids->core_id =3D props.has_core_id ? props.core_id : 0; + topo_ids->die_id =3D props.has_die_id ? props.die_id : 0; + topo_ids->node_id =3D props.has_node_id ? + props.node_id % MAX(topo_info->nodes_per_pkg, 1) := 0; + topo_ids->pkg_id =3D props.has_socket_id ? props.socket_id : 0; +} /* * Make APIC ID for the CPU 'cpu_index' * From nobody Fri May 3 11:15:32 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1dmarc=pass fromdomain=amd.com) ARC-Seal: i=2; a=rsa-sha256; t=1593624784; cv=pass; d=zohomail.com; s=zohoarc; b=loO+yAP8X98uv1/zUuwNPdgUeLg7sDYILnpt9DwLLyZTqytbjJsgo3zEI2sRJ5X0wXFIXtgoT+gcBT1P9IYMGdG3AsKzZtr70VtgC+3UK7xXkUYkGe+vErOzeeQs+dpLfHlqz9dnbB/BfvO0Ax2uLwu9MYJ+hkA+3OKPDtY7vmg= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=40.107.68.81; envelope-from=Babu.Moger@amd.com; helo=NAM04-BN3-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/07/01 13:31:08 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, FORGED_SPF_HELO=1, MSGID_FROM_MTA_HEADER=0.001, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_PASS=-0.001, SPF_NONE=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @amdcloud.onmicrosoft.com) Build apic_id from CpuInstanceProperties if numa configured. Use the node_id from user provided numa information. This will avoid conflicts between numa information and apic_id generated. Re-arranged the code little bit to make sure CpuInstanceProperties is initialized before calling. Signed-off-by: Babu Moger --- hw/i386/pc.c | 6 +++++- hw/i386/x86.c | 19 +++++++++++++------ include/hw/i386/topology.h | 14 +++++++++++--- include/hw/i386/x86.h | 6 ++++-- tests/test-x86-cpuid.c | 39 ++++++++++++++++++++------------------- 5 files changed, 53 insertions(+), 31 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index d103b8c0ab..e613b2299f 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -800,13 +800,17 @@ void pc_smp_parse(MachineState *ms, QemuOpts *opts) void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp) { X86MachineState *x86ms =3D X86_MACHINE(ms); - int64_t apic_id =3D x86_cpu_apic_id_from_index(x86ms, id); + CpuInstanceProperties props; + int64_t apic_id; Error *local_err =3D NULL; =20 if (id < 0) { error_setg(errp, "Invalid CPU id: %" PRIi64, id); return; } + props =3D ms->possible_cpus->cpus[id].props; + + apic_id =3D x86_cpu_apic_id_from_index(x86ms, id, props); =20 if (apic_id >=3D ACPI_CPU_HOTPLUG_ID_LIMIT) { error_setg(errp, "Unable to add CPU: %" PRIi64 diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 34229b45c7..7554416ae0 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -93,7 +93,8 @@ static void x86_set_epyc_topo_handlers(MachineState *mach= ine) * all CPUs up to max_cpus. */ uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms, - unsigned int cpu_index) + unsigned int cpu_index, + CpuInstanceProperties props) { X86MachineClass *x86mc =3D X86_MACHINE_GET_CLASS(x86ms); X86CPUTopoInfo topo_info; @@ -102,7 +103,7 @@ uint32_t x86_cpu_apic_id_from_index(X86MachineState *x8= 6ms, =20 init_topo_info(&topo_info, x86ms); =20 - correct_id =3D x86ms->apicid_from_cpu_idx(&topo_info, cpu_index); + correct_id =3D x86ms->apicid_from_cpu_idx(&topo_info, cpu_index, props= ); if (x86mc->compat_apic_id_mode) { if (cpu_index !=3D correct_id && !warned && !qtest_enabled()) { error_report("APIC IDs set in compatibility mode, " @@ -136,6 +137,8 @@ void x86_cpus_init(X86MachineState *x86ms, int default_= cpu_version) const CPUArchIdList *possible_cpus; MachineState *ms =3D MACHINE(x86ms); MachineClass *mc =3D MACHINE_GET_CLASS(x86ms); + CpuInstanceProperties props; + =20 /* Check for apicid encoding */ if (cpu_x86_use_epyc_apic_id_encoding(ms->cpu_type)) { @@ -144,6 +147,8 @@ void x86_cpus_init(X86MachineState *x86ms, int default_= cpu_version) =20 x86_cpu_set_default_version(default_cpu_version); =20 + possible_cpus =3D mc->possible_cpu_arch_ids(ms); + /* * Calculates the limit to CPU APIC ID values * @@ -152,13 +157,15 @@ void x86_cpus_init(X86MachineState *x86ms, int defaul= t_cpu_version) * * This is used for FW_CFG_MAX_CPUS. See comments on fw_cfg_arch_creat= e(). */ - x86ms->apic_id_limit =3D x86_cpu_apic_id_from_index(x86ms, - ms->smp.max_cpus - 1= ) + 1; - possible_cpus =3D mc->possible_cpu_arch_ids(ms); + props =3D ms->possible_cpus->cpus[ms->smp.max_cpus - 1].props; =20 + x86ms->apic_id_limit =3D x86_cpu_apic_id_from_index(x86ms, + ms->smp.max_cpus - 1, + props) + 1; for (i =3D 0; i < ms->possible_cpus->len; i++) { + props =3D ms->possible_cpus->cpus[i].props; ms->possible_cpus->cpus[i].arch_id =3D - x86_cpu_apic_id_from_index(x86ms, i); + x86_cpu_apic_id_from_index(x86ms, i, props); } =20 for (i =3D 0; i < ms->smp.cpus; i++) { diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h index 7cb21e9c82..a800fc905f 100644 --- a/include/hw/i386/topology.h +++ b/include/hw/i386/topology.h @@ -221,10 +221,17 @@ static inline void x86_init_topo_ids(X86CPUTopoInfo *= topo_info, * 'cpu_index' is a sequential, contiguous ID for the CPU. */ static inline apic_id_t x86_apicid_from_cpu_idx_epyc(X86CPUTopoInfo *topo_= info, - unsigned cpu_index) + unsigned cpu_index, + CpuInstanceProperties= props) { X86CPUTopoIDs topo_ids; - x86_topo_ids_from_idx_epyc(topo_info, cpu_index, &topo_ids); + + if (props.has_node_id) { + x86_init_topo_ids(topo_info, props, &topo_ids); + } else { + x86_topo_ids_from_idx_epyc(topo_info, cpu_index, &topo_ids); + } + return x86_apicid_from_topo_ids_epyc(topo_info, &topo_ids); } /* Make APIC ID for the CPU based on Pkg_ID, Core_ID, SMT_ID @@ -280,7 +287,8 @@ static inline void x86_topo_ids_from_apicid(apic_id_t a= picid, * 'cpu_index' is a sequential, contiguous ID for the CPU. */ static inline apic_id_t x86_apicid_from_cpu_idx(X86CPUTopoInfo *topo_info, - unsigned cpu_index) + unsigned cpu_index, + CpuInstanceProperties prop= s) { X86CPUTopoIDs topo_ids; x86_topo_ids_from_idx(topo_info, cpu_index, &topo_ids); diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index b79f24e285..3109f39554 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -65,7 +65,8 @@ typedef struct { =20 /* Apic id specific handlers */ uint32_t (*apicid_from_cpu_idx)(X86CPUTopoInfo *topo_info, - unsigned cpu_index); + unsigned cpu_index, + CpuInstanceProperties props); void (*topo_ids_from_apicid)(apic_id_t apicid, X86CPUTopoInfo *topo_in= fo, X86CPUTopoIDs *topo_ids); apic_id_t (*apicid_from_topo_ids)(X86CPUTopoInfo *topo_info, @@ -93,7 +94,8 @@ typedef struct { void init_topo_info(X86CPUTopoInfo *topo_info, const X86MachineState *x86m= s); =20 uint32_t x86_cpu_apic_id_from_index(X86MachineState *pcms, - unsigned int cpu_index); + unsigned int cpu_index, + CpuInstanceProperties props); =20 void x86_cpu_new(X86MachineState *pcms, int64_t apic_id, Error **errp); void x86_cpus_init(X86MachineState *pcms, int default_cpu_version); diff --git a/tests/test-x86-cpuid.c b/tests/test-x86-cpuid.c index 049030a50e..a1308e214b 100644 --- a/tests/test-x86-cpuid.c +++ b/tests/test-x86-cpuid.c @@ -29,6 +29,7 @@ static void test_topo_bits(void) { X86CPUTopoInfo topo_info =3D {0}; + CpuInstanceProperties props =3D {0}; =20 /* simple tests for 1 thread per core, 1 core per die, 1 die per packa= ge */ topo_info =3D (X86CPUTopoInfo) {0, 1, 1, 1}; @@ -37,10 +38,10 @@ static void test_topo_bits(void) g_assert_cmpuint(apicid_die_width(&topo_info), =3D=3D, 0); =20 topo_info =3D (X86CPUTopoInfo) {0, 1, 1, 1}; - g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 0), =3D=3D, 0); - g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1), =3D=3D, 1); - g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2), =3D=3D, 2); - g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 3), =3D=3D, 3); + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 0, props), =3D=3D= , 0); + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1, props), =3D=3D= , 1); + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2, props), =3D=3D= , 2); + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 3, props), =3D=3D= , 3); =20 =20 /* Test field width calculation for multiple values @@ -92,38 +93,38 @@ static void test_topo_bits(void) g_assert_cmpuint(apicid_pkg_offset(&topo_info), =3D=3D, 5); =20 topo_info =3D (X86CPUTopoInfo) {0, 1, 6, 3}; - g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 0), =3D=3D, 0); - g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1), =3D=3D, 1); - g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2), =3D=3D, 2); + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 0, props), =3D=3D= , 0); + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1, props), =3D=3D= , 1); + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2, props), =3D=3D= , 2); =20 topo_info =3D (X86CPUTopoInfo) {0, 1, 6, 3}; - g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1 * 3 + 0), =3D= =3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1 * 3 + 0, props)= , =3D=3D, (1 << 2) | 0); - g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1 * 3 + 1), =3D= =3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1 * 3 + 1, props)= , =3D=3D, (1 << 2) | 1); - g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1 * 3 + 2), =3D= =3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 1 * 3 + 2, props)= , =3D=3D, (1 << 2) | 2); =20 - g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2 * 3 + 0), =3D= =3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2 * 3 + 0, props)= , =3D=3D, (2 << 2) | 0); - g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2 * 3 + 1), =3D= =3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2 * 3 + 1, props)= , =3D=3D, (2 << 2) | 1); - g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2 * 3 + 2), =3D= =3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 2 * 3 + 2, props)= , =3D=3D, (2 << 2) | 2); =20 - g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 5 * 3 + 0), =3D= =3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 5 * 3 + 0, props)= , =3D=3D, (5 << 2) | 0); - g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 5 * 3 + 1), =3D= =3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 5 * 3 + 1, props)= , =3D=3D, (5 << 2) | 1); - g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 5 * 3 + 2), =3D= =3D, + g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, 5 * 3 + 2, props)= , =3D=3D, (5 << 2) | 2); =20 g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, - 1 * 6 * 3 + 0 * 3 + 0), =3D=3D, (1 << 5)); + 1 * 6 * 3 + 0 * 3 + 0, props), =3D=3D, (1 << 5)); g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, - 1 * 6 * 3 + 1 * 3 + 1), =3D=3D, (1 << 5) | (1 << 2) |= 1); + 1 * 6 * 3 + 1 * 3 + 1, props), =3D=3D, (1 << 5) | (1 = << 2) | 1); g_assert_cmpuint(x86_apicid_from_cpu_idx(&topo_info, - 3 * 6 * 3 + 5 * 3 + 2), =3D=3D, (3 << 5) | (5 << 2) |= 2); + 3 * 6 * 3 + 5 * 3 + 2, props), =3D=3D, (3 << 5) | (5 = << 2) | 2); } =20 int main(int argc, char **argv) From nobody Fri May 3 11:15:32 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1dmarc=pass fromdomain=amd.com) ARC-Seal: i=2; a=rsa-sha256; t=1593624906; cv=pass; d=zohomail.com; s=zohoarc; b=JYp+ggti8dzGv8LL+aW9WcIwDjAzgBA1XjuNEVdKbM9kBTmpaflX5fFxayKZj2X0UNABQC3Pi/qOlpb2/c4sa1OusgyM8ZwTleUDzJxUy51vz246HlcYXF6SsqkUh35xFeEf7ZEPB7+eRp/n0BSQL22Nmq77zUy0FrYf2BSXUHE= ARC-Message-Signature: i=2; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=40.107.68.81; envelope-from=Babu.Moger@amd.com; helo=NAM04-BN3-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/07/01 13:31:08 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, FORGED_SPF_HELO=1, MSGID_FROM_MTA_HEADER=0.001, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_PASS=-0.001, SPF_NONE=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @amdcloud.onmicrosoft.com) Noticed the following command failure while testing CPU hotplug. $ qemu-system-x86_64 -machine q35,accel=3Dkvm -smp 1,maxcpus=3D2, cores=3D1, threads=3D1,sockets=3D2 -cpu EPYC -device EPYC-x86_64- cpu,core-id=3D0,socket-id=3D1,thread-id=3D0 qemu-system-x86_64: -device EPYC-x86_64-cpu,core-id=3D0,socket-id=3D1, thread-id=3D0: Invalid CPU [socket: 21855, die: 0, core: 0, thread: 0] with APIC ID 21855, valid index range 0:1 This happens because APIC ID is calculated using uninitialized memory. This is happening after the addition of new field node_id in X86CPUTopoIDs structure. The node_id field is uninitialized while calling apicid_from_topo_ids. The problem is discussed in the thread below. https://lore.kernel.org/qemu-devel/20200602171838.GG577771@habkost.net/ Fix the problem by initializing the node_id from the device being added. Fixes: Link: https://bugzilla.redhat.com/show_bug.cgi?id=3D1828750 Signed-off-by: Babu Moger --- hw/i386/pc.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index e613b2299f..aa9fb48834 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1553,6 +1553,15 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_= dev, cpu->die_id =3D 0; } =20 + /* + * If node_id is not set, initialize it to zero for now. If the us= er + * does not pass the correct node in case of numa configuration, it + * will be rejected eventually. + */ + if (cpu->node_id < 0) { + cpu->node_id =3D 0; + } + if (cpu->socket_id < 0) { error_setg(errp, "CPU socket-id is not set"); return; @@ -1587,6 +1596,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_d= ev, } =20 topo_ids.pkg_id =3D cpu->socket_id; + topo_ids.node_id =3D cpu->node_id; topo_ids.die_id =3D cpu->die_id; topo_ids.core_id =3D cpu->core_id; topo_ids.smt_id =3D cpu->thread_id;