From nobody Thu May 2 09:40:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1dmarc=pass fromdomain=xilinx.com) ARC-Seal: i=2; a=rsa-sha256; t=1593008850; cv=pass; d=zohomail.com; s=zohoarc; b=g3zDL+IgSt+beGBVRrVr8KQs43SHMK4LLXc51K7c2nm+ks6dT5IcwJiZnq1yXE3CADGOH8A+OY/iGqOXowS9sSITBCizf2hXvcg0JUPgZLvp/X99KwFqX5JZ/VVFmLCa974TIQHsv6PLrZSHhgXdsPfvN3e05wudpI1O0Sfe3XU= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1593008850; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=iw2cpqgPXTafzX/Nk5jFNgvUekUUu0pc8d+MmlJL7bY=; b=hZfH/0mm2az3E9KMlqeBiyTf7c1wvr30BnGrFMwwcvT6x/vNosIfY9lS1kKL4iSyeozMfhmAT8yhXsjyQFCzACwSND+3RmkFIKahduSVpkMMVx2ThK4nfoYYh8Y5FLXTPjP6pr40dW7CKf1qp2EJTL2zPMDcYf9igiRKAPihj/w= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1dmarc=pass fromdomain=xilinx.com) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1593008850146762.0157813099177; Wed, 24 Jun 2020 07:27:30 -0700 (PDT) Received: from localhost ([::1]:58436 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jo6N6-0004CO-Gl for importer@patchew.org; Wed, 24 Jun 2020 10:27:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37410) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jo6MC-0002t5-Fb for qemu-devel@nongnu.org; Wed, 24 Jun 2020 10:26:32 -0400 Received: from mail-eopbgr690047.outbound.protection.outlook.com ([40.107.69.47]:44541 helo=NAM04-CO1-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jo6M9-0003TP-DA for qemu-devel@nongnu.org; Wed, 24 Jun 2020 10:26:31 -0400 Received: from CY4PR22CA0026.namprd22.prod.outlook.com (2603:10b6:903:ed::12) by MW2PR02MB3689.namprd02.prod.outlook.com (2603:10b6:907:7::28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3109.22; Wed, 24 Jun 2020 14:26:25 +0000 Received: from CY1NAM02FT003.eop-nam02.prod.protection.outlook.com (2603:10b6:903:ed:cafe::39) by CY4PR22CA0026.outlook.office365.com (2603:10b6:903:ed::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3131.21 via Frontend Transport; Wed, 24 Jun 2020 14:26:25 +0000 Received: from xsj-pvapsmtpgw01 (149.199.60.83) by CY1NAM02FT003.mail.protection.outlook.com (10.152.74.151) with Microsoft SMTP Server id 15.20.3131.20 via Frontend Transport; Wed, 24 Jun 2020 14:26:25 +0000 Received: from [149.199.38.66] (port=43408 helo=xsj-pvapsmtp01) by xsj-pvapsmtpgw01 with esmtp (Exim 4.90) (envelope-from ) id 1jo6Kt-0001Yr-2f; Wed, 24 Jun 2020 07:25:11 -0700 Received: from [127.0.0.1] (helo=xsj-smtp-dlp1.xlnx.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jo6M5-0000KK-0v; Wed, 24 Jun 2020 07:26:25 -0700 Received: from xsj-pvapsmtp01 (mailhost.xilinx.com [149.199.38.66]) by xsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id 05OEQOsh017900; Wed, 24 Jun 2020 07:26:24 -0700 Received: from [10.140.6.35] (helo=xhdsaipava40.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jo6M3-0000K9-Lg; Wed, 24 Jun 2020 07:26:24 -0700 Received: by xhdsaipava40.xilinx.com (Postfix, from userid 14131) id 7AE3913C6068; Wed, 24 Jun 2020 19:46:21 +0530 (IST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=P5H1y56TzUhs2wmcTcMfeELAI7P61G+RRoPHuRK2S7GWuwFmMQvUq3Abp8xOHn0bv22vScpWyBzBqyQ70KUYhu+0JiKfqM4NbnFbx+Wviwml/iNulFv6mxBfo2JWfwKw/k7swzVVVgZCZQC4MVyFW9B6Bk4EdS3/YM6uaGxvUIeNOmKG0IittHsLIOY0+q/OH+OhDCxqjLaM1gIfq3xu5xImMv4RGtGaUpEGmKPrUzE7Nvcl4Rc43EbfnSYHQ0OAVKg5o+Pzf60LN64BXLVnLWRjAW29aIOyu2HZmKRYVOLtvZtFv2fBXYCjhZ2OAVkj/gUWwzcOwJHV+SbkrYUQOQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=iw2cpqgPXTafzX/Nk5jFNgvUekUUu0pc8d+MmlJL7bY=; b=cfca6kco4503ttdG04w1nytnjjHaQh7J0K5T0XY2lSewRXQNfs/C1LTUY3LicZYbwP3FzVyLsofJbYQO61p8jXjIVrZBuOBEpztZghOJpGYrXJtLBgPGYKW8VtkYpmCv6N5JtENwvIuycjWq6zQNJpKKT+fAf36zZtqP6aUPRNK+4dHNw7bOR009a64YVbaMcv/VVMA7lxET2H3/j1MmN2FPYhNhB7J6ngeZI+1lFaum6vA4EM9U15q0JZ/sN6sIe6G+j/exLBxcosuVIEX9JWaWDBHBLguHAL/ikwrEikXpkIhtOsHvAVAJD2s303WWmPsTBaV9EXAT5rEd+3RPaQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 149.199.60.83) smtp.rcpttodomain=wdc.com smtp.mailfrom=xilinx.com; dmarc=bestguesspass action=none header.from=xilinx.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=xilinx.onmicrosoft.com; s=selector2-xilinx-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=iw2cpqgPXTafzX/Nk5jFNgvUekUUu0pc8d+MmlJL7bY=; b=PlvNbetkOmYVGVxGOPJbYatfvjYX8TCQAFE8fIm7pEPOoVQcT4olKGAOCf+Cmj1l1bdTYLjM2zeB2I20tTo3nm133aaO56jRm021aSUoWhZB/oGuGQzixy5ddojIY1TiCAcDBtrxAUvB4y2Uho7rZNrqMUlvRdyLSj4+RUjIbcw= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=xilinx.com; wdc.com; dkim=none (message not signed) header.d=none;wdc.com; dmarc=bestguesspass action=none header.from=xilinx.com; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: Pass (protection.outlook.com: domain of xilinx.com designates 149.199.60.83 as permitted sender) receiver=protection.outlook.com; client-ip=149.199.60.83; helo=xsj-pvapsmtpgw01; From: Sai Pavan Boddu To: Gerd Hoffmann , Peter Maydell Subject: [PATCH v2 1/3] usb/hcd-xhci: Make dma read/writes hooks pci free Date: Wed, 24 Jun 2020 19:46:14 +0530 Message-Id: <1593008176-9629-2-git-send-email-sai.pavan.boddu@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593008176-9629-1-git-send-email-sai.pavan.boddu@xilinx.com> References: <1593008176-9629-1-git-send-email-sai.pavan.boddu@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:xsj-pvapsmtpgw01; PTR:unknown-60-83.xilinx.com; CAT:NONE; SFTY:; SFS:(136003)(39860400002)(396003)(376002)(346002)(46966005)(426003)(478600001)(26005)(8676002)(2906002)(8936002)(336012)(4326008)(186003)(2616005)(6266002)(7416002)(42186006)(5660300002)(47076004)(36756003)(316002)(110136005)(70206006)(54906003)(70586007)(82740400003)(356005)(82310400002)(81166007)(6666004)(83380400001); DIR:OUT; SFP:1101; X-MS-PublicTrafficType: Email MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 94c4e36f-73e1-499a-3902-08d8184a9370 X-MS-TrafficTypeDiagnostic: MW2PR02MB3689: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:3173; X-Forefront-PRVS: 0444EB1997 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: pM939L8v59hWt0YagjOk9aC1DmhPfhoaHH2q/ddviM8+CuxktkpP2xJdYqoh17yCyWSM1YMeW+2KIjTNWkK1yydWbnc4XnBsNJtwd22i8d/TtTpKiyn+jGj1Fs16Jc29JYwY02KGNs+sfCxFvpphQ13C13uKWJIlDyGivw2W1vegD/a3znjECD8ABXfV+cTQK/iOdaKZB+zcrB2D85Pk16GXSDQrA41WFyJNjzMbkFQVPuqPkYPKYb5Ur1Pf1X+9Og2Fo4IMLLq7p3l+079l4KcVZ6D/uQPWKIFiGXxC2yaNPFuUZ56Y6Go5Aw2yt1EChGDnizAcUAwpTyXbbyNb+mZoMdqjOUkoR+94plZZJ7gzBGX+fs5wSgLQ/o0fd8koPexHNosVJZPQh87NJnohmw== X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jun 2020 14:26:25.3007 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 94c4e36f-73e1-499a-3902-08d8184a9370 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR02MB3689 Received-SPF: pass client-ip=40.107.69.47; envelope-from=saipava@xilinx.com; helo=NAM04-CO1-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/24 10:26:27 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -35 X-Spam_score: -3.6 X-Spam_bar: --- X-Spam_report: (-3.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Eduardo Habkost , Markus Armbruster , qemu-devel@nongnu.org, Alistair Francis , =?UTF-8?q?=27Marc-Andr=C3=A9=20Lureau=27?= , Ying Fang , Paolo Bonzini , =?UTF-8?q?=27Philippe=20Mathieu-Daud=C3=A9=27?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @xilinx.onmicrosoft.com) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch starts making the hcd-xhci.c pci free, as part of this restructuring dma read/writes are handled without passing pci object. Signed-off-by: Sai Pavan Boddu Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/usb/hcd-xhci.c | 24 +++++++++++------------- hw/usb/hcd-xhci.h | 3 +++ 2 files changed, 14 insertions(+), 13 deletions(-) diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index b330e36..fa6ce98 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -495,7 +495,7 @@ static inline void xhci_dma_read_u32s(XHCIState *xhci, = dma_addr_t addr, =20 assert((len % sizeof(uint32_t)) =3D=3D 0); =20 - pci_dma_read(PCI_DEVICE(xhci), addr, buf, len); + dma_memory_read(xhci->as, addr, buf, len); =20 for (i =3D 0; i < (len / sizeof(uint32_t)); i++) { buf[i] =3D le32_to_cpu(buf[i]); @@ -515,7 +515,7 @@ static inline void xhci_dma_write_u32s(XHCIState *xhci,= dma_addr_t addr, for (i =3D 0; i < n; i++) { tmp[i] =3D cpu_to_le32(buf[i]); } - pci_dma_write(PCI_DEVICE(xhci), addr, tmp, len); + dma_memory_write(xhci->as, addr, tmp, len); } =20 static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport) @@ -644,7 +644,6 @@ static void xhci_die(XHCIState *xhci) =20 static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v) { - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); XHCIInterrupter *intr =3D &xhci->intr[v]; XHCITRB ev_trb; dma_addr_t addr; @@ -663,7 +662,7 @@ static void xhci_write_event(XHCIState *xhci, XHCIEvent= *event, int v) ev_trb.status, ev_trb.control); =20 addr =3D intr->er_start + TRB_SIZE*intr->er_ep_idx; - pci_dma_write(pci_dev, addr, &ev_trb, TRB_SIZE); + dma_memory_write(xhci->as, addr, &ev_trb, TRB_SIZE); =20 intr->er_ep_idx++; if (intr->er_ep_idx >=3D intr->er_size) { @@ -720,12 +719,11 @@ static void xhci_ring_init(XHCIState *xhci, XHCIRing = *ring, static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *t= rb, dma_addr_t *addr) { - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); uint32_t link_cnt =3D 0; =20 while (1) { TRBType type; - pci_dma_read(pci_dev, ring->dequeue, trb, TRB_SIZE); + dma_memory_read(xhci->as, ring->dequeue, trb, TRB_SIZE); trb->addr =3D ring->dequeue; trb->ccs =3D ring->ccs; le64_to_cpus(&trb->parameter); @@ -762,7 +760,6 @@ static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRin= g *ring, XHCITRB *trb, =20 static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring) { - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); XHCITRB trb; int length =3D 0; dma_addr_t dequeue =3D ring->dequeue; @@ -773,7 +770,7 @@ static int xhci_ring_chain_length(XHCIState *xhci, cons= t XHCIRing *ring) =20 while (1) { TRBType type; - pci_dma_read(pci_dev, dequeue, &trb, TRB_SIZE); + dma_memory_read(xhci->as, dequeue, &trb, TRB_SIZE); le64_to_cpus(&trb.parameter); le32_to_cpus(&trb.status); le32_to_cpus(&trb.control); @@ -828,7 +825,7 @@ static void xhci_er_reset(XHCIState *xhci, int v) xhci_die(xhci); return; } - pci_dma_read(PCI_DEVICE(xhci), erstba, &seg, sizeof(seg)); + dma_memory_read(xhci->as, erstba, &seg, sizeof(seg)); le32_to_cpus(&seg.addr_low); le32_to_cpus(&seg.addr_high); le32_to_cpus(&seg.size); @@ -1440,7 +1437,7 @@ static int xhci_xfer_create_sgl(XHCITransfer *xfer, i= nt in_xfer) int i; =20 xfer->int_req =3D false; - pci_dma_sglist_init(&xfer->sgl, PCI_DEVICE(xhci), xfer->trb_count); + qemu_sglist_init(&xfer->sgl, DEVICE(xhci), xfer->trb_count, xhci->as); for (i =3D 0; i < xfer->trb_count; i++) { XHCITRB *trb =3D &xfer->trbs[i]; dma_addr_t addr; @@ -2101,7 +2098,7 @@ static TRBCCode xhci_address_slot(XHCIState *xhci, un= signed int slotid, assert(slotid >=3D 1 && slotid <=3D xhci->numslots); =20 dcbaap =3D xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high); - poctx =3D ldq_le_pci_dma(PCI_DEVICE(xhci), dcbaap + 8 * slotid); + poctx =3D ldq_le_dma(xhci->as, dcbaap + 8 * slotid); ictx =3D xhci_mask64(pictx); octx =3D xhci_mask64(poctx); =20 @@ -2439,7 +2436,7 @@ static TRBCCode xhci_get_port_bandwidth(XHCIState *xh= ci, uint64_t pctx) /* TODO: actually implement real values here */ bw_ctx[0] =3D 0; memset(&bw_ctx[1], 80, xhci->numports); /* 80% */ - pci_dma_write(PCI_DEVICE(xhci), ctx, bw_ctx, sizeof(bw_ctx)); + dma_memory_write(xhci->as, ctx, bw_ctx, sizeof(bw_ctx)); =20 return CC_SUCCESS; } @@ -3431,6 +3428,7 @@ static void usb_xhci_realize(struct PCIDevice *dev, E= rror **errp) } =20 usb_xhci_init(xhci); + xhci->as =3D pci_get_address_space(dev); xhci->mfwrap_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, xhci_mfwrap_ti= mer, xhci); =20 memory_region_init(&xhci->mem, OBJECT(xhci), "xhci", LEN_REGS); @@ -3531,7 +3529,7 @@ static int usb_xhci_post_load(void *opaque, int versi= on_id) continue; } slot->ctx =3D - xhci_mask64(ldq_le_pci_dma(pci_dev, dcbaap + 8 * slotid)); + xhci_mask64(ldq_le_dma(xhci->as, dcbaap + 8 * slotid)); xhci_dma_read_u32s(xhci, slot->ctx, slot_ctx, sizeof(slot_ctx)); slot->uport =3D xhci_lookup_uport(xhci, slot_ctx); if (!slot->uport) { diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index 2fad4df..18bed7e 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -22,6 +22,8 @@ #ifndef HW_USB_HCD_XHCI_H #define HW_USB_HCD_XHCI_H =20 +#include "sysemu/dma.h" + #define TYPE_XHCI "base-xhci" #define TYPE_NEC_XHCI "nec-usb-xhci" #define TYPE_QEMU_XHCI "qemu-xhci" @@ -189,6 +191,7 @@ struct XHCIState { =20 USBBus bus; MemoryRegion mem; + AddressSpace *as; MemoryRegion mem_cap; MemoryRegion mem_oper; MemoryRegion mem_runtime; --=20 2.7.4 From nobody Thu May 2 09:40:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1dmarc=pass fromdomain=xilinx.com) ARC-Seal: i=2; a=rsa-sha256; t=1593008917; cv=pass; d=zohomail.com; s=zohoarc; b=A50Kxdwtk1pOf9unW2sw4kGKwRdVqcxKR2NqFJW5CKFCw2fDE4WL3OXSnNUATk4EhQoxAjdAYkbCYRakEeJl7H/ZdDjazdxjo7BwMnw39uUvB5H8Z+GxtPrmT6eUjcofOQZafDmRLhqStWUj7hOjUYxE3KBjo2XgPQE2LL1AVHU= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1593008917; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=UjCdMS5S+kNLZQAh65ZnT/pCnxofd1Ob4w4Gg10zJcE=; b=FQFFvVbXyut0rOFdZse2PrVFQZ1zZfTL97V8klJbt+avM7Brh2vMlz0kgwFNappUStHawWJya+daSVvb7Dx/HmeVOtSUPugBp467Rf8nJEqtCZM9SXeWdoSA/ZdjdDZVBBeAG+vRIAUVN4tmQYqGLSEI/F2yhXattPvQuRPIk38= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1dmarc=pass fromdomain=xilinx.com) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 159300891741886.40559183341509; Wed, 24 Jun 2020 07:28:37 -0700 (PDT) Received: from localhost ([::1]:33572 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jo6OC-0005qL-65 for importer@patchew.org; Wed, 24 Jun 2020 10:28:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37418) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jo6MD-0002vL-Gx for qemu-devel@nongnu.org; Wed, 24 Jun 2020 10:26:33 -0400 Received: from mail-eopbgr700067.outbound.protection.outlook.com ([40.107.70.67]:2400 helo=NAM04-SN1-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jo6M9-0003U6-Pm for qemu-devel@nongnu.org; Wed, 24 Jun 2020 10:26:33 -0400 Received: from DM5PR21CA0056.namprd21.prod.outlook.com (2603:10b6:3:129::18) by BYAPR02MB5413.namprd02.prod.outlook.com (2603:10b6:a03:99::27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3109.25; Wed, 24 Jun 2020 14:26:26 +0000 Received: from CY1NAM02FT019.eop-nam02.prod.protection.outlook.com (2603:10b6:3:129:cafe::f9) by DM5PR21CA0056.outlook.office365.com (2603:10b6:3:129::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3153.2 via Frontend Transport; Wed, 24 Jun 2020 14:26:26 +0000 Received: from xsj-pvapsmtpgw01 (149.199.60.83) by CY1NAM02FT019.mail.protection.outlook.com (10.152.75.177) with Microsoft SMTP Server id 15.20.3131.20 via Frontend Transport; Wed, 24 Jun 2020 14:26:26 +0000 Received: from [149.199.38.66] (port=43414 helo=xsj-pvapsmtp01) by xsj-pvapsmtpgw01 with esmtp (Exim 4.90) (envelope-from ) id 1jo6Kt-0001Yu-Qx; Wed, 24 Jun 2020 07:25:11 -0700 Received: from [127.0.0.1] (helo=xsj-smtp-dlp1.xlnx.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jo6M5-0000KO-PB; Wed, 24 Jun 2020 07:26:25 -0700 Received: from xsj-pvapsmtp01 (maildrop.xilinx.com [149.199.38.66]) by xsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id 05OEQOVo017902; Wed, 24 Jun 2020 07:26:24 -0700 Received: from [10.140.6.35] (helo=xhdsaipava40.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jo6M4-0000KG-Hu; Wed, 24 Jun 2020 07:26:24 -0700 Received: by xhdsaipava40.xilinx.com (Postfix, from userid 14131) id 5C5CF13C6069; Wed, 24 Jun 2020 19:46:22 +0530 (IST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=AWlXEWq2vFmiHLbglk1fnVe4SNFTTTxD3a+FYW5lSk5Nr3nsMbql3BL1ga+xTZAtanVFBjz4UFHo8QUZZeT4GvxLJEXp6ChYpBCa6727ZM5R5FnESmAhQ6DiBPjrWYxfxdbU7bGn3GOX0IZABjfm9jiNHbhe3AGIMKM/UMlJtni5CuoH6AhCT9nHUhZ+5U7e50iUWmKSOx4bE2OlqgubO1O+sPxehBi5aE/BDO1aBhWGTVFA4Scv9Sx+SMlyGrDAPVDmqRI0MI2DqoTmHbNBpECWGB27OgyytxfsRa+T31u7wmfZFZkajSk/AHqbFvegdVpljzR2t/nKTW3xTElfLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=UjCdMS5S+kNLZQAh65ZnT/pCnxofd1Ob4w4Gg10zJcE=; b=NiKKjw6FQ+nLBPJDJ5lC5mQR1yfI/OOIPOas/ycmy20mtJCltRkqfvamkq3MnKpQw/aFP3lR8AsYv+MbwkJqbPRmANR9TT8GthgHAgMrBZAbJT4idpqpxqvQljqOaPHC68w+cYkHUrwfzrNRDtZujUNgvTACNUHiIPqASVoY3BHq8yoYGxmBobku7fMzxmIegIz2WmKTEe4Ken41HR9gN4ch9K5c8sQowfkIMhzoBfN6/pVk6JsC9UKkeGAkmZhZzlQhkJH8XEqgK5t3VI6J5WTLGeA5hxynk89KtxX218NgTjnxSoy5pAy1PtmiGtB7ir1Er252akl/xDmjaxDBqw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 149.199.60.83) smtp.rcpttodomain=wdc.com smtp.mailfrom=xilinx.com; dmarc=bestguesspass action=none header.from=xilinx.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=xilinx.onmicrosoft.com; s=selector2-xilinx-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=UjCdMS5S+kNLZQAh65ZnT/pCnxofd1Ob4w4Gg10zJcE=; b=WXeAwI1WphS1sFu+qAnuVMRqVqLcIkY5h10sgTmEsAwah22JcztGNLtS7Fb4sYHcEoeEbvFV2j1SVYAWl6o+1ZHQM9RH5sbIBLq/+8PGw7j1gG9vUNyeyWTFujL4Tuthr0tqxHVoMcZ2JyiR7Bacr2YKP9E5osJQmegWICMV57s= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=xilinx.com; wdc.com; dkim=none (message not signed) header.d=none;wdc.com; dmarc=bestguesspass action=none header.from=xilinx.com; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: Pass (protection.outlook.com: domain of xilinx.com designates 149.199.60.83 as permitted sender) receiver=protection.outlook.com; client-ip=149.199.60.83; helo=xsj-pvapsmtpgw01; From: Sai Pavan Boddu To: Gerd Hoffmann , Peter Maydell Subject: [PATCH v2 2/3] usb/hcd-xhci: Move qemu-xhci device to hcd-xhci-pci.c Date: Wed, 24 Jun 2020 19:46:15 +0530 Message-Id: <1593008176-9629-3-git-send-email-sai.pavan.boddu@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593008176-9629-1-git-send-email-sai.pavan.boddu@xilinx.com> References: <1593008176-9629-1-git-send-email-sai.pavan.boddu@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:xsj-pvapsmtpgw01; PTR:unknown-60-83.xilinx.com; CAT:NONE; SFTY:; SFS:(39860400002)(346002)(136003)(396003)(376002)(46966005)(7416002)(316002)(6266002)(70206006)(36756003)(2906002)(70586007)(26005)(42186006)(47076004)(5660300002)(426003)(82740400003)(356005)(4326008)(82310400002)(110136005)(54906003)(8936002)(6666004)(186003)(81166007)(8676002)(336012)(478600001)(2616005)(83380400001)(2004002); DIR:OUT; SFP:1101; X-MS-PublicTrafficType: Email MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: f27302bc-facd-4010-5e88-08d8184a93e0 X-MS-TrafficTypeDiagnostic: BYAPR02MB5413: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:7691; X-Forefront-PRVS: 0444EB1997 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: dQNb9uP6ePd0+jy6EIQ7t+2tt4UtHmw0Lxfn04i0mrGGTH1xPJr8mxl6dsE7rAXXcp+dPTnD/EJ9nriwg7VclUwTCls738SUwQ7sWbpLqN5z0qFnCRx6RZLEASNg4hJPD0FXykQCzT0wY8O0509JEsxR7rYmhj4pVQ68yVN/bVx2n9sE38ra+jo5p5X+N0X8Pv/hQOdvu4teSftWYjHRPxQaDO5hbBkYvd2mmzTEIa914pctDI7o0TxTeBj8HfEQD0hslM2JvpIXzwr54FIpoGLEsOwooJzsj4tTge4AyaxAk72M75g311iD+2xr0hsdjd8i2OejaXGF95HAEJsRXqEyRJ7Dc2/9Fetkeg+qbRdVMog711x+WMvnAAqQydotZIjjiWtNkxd3tTPYvlxQs5Ji/5p3BBYBb9ZEUxch0qgrgX+dG52KVv3lkI2Qr71DJgDLSUaf8RHsgzjWwptNc/XR0Eyvv86YHdxzwO1uBVKeKsIS7XixpDVttrSYNs7b X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jun 2020 14:26:26.0366 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f27302bc-facd-4010-5e88-08d8184a93e0 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR02MB5413 Received-SPF: pass client-ip=40.107.70.67; envelope-from=saipava@xilinx.com; helo=NAM04-SN1-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/24 10:26:28 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -35 X-Spam_score: -3.6 X-Spam_bar: --- X-Spam_report: (-3.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Eduardo Habkost , Markus Armbruster , qemu-devel@nongnu.org, Alistair Francis , =?UTF-8?q?=27Marc-Andr=C3=A9=20Lureau=27?= , Ying Fang , Paolo Bonzini , =?UTF-8?q?=27Philippe=20Mathieu-Daud=C3=A9=27?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @xilinx.onmicrosoft.com) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move pci specific devices to new file. This set the environment to move all pci specific hooks in hcd-xhci.c to hcd-xhci-pci.c. Signed-off-by: Sai Pavan Boddu --- hw/usb/hcd-xhci-pci.c | 64 +++++++++++++++++++++++++++++++++++++++++++++++= ++++ hw/usb/hcd-xhci.c | 32 ++------------------------ hw/usb/hcd-xhci.h | 2 ++ 3 files changed, 68 insertions(+), 30 deletions(-) create mode 100644 hw/usb/hcd-xhci-pci.c diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c new file mode 100644 index 0000000..26af683 --- /dev/null +++ b/hw/usb/hcd-xhci-pci.c @@ -0,0 +1,64 @@ +/* + * USB xHCI controller with PCI system bus emulation + * + * Copyright (c) 2011 Securiforest + * Date: 2011-05-11 ; Author: Hector Martin + * Based on usb-ohci.c, emulates Renesas NEC USB 3.0 + * Date: 2020-03-01; Author: Sai Pavan Boddu + * Moved the pci specific content for hcd-xhci.c to hcd-xhci-pci.c + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#include "qemu/osdep.h" +#include "hw/pci/pci.h" +#include "hw/qdev-properties.h" +#include "hw/pci/msi.h" +#include "hw/pci/msix.h" +#include "hcd-xhci.h" +#include "trace.h" +#include "qapi/error.h" + +static void qemu_xhci_class_init(ObjectClass *klass, void *data) +{ + PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); + + k->vendor_id =3D PCI_VENDOR_ID_REDHAT; + k->device_id =3D PCI_DEVICE_ID_REDHAT_XHCI; + k->revision =3D 0x01; +} + +static void qemu_xhci_instance_init(Object *obj) +{ + XHCIState *xhci =3D XHCI(obj); + + xhci->msi =3D ON_OFF_AUTO_OFF; + xhci->msix =3D ON_OFF_AUTO_AUTO; + xhci->numintrs =3D MAXINTRS; + xhci->numslots =3D MAXSLOTS; + xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST); +} + +static const TypeInfo qemu_xhci_info =3D { + .name =3D TYPE_QEMU_XHCI, + .parent =3D TYPE_XHCI, + .class_init =3D qemu_xhci_class_init, + .instance_init =3D qemu_xhci_instance_init, +}; + +static void xhci_register_types(void) +{ + type_register_static(&qemu_xhci_info); +} + +type_init(xhci_register_types) diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index fa6ce98..d340518 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -429,12 +429,12 @@ static const char *ep_state_name(uint32_t state) ARRAY_SIZE(ep_state_names)); } =20 -static bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit) +bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit) { return xhci->flags & (1 << bit); } =20 -static void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit) +void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit) { xhci->flags |=3D (1 << bit); } @@ -3727,37 +3727,9 @@ static const TypeInfo xhci_info =3D { }, }; =20 -static void qemu_xhci_class_init(ObjectClass *klass, void *data) -{ - PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); - - k->vendor_id =3D PCI_VENDOR_ID_REDHAT; - k->device_id =3D PCI_DEVICE_ID_REDHAT_XHCI; - k->revision =3D 0x01; -} - -static void qemu_xhci_instance_init(Object *obj) -{ - XHCIState *xhci =3D XHCI(obj); - - xhci->msi =3D ON_OFF_AUTO_OFF; - xhci->msix =3D ON_OFF_AUTO_AUTO; - xhci->numintrs =3D MAXINTRS; - xhci->numslots =3D MAXSLOTS; - xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST); -} - -static const TypeInfo qemu_xhci_info =3D { - .name =3D TYPE_QEMU_XHCI, - .parent =3D TYPE_XHCI, - .class_init =3D qemu_xhci_class_init, - .instance_init =3D qemu_xhci_instance_init, -}; - static void xhci_register_types(void) { type_register_static(&xhci_info); - type_register_static(&qemu_xhci_info); } =20 type_init(xhci_register_types) diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index 18bed7e..ca03481 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -232,4 +232,6 @@ struct XHCIState { bool nec_quirks; }; =20 +bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit); +void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit); #endif --=20 2.7.4 From nobody Thu May 2 09:40:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1dmarc=pass fromdomain=xilinx.com) ARC-Seal: i=2; a=rsa-sha256; t=1593008854; cv=pass; d=zohomail.com; s=zohoarc; b=lhnK6clYYupN/17HSt0ME492dOKQOQDPHfybFsHcAzh7EuwLmOSdqMCcfvLSPKza8tzjdaCy+vShlY0xzQPIiXFfJA+R07XBDobtSSiNXcySgOuF6u78IQOmyYUuk8vzLTbZMNo7IIbiyp+PVnKTfXZ48+15IqPxXMo9sfhc9qk= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1593008854; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=/R7mpJtyvJL1s9Sf5yOn7hpQzt5Zp34BS8eCNjymUmk=; b=RrNgEq85lv0+5BopVyAud/7u2/B+0FU9EUganlvAING18JfXOJq+DuQSCHN4azElNMqrjcu7WWMzvD1HXAb5HS/G0i6+CqcZPUibsdIp2Wlqs3u4oCGqKTEOCjbmBhdyEImOddvPYlVROC5xTJ6ojCD+E5WEiz5eRTVHafiddFo= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1dmarc=pass fromdomain=xilinx.com) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1593008854312828.4696167479982; Wed, 24 Jun 2020 07:27:34 -0700 (PDT) Received: from localhost ([::1]:58666 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jo6NA-0004IA-Rv for importer@patchew.org; Wed, 24 Jun 2020 10:27:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37426) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jo6ME-000300-Vd for qemu-devel@nongnu.org; Wed, 24 Jun 2020 10:26:35 -0400 Received: from mail-mw2nam10on2066.outbound.protection.outlook.com ([40.107.94.66]:6191 helo=NAM10-MW2-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jo6MB-0003X0-Bv for qemu-devel@nongnu.org; Wed, 24 Jun 2020 10:26:34 -0400 Received: from CY1PR03CA0020.namprd03.prod.outlook.com (2603:10b6:600::30) by DM6PR02MB6478.namprd02.prod.outlook.com (2603:10b6:5:20b::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3131.20; Wed, 24 Jun 2020 14:26:28 +0000 Received: from CY1NAM02FT059.eop-nam02.prod.protection.outlook.com (2603:10b6:600:0:cafe::b0) by CY1PR03CA0020.outlook.office365.com (2603:10b6:600::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3131.20 via Frontend Transport; Wed, 24 Jun 2020 14:26:28 +0000 Received: from xsj-pvapsmtpgw01 (149.199.60.83) by CY1NAM02FT059.mail.protection.outlook.com (10.152.74.211) with Microsoft SMTP Server id 15.20.3131.20 via Frontend Transport; Wed, 24 Jun 2020 14:26:28 +0000 Received: from [149.199.38.66] (port=43440 helo=xsj-pvapsmtp01) by xsj-pvapsmtpgw01 with esmtp (Exim 4.90) (envelope-from ) id 1jo6Kv-0001Yz-UO; Wed, 24 Jun 2020 07:25:13 -0700 Received: from [127.0.0.1] (helo=xsj-smtp-dlp2.xlnx.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jo6M7-0000Kg-SI; Wed, 24 Jun 2020 07:26:27 -0700 Received: from xsj-pvapsmtp01 (smtp-fallback.xilinx.com [149.199.38.66] (may be forged)) by xsj-smtp-dlp2.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id 05OEQQPe009263; Wed, 24 Jun 2020 07:26:27 -0700 Received: from [10.140.6.35] (helo=xhdsaipava40.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jo6M6-0000KQ-5y; Wed, 24 Jun 2020 07:26:26 -0700 Received: by xhdsaipava40.xilinx.com (Postfix, from userid 14131) id 040FB13C6068; Wed, 24 Jun 2020 19:46:23 +0530 (IST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=LkP0DoQf0Kk2vRjicR5n4yXfn4DeMQEGDL7ykigDVR9MUOYYuz+buHLAFyYWfjFG7IA+QeYWJVWz1HuO01TbA2lbycMNDKmO/pLvzv3SsNmZybZH/ffpa+P+2/S57brllA7WoB+buNsWfX8BvaXWlNQR/l20OontNRYOnAB6KmsVcrlVV5ENgHFnZRfAy289wU4hX2RwDJstbCv10JRCpsFNGIQxZ8KnYtLjkQH8Ihgy3yZUbqjEMG0n8dhi/uzxIstnCV1EfVJymo6gdxFmUddnCujM1RIZBWWrHLo9LeaRYy+9ZSpV0ZcRQ77NtAvg50ZcE86sOPsIvHdWfFeyiQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=/R7mpJtyvJL1s9Sf5yOn7hpQzt5Zp34BS8eCNjymUmk=; b=jmEW24FqQfJRj7GB/g+4XgiCZ8O/SQaHIXK/C8LJl9bcEYfGvVM7tiFQdxQEikgWXu9RR7Jw8FC0Sdm5BwgmWnSTsv/ThQ337TxxEZaAk1BE5MXVC63w6ihJgl/tEX5nLcil1rkG4BFFLS0GIeFBnzxE/bOSL8Lj0uVAUuX/xguagn1UIy7zO+SULr/ZWRkHFYWw1ND/gckMVC+ebuxHsiS4ETf9vVNgxrUNcQ9sspuPdvJkyKgYLf3j2q76sB66mn7c4Sy2ha9QQmCbc7fJ+XkMhpjSZ3qx6KWQwqSz5j9sfj9M/8soXiEdtg1fcNBepRgeffd9uKSU2BtQsOs7TA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 149.199.60.83) smtp.rcpttodomain=wdc.com smtp.mailfrom=xilinx.com; dmarc=bestguesspass action=none header.from=xilinx.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=xilinx.onmicrosoft.com; s=selector2-xilinx-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=/R7mpJtyvJL1s9Sf5yOn7hpQzt5Zp34BS8eCNjymUmk=; b=r29FxHEwuy+mUkq3EzSOEshJc9FEXYOLFOAjOngT+IefdTG8k2QG0Rof4YhUpMNe7wqK02c3+tyWABZXYB30l+t8hSwsxtW5jKJoDAQeAx1dvZWcNEXM9l0rlwH6saxE2ffGLuAUPZFETPmSEinKVGxfYcsBBppETci8thScJ4c= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=xilinx.com; wdc.com; dkim=none (message not signed) header.d=none;wdc.com; dmarc=bestguesspass action=none header.from=xilinx.com; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: Pass (protection.outlook.com: domain of xilinx.com designates 149.199.60.83 as permitted sender) receiver=protection.outlook.com; client-ip=149.199.60.83; helo=xsj-pvapsmtpgw01; From: Sai Pavan Boddu To: Gerd Hoffmann , Peter Maydell Subject: [PATCH v2 3/3] usb/hcd-xhci: Split pci wrapper for xhci base model Date: Wed, 24 Jun 2020 19:46:16 +0530 Message-Id: <1593008176-9629-4-git-send-email-sai.pavan.boddu@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593008176-9629-1-git-send-email-sai.pavan.boddu@xilinx.com> References: <1593008176-9629-1-git-send-email-sai.pavan.boddu@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:xsj-pvapsmtpgw01; PTR:unknown-60-83.xilinx.com; CAT:NONE; SFTY:; SFS:(396003)(346002)(39860400002)(376002)(136003)(46966005)(83380400001)(6266002)(47076004)(36756003)(30864003)(6666004)(7416002)(478600001)(336012)(426003)(26005)(186003)(70206006)(70586007)(356005)(4326008)(8936002)(82310400002)(8676002)(5660300002)(81166007)(42186006)(54906003)(82740400003)(110136005)(316002)(2906002)(2616005)(2004002)(42866002)(309714004); DIR:OUT; SFP:1101; X-MS-PublicTrafficType: Email MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 88ebce30-94d9-4e7d-6dfd-08d8184a9524 X-MS-TrafficTypeDiagnostic: DM6PR02MB6478: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:208; X-Forefront-PRVS: 0444EB1997 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ADaSsJudb3zClZTQjIwPurfZx+rhZUEssdBUU8s0RkXnYuVy157MkkR2RCKU8P17Khf1TbfhyHr0sK7mKB7BYurCWPfiWyQ9RNLm2SeFCiLQ0se3qYX7xVzv5jWYm9BwGVOaWgqpIggKnPVdgTN/2z5aFdlAW7sYgV+J6lsrJwjUhdFFHGD+q6fuIMwGzWUH2L/7ETegf08002DJQZVEE1rO/1gY4rxnxBSIl1OzSA6m9sSefPvzJt/rdj72zTtgDRDBTZb1HL+bLTjUTObi6X+5DbMwbzQwtLXJYWEJB61z4Onwqtt3Qxl4ayUXO742zn9+kBSYKG0F+d5C8LeaUIAErsDPV+pJN/YL0/kVXJXl+dG4meCNIPxHw33fxBtV3DZyC9tHr/n93j37rFXzONbU4642bDcC4409eSTjPh/k66YcJBWBnprAb97MEVg9hMvex1z4uqHv/vNZ4gZU66ypTX+IVJk/QC6VCjxj4NZm/DeqJtvqHWWmiltDAcMgBDXHnl9zDpKWu+gyKU8e9AVJQi42xWXYEjeOF239ggo= X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jun 2020 14:26:28.1614 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 88ebce30-94d9-4e7d-6dfd-08d8184a9524 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-AuthSource: CY1NAM02FT059.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR02MB6478 Received-SPF: pass client-ip=40.107.94.66; envelope-from=saipava@xilinx.com; helo=NAM10-MW2-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/24 10:26:29 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Eduardo Habkost , Markus Armbruster , qemu-devel@nongnu.org, Alistair Francis , =?UTF-8?q?=27Marc-Andr=C3=A9=20Lureau=27?= , Ying Fang , Paolo Bonzini , =?UTF-8?q?=27Philippe=20Mathieu-Daud=C3=A9=27?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @xilinx.onmicrosoft.com) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch sets the base to use xhci as sysbus model, for which pci specific hooks are moved to hcd-xhci-pci.c. As a part of this requirment msi/msix interrupts handling is moved under XHCIPCIState, and XHCIState is non qom object, make use of 'container_of' calls to retrive XHCIPciState. Made required changes for qemu-xhci-nec. Signed-off-by: Sai Pavan Boddu --- hw/usb/Kconfig | 6 ++ hw/usb/Makefile.objs | 1 + hw/usb/hcd-xhci-nec.c | 14 +-- hw/usb/hcd-xhci-pci.c | 192 +++++++++++++++++++++++++++++++++++++++-- hw/usb/hcd-xhci-pci.h | 47 ++++++++++ hw/usb/hcd-xhci.c | 235 ++++++++--------------------------------------= ---- hw/usb/hcd-xhci.h | 23 +++-- 7 files changed, 293 insertions(+), 225 deletions(-) create mode 100644 hw/usb/hcd-xhci-pci.h diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig index d4d8c37..d9965c1 100644 --- a/hw/usb/Kconfig +++ b/hw/usb/Kconfig @@ -36,6 +36,12 @@ config USB_XHCI depends on PCI select USB =20 +config USB_XHCI_PCI + bool + default y if PCI_DEVICES + depends on PCI + select USB_XHCI + config USB_XHCI_NEC bool default y if PCI_DEVICES diff --git a/hw/usb/Makefile.objs b/hw/usb/Makefile.objs index fa5c3fa..98b1899 100644 --- a/hw/usb/Makefile.objs +++ b/hw/usb/Makefile.objs @@ -11,6 +11,7 @@ common-obj-$(CONFIG_USB_EHCI_PCI) +=3D hcd-ehci-pci.o common-obj-$(CONFIG_USB_EHCI_SYSBUS) +=3D hcd-ehci-sysbus.o common-obj-$(CONFIG_USB_XHCI) +=3D hcd-xhci.o common-obj-$(CONFIG_USB_XHCI_NEC) +=3D hcd-xhci-nec.o +common-obj-$(CONFIG_USB_XHCI_PCI) +=3D hcd-xhci-pci.o common-obj-$(CONFIG_USB_MUSB) +=3D hcd-musb.o common-obj-$(CONFIG_USB_DWC2) +=3D hcd-dwc2.o =20 diff --git a/hw/usb/hcd-xhci-nec.c b/hw/usb/hcd-xhci-nec.c index e6a5a22..1756d97 100644 --- a/hw/usb/hcd-xhci-nec.c +++ b/hw/usb/hcd-xhci-nec.c @@ -25,17 +25,17 @@ #include "hw/pci/pci.h" #include "hw/qdev-properties.h" =20 -#include "hcd-xhci.h" +#include "hcd-xhci-pci.h" =20 static Property nec_xhci_properties[] =3D { - DEFINE_PROP_ON_OFF_AUTO("msi", XHCIState, msi, ON_OFF_AUTO_AUTO), - DEFINE_PROP_ON_OFF_AUTO("msix", XHCIState, msix, ON_OFF_AUTO_AUTO), + DEFINE_PROP_ON_OFF_AUTO("msi", XHCIPciState, msi, ON_OFF_AUTO_AUTO), + DEFINE_PROP_ON_OFF_AUTO("msix", XHCIPciState, msix, ON_OFF_AUTO_AUTO), DEFINE_PROP_BIT("superspeed-ports-first", XHCIState, flags, XHCI_FLAG_SS_FIRST, true), - DEFINE_PROP_BIT("force-pcie-endcap", XHCIState, flags, + DEFINE_PROP_BIT("force-pcie-endcap", XHCIPciState, xhci.flags, XHCI_FLAG_FORCE_PCIE_ENDCAP, false), - DEFINE_PROP_UINT32("intrs", XHCIState, numintrs, MAXINTRS), - DEFINE_PROP_UINT32("slots", XHCIState, numslots, MAXSLOTS), + DEFINE_PROP_UINT32("intrs", XHCIPciState, xhci.numintrs, MAXINTRS), + DEFINE_PROP_UINT32("slots", XHCIPciState, xhci.numslots, MAXSLOTS), DEFINE_PROP_END_OF_LIST(), }; =20 @@ -52,7 +52,7 @@ static void nec_xhci_class_init(ObjectClass *klass, void = *data) =20 static const TypeInfo nec_xhci_info =3D { .name =3D TYPE_NEC_XHCI, - .parent =3D TYPE_XHCI, + .parent =3D TYPE_XHCI_PCI, .class_init =3D nec_xhci_class_init, }; =20 diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c index 26af683..005870b 100644 --- a/hw/usb/hcd-xhci-pci.c +++ b/hw/usb/hcd-xhci-pci.c @@ -23,12 +23,192 @@ #include "qemu/osdep.h" #include "hw/pci/pci.h" #include "hw/qdev-properties.h" +#include "migration/vmstate.h" #include "hw/pci/msi.h" #include "hw/pci/msix.h" -#include "hcd-xhci.h" +#include "hcd-xhci-pci.h" #include "trace.h" #include "qapi/error.h" =20 +#define OFF_MSIX_TABLE 0x3000 +#define OFF_MSIX_PBA 0x3800 + +static void xhci_pci_intr_update(XHCIState *xhci, int n, bool enable) +{ + XHCIPciState *s =3D container_of(xhci, XHCIPciState, xhci); + PCIDevice *pci_dev =3D PCI_DEVICE(s); + + if (!msix_enabled(pci_dev)) { + return; + } + if (enable =3D=3D !!s->msix_used[n]) { + return; + } + if (enable) { + trace_usb_xhci_irq_msix_use(n); + msix_vector_use(pci_dev, n); + s->msix_used[n] =3D 1; + } else { + trace_usb_xhci_irq_msix_unuse(n); + msix_vector_unuse(pci_dev, n); + s->msix_used[n] =3D 0; + } +} + +static void xhci_pci_intr_raise(XHCIState *xhci, int n, bool level) +{ + XHCIPciState *s =3D container_of(xhci, XHCIPciState, xhci); + PCIDevice *pci_dev =3D PCI_DEVICE(s); + + if (n =3D=3D 0 && + !(msix_enabled(pci_dev) || + msi_enabled(pci_dev))) { + pci_set_irq(pci_dev, level); + } + if (msix_enabled(pci_dev)) { + msix_notify(pci_dev, n); + return; + } + + if (msi_enabled(pci_dev)) { + msi_notify(pci_dev, n); + return; + } +} + +static void xhci_pci_reset(DeviceState *dev) +{ + XHCIPciState *s =3D XHCI_PCI(dev); + + xhci_reset(&s->xhci); +} + +static void usb_xhci_pci_realize(struct PCIDevice *dev, Error **errp) +{ + int ret; + Error *err =3D NULL; + XHCIPciState *s =3D XHCI_PCI(dev); + + dev->config[PCI_CLASS_PROG] =3D 0x30; /* xHCI */ + dev->config[PCI_INTERRUPT_PIN] =3D 0x01; /* interrupt pin 1 */ + dev->config[PCI_CACHE_LINE_SIZE] =3D 0x10; + dev->config[0x60] =3D 0x30; /* release number */ + + s->xhci.hostOpaque =3D DEVICE(s); + if (strcmp(object_get_typename(OBJECT(dev)), TYPE_NEC_XHCI) =3D=3D 0) { + s->xhci.nec_quirks =3D true; + } + s->xhci.intr_update =3D xhci_pci_intr_update; + s->xhci.intr_raise =3D xhci_pci_intr_raise; + usb_xhci_realize(&s->xhci, DEVICE(dev), errp); + + if (s->msi !=3D ON_OFF_AUTO_OFF) { + ret =3D msi_init(dev, 0x70, s->xhci.numintrs, true, false, &err); + /* + * Any error other than -ENOTSUP(board's MSI support is broken) + * is a programming error + */ + assert(!ret || ret =3D=3D -ENOTSUP); + if (ret && s->msi =3D=3D ON_OFF_AUTO_ON) { + /* Can't satisfy user's explicit msi=3Don request, fail */ + error_append_hint(&err, "You have to use msi=3Dauto (default) = or " + "msi=3Doff with this machine type.\n"); + error_propagate(errp, err); + return; + } + assert(!err || s->msi =3D=3D ON_OFF_AUTO_AUTO); + /* With msi=3Dauto, we fall back to MSI off silently */ + error_free(err); + } + pci_register_bar(dev, 0, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &s->xhci.mem); + + if (pci_bus_is_express(pci_get_bus(dev)) || + xhci_get_flag(&s->xhci, XHCI_FLAG_FORCE_PCIE_ENDCAP)) { + ret =3D pcie_endpoint_cap_init(dev, 0xa0); + assert(ret > 0); + } + + if (s->msix !=3D ON_OFF_AUTO_OFF) { + /* TODO check for errors, and should fail when msix=3Don */ + msix_init(dev, s->xhci.numintrs, + &s->xhci.mem, 0, OFF_MSIX_TABLE, + &s->xhci.mem, 0, OFF_MSIX_PBA, + 0x90, NULL); + } + s->xhci.as =3D pci_get_address_space(dev); +} + +static void usb_xhci_pci_exit(PCIDevice *dev) +{ + XHCIPciState *s =3D XHCI_PCI(dev); + /* destroy msix memory region */ + if (dev->msix_table && dev->msix_pba + && dev->msix_entry_used) { + msix_uninit(dev, &s->xhci.mem, &s->xhci.mem); + } + usb_xhci_unrealize(&s->xhci, DEVICE(dev), NULL); +} + +static Property xhci_pci_properties[] =3D { + DEFINE_PROP_BIT("streams", XHCIPciState, xhci.flags, + XHCI_FLAG_ENABLE_STREAMS, true), + DEFINE_PROP_UINT32("p2", XHCIPciState, xhci.numports_2, 4), + DEFINE_PROP_UINT32("p3", XHCIPciState, xhci.numports_3, 4), + DEFINE_PROP_END_OF_LIST(), +}; + +static const VMStateDescription vmstate_xhci_pci =3D { + .name =3D "xhci-pci", + .version_id =3D 1, + .fields =3D (VMStateField[]) { + VMSTATE_PCI_DEVICE(parent_obj, XHCIPciState), + VMSTATE_MSIX(parent_obj, XHCIPciState), + VMSTATE_UINT8_ARRAY(msix_used, XHCIPciState, MAXINTRS), + VMSTATE_STRUCT(xhci, XHCIPciState, 2, vmstate_xhci, XHCIState), + VMSTATE_END_OF_LIST() + } +}; + +static void xhci_instance_init(Object *obj) +{ + /* + * QEMU_PCI_CAP_EXPRESS initialization does not depend on QEMU command + * line, therefore, no need to wait to realize like other devices + */ + PCI_DEVICE(obj)->cap_present |=3D QEMU_PCI_CAP_EXPRESS; +} + +static void xhci_class_init(ObjectClass *klass, void *data) +{ + PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); + DeviceClass *dc =3D DEVICE_CLASS(klass); + + device_class_set_props(dc, xhci_pci_properties); + dc->reset =3D xhci_pci_reset; + dc->vmsd =3D &vmstate_xhci_pci; + set_bit(DEVICE_CATEGORY_USB, dc->categories); + k->realize =3D usb_xhci_pci_realize; + k->exit =3D usb_xhci_pci_exit; + k->class_id =3D PCI_CLASS_SERIAL_USB; +} + +static const TypeInfo xhci_pci_info =3D { + .name =3D TYPE_XHCI_PCI, + .parent =3D TYPE_PCI_DEVICE, + .instance_size =3D sizeof(XHCIPciState), + .class_init =3D xhci_class_init, + .instance_init =3D xhci_instance_init, + .abstract =3D true, + .interfaces =3D (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, +}; + static void qemu_xhci_class_init(ObjectClass *klass, void *data) { PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); @@ -40,10 +220,11 @@ static void qemu_xhci_class_init(ObjectClass *klass, v= oid *data) =20 static void qemu_xhci_instance_init(Object *obj) { - XHCIState *xhci =3D XHCI(obj); + XHCIPciState *s =3D XHCI_PCI(obj); + XHCIState *xhci =3D &s->xhci; =20 - xhci->msi =3D ON_OFF_AUTO_OFF; - xhci->msix =3D ON_OFF_AUTO_AUTO; + s->msi =3D ON_OFF_AUTO_OFF; + s->msix =3D ON_OFF_AUTO_AUTO; xhci->numintrs =3D MAXINTRS; xhci->numslots =3D MAXSLOTS; xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST); @@ -51,13 +232,14 @@ static void qemu_xhci_instance_init(Object *obj) =20 static const TypeInfo qemu_xhci_info =3D { .name =3D TYPE_QEMU_XHCI, - .parent =3D TYPE_XHCI, + .parent =3D TYPE_XHCI_PCI, .class_init =3D qemu_xhci_class_init, .instance_init =3D qemu_xhci_instance_init, }; =20 static void xhci_register_types(void) { + type_register_static(&xhci_pci_info); type_register_static(&qemu_xhci_info); } =20 diff --git a/hw/usb/hcd-xhci-pci.h b/hw/usb/hcd-xhci-pci.h new file mode 100644 index 0000000..6e01054 --- /dev/null +++ b/hw/usb/hcd-xhci-pci.h @@ -0,0 +1,47 @@ +/* + * USB xHCI controller emulation + * + * Copyright (c) 2011 Securiforest + * Date: 2011-05-11 ; Author: Hector Martin + * Based on usb-ohci.c, emulates Renesas NEC USB 3.0 + * Date: 2020-01-1; Author: Sai Pavan Boddu + * PCI hooks are moved from XHCIState to XHCIPciState + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef HW_USB_HCD_XHCI_PCI_H +#define HW_USB_HCD_XHCI_PCI_H + +#include "hw/usb.h" +#include "hcd-xhci.h" + +#define TYPE_XHCI_PCI "pci-xhci" +#define XHCI_PCI(obj) \ + OBJECT_CHECK(XHCIPciState, (obj), TYPE_XHCI_PCI) + + +typedef struct XHCIPciState { + /*< private >*/ + PCIDevice parent_obj; + /*< public >*/ + XHCIState xhci; + OnOffAuto msi; + OnOffAuto msix; + uint8_t msix_used[MAXINTRS]; + bool enable_streams; + uint32_t numports_2, numports_3; +} XHCIPciState; + +#endif diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index d340518..2e460d5 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -25,10 +25,7 @@ #include "qemu/queue.h" #include "hw/usb.h" #include "migration/vmstate.h" -#include "hw/pci/pci.h" #include "hw/qdev-properties.h" -#include "hw/pci/msi.h" -#include "hw/pci/msix.h" #include "trace.h" #include "qapi/error.h" =20 @@ -57,8 +54,6 @@ #define OFF_OPER LEN_CAP #define OFF_RUNTIME 0x1000 #define OFF_DOORBELL 0x2000 -#define OFF_MSIX_TABLE 0x3000 -#define OFF_MSIX_PBA 0x3800 /* must be power of 2 */ #define LEN_REGS 0x4000 =20 @@ -548,54 +543,28 @@ static XHCIPort *xhci_lookup_port(XHCIState *xhci, st= ruct USBPort *uport) return &xhci->ports[index]; } =20 -static void xhci_intx_update(XHCIState *xhci) +static void xhci_intr_update(XHCIState *xhci, int v) { - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); int level =3D 0; =20 - if (msix_enabled(pci_dev) || - msi_enabled(pci_dev)) { - return; - } - - if (xhci->intr[0].iman & IMAN_IP && - xhci->intr[0].iman & IMAN_IE && - xhci->usbcmd & USBCMD_INTE) { - level =3D 1; - } - - trace_usb_xhci_irq_intx(level); - pci_set_irq(pci_dev, level); -} - -static void xhci_msix_update(XHCIState *xhci, int v) -{ - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); - bool enabled; - - if (!msix_enabled(pci_dev)) { - return; - } - - enabled =3D xhci->intr[v].iman & IMAN_IE; - if (enabled =3D=3D xhci->intr[v].msix_used) { - return; + if (v =3D=3D 0) { + if (xhci->intr[0].iman & IMAN_IP && + xhci->intr[0].iman & IMAN_IE && + xhci->usbcmd & USBCMD_INTE) { + level =3D 1; + } + if (xhci->intr_raise) { + xhci->intr_raise(xhci, 0, level); + } } - - if (enabled) { - trace_usb_xhci_irq_msix_use(v); - msix_vector_use(pci_dev, v); - xhci->intr[v].msix_used =3D true; - } else { - trace_usb_xhci_irq_msix_unuse(v); - msix_vector_unuse(pci_dev, v); - xhci->intr[v].msix_used =3D false; + if (xhci->intr_update) { + xhci->intr_update(xhci, v, + xhci->intr[v].iman & IMAN_IE); } } =20 static void xhci_intr_raise(XHCIState *xhci, int v) { - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); bool pending =3D (xhci->intr[v].erdp_low & ERDP_EHB); =20 xhci->intr[v].erdp_low |=3D ERDP_EHB; @@ -612,22 +581,8 @@ static void xhci_intr_raise(XHCIState *xhci, int v) if (!(xhci->usbcmd & USBCMD_INTE)) { return; } - - if (msix_enabled(pci_dev)) { - trace_usb_xhci_irq_msix(v); - msix_notify(pci_dev, v); - return; - } - - if (msi_enabled(pci_dev)) { - trace_usb_xhci_irq_msi(v); - msi_notify(pci_dev, v); - return; - } - - if (v =3D=3D 0) { - trace_usb_xhci_irq_intx(1); - pci_irq_assert(pci_dev); + if (xhci->intr_raise) { + xhci->intr_raise(xhci, v, true); } } =20 @@ -1437,7 +1392,7 @@ static int xhci_xfer_create_sgl(XHCITransfer *xfer, i= nt in_xfer) int i; =20 xfer->int_req =3D false; - qemu_sglist_init(&xfer->sgl, DEVICE(xhci), xfer->trb_count, xhci->as); + qemu_sglist_init(&xfer->sgl, xhci->hostOpaque, xfer->trb_count, xhci->= as); for (i =3D 0; i < xfer->trb_count; i++) { XHCITRB *trb =3D &xfer->trbs[i]; dma_addr_t addr; @@ -2680,9 +2635,8 @@ static void xhci_port_reset(XHCIPort *port, bool warm= _reset) xhci_port_notify(port, PORTSC_PRC); } =20 -static void xhci_reset(DeviceState *dev) +void xhci_reset(XHCIState *xhci) { - XHCIState *xhci =3D XHCI(dev); int i; =20 trace_usb_xhci_reset(); @@ -2715,7 +2669,6 @@ static void xhci_reset(DeviceState *dev) xhci->intr[i].erstba_high =3D 0; xhci->intr[i].erdp_low =3D 0; xhci->intr[i].erdp_high =3D 0; - xhci->intr[i].msix_used =3D 0; =20 xhci->intr[i].er_ep_idx =3D 0; xhci->intr[i].er_pcs =3D 1; @@ -2938,7 +2891,6 @@ static void xhci_oper_write(void *ptr, hwaddr reg, uint64_t val, unsigned size) { XHCIState *xhci =3D ptr; - DeviceState *d =3D DEVICE(ptr); =20 trace_usb_xhci_oper_write(reg, val); =20 @@ -2960,15 +2912,15 @@ static void xhci_oper_write(void *ptr, hwaddr reg, xhci->usbcmd =3D val & 0xc0f; xhci_mfwrap_update(xhci); if (val & USBCMD_HCRST) { - xhci_reset(d); + xhci_reset(xhci); } - xhci_intx_update(xhci); + xhci_intr_update(xhci, 0); break; =20 case 0x04: /* USBSTS */ /* these bits are write-1-to-clear */ xhci->usbsts &=3D ~(val & (USBSTS_HSE|USBSTS_EINT|USBSTS_PCD|USBST= S_SRE)); - xhci_intx_update(xhci); + xhci_intr_update(xhci, 0); break; =20 case 0x14: /* DNCTRL */ @@ -3071,10 +3023,7 @@ static void xhci_runtime_write(void *ptr, hwaddr reg, } intr->iman &=3D ~IMAN_IE; intr->iman |=3D val & IMAN_IE; - if (v =3D=3D 0) { - xhci_intx_update(xhci); - } - xhci_msix_update(xhci, v); + xhci_intr_update(xhci, v); break; case 0x04: /* IMOD */ intr->imod =3D val; @@ -3319,7 +3268,6 @@ static USBBusOps xhci_bus_ops =3D { =20 static void usb_xhci_init(XHCIState *xhci) { - DeviceState *dev =3D DEVICE(xhci); XHCIPort *port; unsigned int i, usbports, speedmask; =20 @@ -3334,7 +3282,7 @@ static void usb_xhci_init(XHCIState *xhci) usbports =3D MAX(xhci->numports_2, xhci->numports_3); xhci->numports =3D xhci->numports_2 + xhci->numports_3; =20 - usb_bus_new(&xhci->bus, sizeof(xhci->bus), &xhci_bus_ops, dev); + usb_bus_new(&xhci->bus, sizeof(xhci->bus), &xhci_bus_ops, xhci->hostOp= aque); =20 for (i =3D 0; i < usbports; i++) { speedmask =3D 0; @@ -3374,21 +3322,10 @@ static void usb_xhci_init(XHCIState *xhci) } } =20 -static void usb_xhci_realize(struct PCIDevice *dev, Error **errp) +void usb_xhci_realize(XHCIState *xhci, DeviceState *dev, Error **errp) { - int i, ret; - Error *err =3D NULL; - - XHCIState *xhci =3D XHCI(dev); - - dev->config[PCI_CLASS_PROG] =3D 0x30; /* xHCI */ - dev->config[PCI_INTERRUPT_PIN] =3D 0x01; /* interrupt pin 1 */ - dev->config[PCI_CACHE_LINE_SIZE] =3D 0x10; - dev->config[0x60] =3D 0x30; /* release number */ + int i; =20 - if (strcmp(object_get_typename(OBJECT(dev)), TYPE_NEC_XHCI) =3D=3D 0) { - xhci->nec_quirks =3D true; - } if (xhci->numintrs > MAXINTRS) { xhci->numintrs =3D MAXINTRS; } @@ -3410,36 +3347,18 @@ static void usb_xhci_realize(struct PCIDevice *dev,= Error **errp) xhci->max_pstreams_mask =3D 0; } =20 - if (xhci->msi !=3D ON_OFF_AUTO_OFF) { - ret =3D msi_init(dev, 0x70, xhci->numintrs, true, false, &err); - /* Any error other than -ENOTSUP(board's MSI support is broken) - * is a programming error */ - assert(!ret || ret =3D=3D -ENOTSUP); - if (ret && xhci->msi =3D=3D ON_OFF_AUTO_ON) { - /* Can't satisfy user's explicit msi=3Don request, fail */ - error_append_hint(&err, "You have to use msi=3Dauto (default) = or " - "msi=3Doff with this machine type.\n"); - error_propagate(errp, err); - return; - } - assert(!err || xhci->msi =3D=3D ON_OFF_AUTO_AUTO); - /* With msi=3Dauto, we fall back to MSI off silently */ - error_free(err); - } - usb_xhci_init(xhci); - xhci->as =3D pci_get_address_space(dev); xhci->mfwrap_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, xhci_mfwrap_ti= mer, xhci); =20 - memory_region_init(&xhci->mem, OBJECT(xhci), "xhci", LEN_REGS); - memory_region_init_io(&xhci->mem_cap, OBJECT(xhci), &xhci_cap_ops, xhc= i, + memory_region_init(&xhci->mem, OBJECT(dev), "xhci", LEN_REGS); + memory_region_init_io(&xhci->mem_cap, OBJECT(dev), &xhci_cap_ops, xhci, "capabilities", LEN_CAP); - memory_region_init_io(&xhci->mem_oper, OBJECT(xhci), &xhci_oper_ops, x= hci, + memory_region_init_io(&xhci->mem_oper, OBJECT(dev), &xhci_oper_ops, xh= ci, "operational", 0x400); - memory_region_init_io(&xhci->mem_runtime, OBJECT(xhci), &xhci_runtime_= ops, xhci, - "runtime", LEN_RUNTIME); - memory_region_init_io(&xhci->mem_doorbell, OBJECT(xhci), &xhci_doorbel= l_ops, xhci, - "doorbell", LEN_DOORBELL); + memory_region_init_io(&xhci->mem_runtime, OBJECT(dev), &xhci_runtime_o= ps, + xhci, "runtime", LEN_RUNTIME); + memory_region_init_io(&xhci->mem_doorbell, OBJECT(dev), &xhci_doorbell= _ops, + xhci, "doorbell", LEN_DOORBELL); =20 memory_region_add_subregion(&xhci->mem, 0, &xhci->mem_cap); memory_region_add_subregion(&xhci->mem, OFF_OPER, &xhci->mem_oper); @@ -3450,34 +3369,15 @@ static void usb_xhci_realize(struct PCIDevice *dev,= Error **errp) XHCIPort *port =3D &xhci->ports[i]; uint32_t offset =3D OFF_OPER + 0x400 + 0x10 * i; port->xhci =3D xhci; - memory_region_init_io(&port->mem, OBJECT(xhci), &xhci_port_ops, po= rt, + memory_region_init_io(&port->mem, OBJECT(dev), &xhci_port_ops, por= t, port->name, 0x10); memory_region_add_subregion(&xhci->mem, offset, &port->mem); } - - pci_register_bar(dev, 0, - PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TY= PE_64, - &xhci->mem); - - if (pci_bus_is_express(pci_get_bus(dev)) || - xhci_get_flag(xhci, XHCI_FLAG_FORCE_PCIE_ENDCAP)) { - ret =3D pcie_endpoint_cap_init(dev, 0xa0); - assert(ret > 0); - } - - if (xhci->msix !=3D ON_OFF_AUTO_OFF) { - /* TODO check for errors, and should fail when msix=3Don */ - msix_init(dev, xhci->numintrs, - &xhci->mem, 0, OFF_MSIX_TABLE, - &xhci->mem, 0, OFF_MSIX_PBA, - 0x90, NULL); - } } =20 -static void usb_xhci_exit(PCIDevice *dev) +void usb_xhci_unrealize(XHCIState *xhci, DeviceState *dev, Error **errp) { int i; - XHCIState *xhci =3D XHCI(dev); =20 trace_usb_xhci_exit(); =20 @@ -3501,19 +3401,12 @@ static void usb_xhci_exit(PCIDevice *dev) memory_region_del_subregion(&xhci->mem, &port->mem); } =20 - /* destroy msix memory region */ - if (dev->msix_table && dev->msix_pba - && dev->msix_entry_used) { - msix_uninit(dev, &xhci->mem, &xhci->mem); - } - usb_bus_release(&xhci->bus); } =20 static int usb_xhci_post_load(void *opaque, int version_id) { XHCIState *xhci =3D opaque; - PCIDevice *pci_dev =3D PCI_DEVICE(xhci); XHCISlot *slot; XHCIEPContext *epctx; dma_addr_t dcbaap, pctx; @@ -3559,11 +3452,7 @@ static int usb_xhci_post_load(void *opaque, int vers= ion_id) } =20 for (intr =3D 0; intr < xhci->numintrs; intr++) { - if (xhci->intr[intr].msix_used) { - msix_vector_use(pci_dev, intr); - } else { - msix_vector_unuse(pci_dev, intr); - } + xhci_intr_update(xhci, intr); } =20 return 0; @@ -3632,7 +3521,6 @@ static const VMStateDescription vmstate_xhci_intr =3D= { VMSTATE_UINT32(erdp_high, XHCIInterrupter), =20 /* state */ - VMSTATE_BOOL(msix_used, XHCIInterrupter), VMSTATE_BOOL(er_pcs, XHCIInterrupter), VMSTATE_UINT64(er_start, XHCIInterrupter), VMSTATE_UINT32(er_size, XHCIInterrupter), @@ -3650,14 +3538,11 @@ static const VMStateDescription vmstate_xhci_intr = =3D { } }; =20 -static const VMStateDescription vmstate_xhci =3D { +const VMStateDescription vmstate_xhci =3D { .name =3D "xhci", .version_id =3D 1, .post_load =3D usb_xhci_post_load, .fields =3D (VMStateField[]) { - VMSTATE_PCI_DEVICE(parent_obj, XHCIState), - VMSTATE_MSIX(parent_obj, XHCIState), - VMSTATE_STRUCT_VARRAY_UINT32(ports, XHCIState, numports, 1, vmstate_xhci_port, XHCIPort), VMSTATE_STRUCT_VARRAY_UINT32(slots, XHCIState, numslots, 1, @@ -3683,53 +3568,3 @@ static const VMStateDescription vmstate_xhci =3D { VMSTATE_END_OF_LIST() } }; - -static Property xhci_properties[] =3D { - DEFINE_PROP_BIT("streams", XHCIState, flags, - XHCI_FLAG_ENABLE_STREAMS, true), - DEFINE_PROP_UINT32("p2", XHCIState, numports_2, 4), - DEFINE_PROP_UINT32("p3", XHCIState, numports_3, 4), - DEFINE_PROP_END_OF_LIST(), -}; - -static void xhci_instance_init(Object *obj) -{ - /* QEMU_PCI_CAP_EXPRESS initialization does not depend on QEMU command - * line, therefore, no need to wait to realize like other devices */ - PCI_DEVICE(obj)->cap_present |=3D QEMU_PCI_CAP_EXPRESS; -} - -static void xhci_class_init(ObjectClass *klass, void *data) -{ - PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); - DeviceClass *dc =3D DEVICE_CLASS(klass); - - dc->vmsd =3D &vmstate_xhci; - device_class_set_props(dc, xhci_properties); - dc->reset =3D xhci_reset; - set_bit(DEVICE_CATEGORY_USB, dc->categories); - k->realize =3D usb_xhci_realize; - k->exit =3D usb_xhci_exit; - k->class_id =3D PCI_CLASS_SERIAL_USB; -} - -static const TypeInfo xhci_info =3D { - .name =3D TYPE_XHCI, - .parent =3D TYPE_PCI_DEVICE, - .instance_size =3D sizeof(XHCIState), - .class_init =3D xhci_class_init, - .instance_init =3D xhci_instance_init, - .abstract =3D true, - .interfaces =3D (InterfaceInfo[]) { - { INTERFACE_PCIE_DEVICE }, - { INTERFACE_CONVENTIONAL_PCI_DEVICE }, - { } - }, -}; - -static void xhci_register_types(void) -{ - type_register_static(&xhci_info); -} - -type_init(xhci_register_types) diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index ca03481..33ed327 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -24,13 +24,9 @@ =20 #include "sysemu/dma.h" =20 -#define TYPE_XHCI "base-xhci" #define TYPE_NEC_XHCI "nec-usb-xhci" #define TYPE_QEMU_XHCI "qemu-xhci" =20 -#define XHCI(obj) \ - OBJECT_CHECK(XHCIState, (obj), TYPE_XHCI) - #define MAXPORTS_2 15 #define MAXPORTS_3 15 =20 @@ -170,7 +166,7 @@ typedef struct XHCIInterrupter { uint32_t erdp_low; uint32_t erdp_high; =20 - bool msix_used, er_pcs; + bool er_pcs; =20 dma_addr_t er_start; uint32_t er_size; @@ -184,11 +180,7 @@ typedef struct XHCIInterrupter { =20 } XHCIInterrupter; =20 -struct XHCIState { - /*< private >*/ - PCIDevice parent_obj; - /*< public >*/ - +typedef struct XHCIState { USBBus bus; MemoryRegion mem; AddressSpace *as; @@ -204,8 +196,9 @@ struct XHCIState { uint32_t numslots; uint32_t flags; uint32_t max_pstreams_mask; - OnOffAuto msi; - OnOffAuto msix; + void (*intr_update)(XHCIState *s, int n, bool enable); + void (*intr_raise)(XHCIState *s, int n, bool level); + DeviceState *hostOpaque; =20 /* Operational Registers */ uint32_t usbcmd; @@ -230,8 +223,12 @@ struct XHCIState { XHCIRing cmd_ring; =20 bool nec_quirks; -}; +} XHCIState; =20 +extern const VMStateDescription vmstate_xhci; +void xhci_reset(XHCIState *xhci); +void usb_xhci_realize(XHCIState *xhci, DeviceState *dev, Error **errp); +void usb_xhci_unrealize(XHCIState *xhci, DeviceState *dev, Error **errp); bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit); void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit); #endif --=20 2.7.4