From nobody Sat Feb 7 09:35:01 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1591880111; cv=none; d=zohomail.com; s=zohoarc; b=oJaNg7W4gmCLPCT8f8cpH3jlPANW9001wjbxow+peiV8XuNamUBuH7ZdfWlix4z9ACqSendZNQivwzCoVwozeK12bhhXxzrCIhBZ522zwka5cz8HTbUT4UxcVIH30zISJuC/7eC/ZUga41NHAGA1Hnwjo/aUUYacmdmww7M+dUQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1591880111; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=d1q/3CSbgXXJ6hKP4r3Kd1nJIKYUe/z3fk0csTcK2sk=; b=DfbROlSMeH2AmrSYQktHPEFdHhT4S2takT+zJPHyt6omw+OkENckrrq/XcTLWy+xquYDfNeQlL4JHx/FzD2WOhaQf6Ool8hxqIeIECshrEQdfyzxOmbjbgEWcI5M53QIMVSjAAiyqZ2fRlolLa4bbOAh9R6HcUcikKpSw9cPdA4= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1591880111198878.6893695392638; Thu, 11 Jun 2020 05:55:11 -0700 (PDT) Received: from localhost ([::1]:38500 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jjMjd-0006ih-BY for importer@patchew.org; Thu, 11 Jun 2020 08:55:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46444) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jjMd0-0002i1-I9 for qemu-devel@nongnu.org; Thu, 11 Jun 2020 08:48:18 -0400 Received: from mga06.intel.com ([134.134.136.31]:47009) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jjMcw-000814-Mi for qemu-devel@nongnu.org; Thu, 11 Jun 2020 08:48:18 -0400 Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jun 2020 05:48:01 -0700 Received: from jacob-builder.jf.intel.com ([10.7.199.155]) by orsmga005.jf.intel.com with ESMTP; 11 Jun 2020 05:48:00 -0700 IronPort-SDR: 7XokgMm5dTaG1fwkaB2nj85oEY4iGlxDKNHVljGkc5JRB1eKwObtypO4WVrejAEnl2VZJe5Df1 kEo47B5OfCmw== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False IronPort-SDR: RjUKKYc8y8dsANKwLfm/dIoXQDYHKqSXZ9EIjCSVLZ8Sr2kL+Kvtolir18iXYUDwAwZgqbCTKQ nQG6rkb6W0ZA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,499,1583222400"; d="scan'208";a="447911278" From: Liu Yi L To: qemu-devel@nongnu.org, alex.williamson@redhat.com, peterx@redhat.com Subject: [RFC v6 20/25] intel_iommu: do not pass down pasid bind for PASID #0 Date: Thu, 11 Jun 2020 05:54:19 -0700 Message-Id: <1591880064-30638-21-git-send-email-yi.l.liu@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1591880064-30638-1-git-send-email-yi.l.liu@intel.com> References: <1591880064-30638-1-git-send-email-yi.l.liu@intel.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=134.134.136.31; envelope-from=yi.l.liu@intel.com; helo=mga06.intel.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/11 08:48:01 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jean-philippe@linaro.org, kevin.tian@intel.com, yi.l.liu@intel.com, Yi Sun , Eduardo Habkost , kvm@vger.kernel.org, mst@redhat.com, jun.j.tian@intel.com, eric.auger@redhat.com, yi.y.sun@intel.com, Jacob Pan , pbonzini@redhat.com, hao.wu@intel.com, Richard Henderson , david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" RID_PASID field was introduced in VT-d 3.0 spec, it is used for DMA requests w/o PASID in scalable mode VT-d. It is also known as IOVA. And in VT-d 3.1 spec, there is definition on it: "Implementations not supporting RID_PASID capability (ECAP_REG.RPS is 0b), use a PASID value of 0 to perform address translation for requests without PASID." This patch adds a check against the PASIDs which are going to be bound to device. For PASID #0, it is not necessary to pass down pasid bind request for it since PASID #0 is used as RID_PASID for DMA requests without pasid. Further reason is current Intel vIOMMU supports gIOVA by shadowing guest 2nd level page table. However, in future, if guest IOMMU driver uses 1st level page table to store IOVA mappings, then guest IOVA support will also be done via nested translation. When gIOVA is over FLPT, then vIOMMU should pass down the pasid bind request for PASID #0 to host, host needs to bind the guest IOVA page table to a proper PASID. e.g. PASID value in RID_PASID field for PF/VF if ECAP_REG.RPS is clear or default PASID for ADI (Assignable Device Interface in Scalable IOV solution). IOVA over FLPT support on Intel VT-d: https://lkml.org/lkml/2019/9/23/297 Cc: Kevin Tian Cc: Jacob Pan Cc: Peter Xu Cc: Yi Sun Cc: Paolo Bonzini Cc: Richard Henderson Cc: Eduardo Habkost Reviewed-by: Peter Xu Signed-off-by: Liu Yi L --- hw/i386/intel_iommu.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index a8431c2..b113aa5 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -1893,6 +1893,16 @@ static int vtd_bind_guest_pasid(IntelIOMMUState *s, = VTDBus *vtd_bus, HostIOMMUContext *iommu_ctx; int ret =3D -1; =20 + if (pasid < VTD_HPASID_MIN) { + /* + * If pasid < VTD_HPASID_MIN, this pasid is not allocated + * from host. No need to pass down the changes on it to host. + * TODO: when IOVA over FLPT is ready, this switch should be + * refined. + */ + return 0; + } + vtd_dev_icx =3D vtd_bus->dev_icx[devfn]; if (!vtd_dev_icx) { /* means no need to go further, e.g. for emulated devices */ --=20 2.7.4