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Subject: [PATCH v5 03/16] hw/i386: Consolidate topology functions From: Babu Moger To: ehabkost@redhat.com, marcel.apfelbaum@gmail.com, pbonzini@redhat.com, rth@twiddle.net, mst@redhat.com, imammedo@redhat.com Date: Tue, 03 Mar 2020 13:57:11 -0600 Message-ID: <158326543195.40452.7437947098625099601.stgit@naples-babu.amd.com> In-Reply-To: <158326531474.40452.11433722850425537745.stgit@naples-babu.amd.com> References: <158326531474.40452.11433722850425537745.stgit@naples-babu.amd.com> User-Agent: StGit/unknown-version Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SN6PR08CA0016.namprd08.prod.outlook.com (2603:10b6:805:66::29) To SN1PR12MB2560.namprd12.prod.outlook.com (2603:10b6:802:26::19) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-Originating-IP: [165.204.78.2] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 1490c453-3098-43e2-e81e-08d7bfad10cd X-MS-TrafficTypeDiagnostic: SN1PR12MB2573:|SN1PR12MB2573: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4303; 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Signed-off-by: Babu Moger Reviewed-by: Igor Mammedov --- include/hw/i386/topology.h | 68 ++++++++++++++--------------------------= ---- target/i386/cpu.c | 23 +++++++-------- 2 files changed, 32 insertions(+), 59 deletions(-) diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h index 7ea507f376..ba52d49079 100644 --- a/include/hw/i386/topology.h +++ b/include/hw/i386/topology.h @@ -69,56 +69,42 @@ static unsigned apicid_bitwidth_for_count(unsigned coun= t) =20 /* Bit width of the SMT_ID (thread ID) field on the APIC ID */ -static inline unsigned apicid_smt_width(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads) +static inline unsigned apicid_smt_width(X86CPUTopoInfo *topo_info) { - return apicid_bitwidth_for_count(nr_threads); + return apicid_bitwidth_for_count(topo_info->threads_per_core); } =20 /* Bit width of the Core_ID field */ -static inline unsigned apicid_core_width(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads) +static inline unsigned apicid_core_width(X86CPUTopoInfo *topo_info) { - return apicid_bitwidth_for_count(nr_cores); + return apicid_bitwidth_for_count(topo_info->cores_per_die); } =20 /* Bit width of the Die_ID field */ -static inline unsigned apicid_die_width(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads) +static inline unsigned apicid_die_width(X86CPUTopoInfo *topo_info) { - return apicid_bitwidth_for_count(nr_dies); + return apicid_bitwidth_for_count(topo_info->dies_per_pkg); } =20 /* Bit offset of the Core_ID field */ -static inline unsigned apicid_core_offset(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads) +static inline unsigned apicid_core_offset(X86CPUTopoInfo *topo_info) { - return apicid_smt_width(nr_dies, nr_cores, nr_threads); + return apicid_smt_width(topo_info); } =20 /* Bit offset of the Die_ID field */ -static inline unsigned apicid_die_offset(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads) +static inline unsigned apicid_die_offset(X86CPUTopoInfo *topo_info) { - return apicid_core_offset(nr_dies, nr_cores, nr_threads) + - apicid_core_width(nr_dies, nr_cores, nr_threads); + return apicid_core_offset(topo_info) + apicid_core_width(topo_info); } =20 /* Bit offset of the Pkg_ID (socket ID) field */ -static inline unsigned apicid_pkg_offset(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads) +static inline unsigned apicid_pkg_offset(X86CPUTopoInfo *topo_info) { - return apicid_die_offset(nr_dies, nr_cores, nr_threads) + - apicid_die_width(nr_dies, nr_cores, nr_threads); + return apicid_die_offset(topo_info) + apicid_die_width(topo_info); } =20 /* Make APIC ID for the CPU based on Pkg_ID, Core_ID, SMT_ID @@ -128,16 +114,9 @@ static inline unsigned apicid_pkg_offset(unsigned nr_d= ies, static inline apic_id_t apicid_from_topo_ids(X86CPUTopoInfo *topo_info, const X86CPUTopoIDs *topo_ids) { - unsigned nr_dies =3D topo_info->dies_per_pkg; - unsigned nr_cores =3D topo_info->cores_per_die; - unsigned nr_threads =3D topo_info->threads_per_core; - - return (topo_ids->pkg_id << - apicid_pkg_offset(nr_dies, nr_cores, nr_threads)) | - (topo_ids->die_id << - apicid_die_offset(nr_dies, nr_cores, nr_threads)) | - (topo_ids->core_id << - apicid_core_offset(nr_dies, nr_cores, nr_threads)) | + return (topo_ids->pkg_id << apicid_pkg_offset(topo_info)) | + (topo_ids->die_id << apicid_die_offset(topo_info)) | + (topo_ids->core_id << apicid_core_offset(topo_info)) | topo_ids->smt_id; } =20 @@ -165,20 +144,15 @@ static inline void x86_topo_ids_from_apicid(apic_id_t= apicid, X86CPUTopoInfo *topo_info, X86CPUTopoIDs *topo_ids) { - unsigned nr_dies =3D topo_info->dies_per_pkg; - unsigned nr_cores =3D topo_info->cores_per_die; - unsigned nr_threads =3D topo_info->threads_per_core; - topo_ids->smt_id =3D apicid & - ~(0xFFFFFFFFUL << apicid_smt_width(nr_dies, nr_cores, nr_threa= ds)); + ~(0xFFFFFFFFUL << apicid_smt_width(topo_info)); topo_ids->core_id =3D - (apicid >> apicid_core_offset(nr_dies, nr_cores, nr_threads)) & - ~(0xFFFFFFFFUL << apicid_core_width(nr_dies, nr_cores, nr_thre= ads)); + (apicid >> apicid_core_offset(topo_info)) & + ~(0xFFFFFFFFUL << apicid_core_width(topo_info)); topo_ids->die_id =3D - (apicid >> apicid_die_offset(nr_dies, nr_cores, nr_threads)) & - ~(0xFFFFFFFFUL << apicid_die_width(nr_dies, nr_cores, nr_threa= ds)); - topo_ids->pkg_id =3D - apicid >> apicid_pkg_offset(nr_dies, nr_cores, nr_threads); + (apicid >> apicid_die_offset(topo_info)) & + ~(0xFFFFFFFFUL << apicid_die_width(topo_info)); + topo_ids->pkg_id =3D apicid >> apicid_pkg_offset(topo_info); } =20 /* Make APIC ID for the CPU 'cpu_index' diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 92fafa2659..1263271edd 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5369,6 +5369,11 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,= uint32_t count, uint32_t die_offset; uint32_t limit; uint32_t signature[3]; + X86CPUTopoInfo topo_info; + + topo_info.dies_per_pkg =3D env->nr_dies; + topo_info.cores_per_die =3D cs->nr_cores; + topo_info.threads_per_core =3D cs->nr_threads; =20 /* Calculate & apply limits for different index ranges */ if (index >=3D 0xC0000000) { @@ -5455,8 +5460,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, eax, ebx, ecx, edx); break; case 3: /* L3 cache info */ - die_offset =3D apicid_die_offset(env->nr_dies, - cs->nr_cores, cs->nr_threads); + die_offset =3D apicid_die_offset(&topo_info); if (cpu->enable_l3_cache) { encode_cache_cpuid4(env->cache_info_cpuid4.l3_cache, (1 << die_offset), cs->nr_cores, @@ -5547,14 +5551,12 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index= , uint32_t count, =20 switch (count) { case 0: - *eax =3D apicid_core_offset(env->nr_dies, - cs->nr_cores, cs->nr_threads); + *eax =3D apicid_core_offset(&topo_info); *ebx =3D cs->nr_threads; *ecx |=3D CPUID_TOPOLOGY_LEVEL_SMT; break; case 1: - *eax =3D apicid_pkg_offset(env->nr_dies, - cs->nr_cores, cs->nr_threads); + *eax =3D apicid_pkg_offset(&topo_info); *ebx =3D cs->nr_cores * cs->nr_threads; *ecx |=3D CPUID_TOPOLOGY_LEVEL_CORE; break; @@ -5578,20 +5580,17 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index= , uint32_t count, *edx =3D cpu->apic_id; switch (count) { case 0: - *eax =3D apicid_core_offset(env->nr_dies, cs->nr_cores, - cs->nr_threads); + *eax =3D apicid_core_offset(&topo_info); *ebx =3D cs->nr_threads; *ecx |=3D CPUID_TOPOLOGY_LEVEL_SMT; break; case 1: - *eax =3D apicid_die_offset(env->nr_dies, cs->nr_cores, - cs->nr_threads); + *eax =3D apicid_die_offset(&topo_info); *ebx =3D cs->nr_cores * cs->nr_threads; *ecx |=3D CPUID_TOPOLOGY_LEVEL_CORE; break; case 2: - *eax =3D apicid_pkg_offset(env->nr_dies, cs->nr_cores, - cs->nr_threads); + *eax =3D apicid_pkg_offset(&topo_info); *ebx =3D env->nr_dies * cs->nr_cores * cs->nr_threads; *ecx |=3D CPUID_TOPOLOGY_LEVEL_DIE; break;