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Tue, 3 Mar 2020 10:11:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1583230269; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cb4ZfAWCO9mcSOBb5FJvhksNequRo3224EqHsve4XNM=; b=Y8pxvTY4qg2ONQ8vv0hBuZni7ygQvbxkgG1hxW37B0nWVAqGI31JF2V2iBkJDF+JmkVm2R PJctwvA6P9ZF0lBwyosa6Cydahqqa+gaJ0PRpLfGheL7M/ydC/M6Z5Q8JR7IwVprezpW2/ opqSF2URcwzTO36ghp4dH21QHQvCC4w= X-MC-Unique: bWjba_BQMc-GtTg445_e8w-1 From: Jason Wang To: peter.maydell@linaro.org Subject: [PULL V2 09/23] dp8393x: Use long-word-aligned RRA pointers in 32-bit mode Date: Tue, 3 Mar 2020 18:10:28 +0800 Message-Id: <1583230242-14597-10-git-send-email-jasowang@redhat.com> In-Reply-To: <1583230242-14597-1-git-send-email-jasowang@redhat.com> References: <1583230242-14597-1-git-send-email-jasowang@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 205.139.110.120 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jason Wang , qemu-devel@nongnu.org, Finn Thain Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Finn Thain Section 3.4.1 of the datasheet says, The alignment of the RRA is confined to either word or long word boundaries, depending upon the data width mode. In 16-bit mode, the RRA must be aligned to a word boundary (A0 is always zero) and in 32-bit mode, the RRA is aligned to a long word boundary (A0 and A1 are always zero). This constraint has been implemented for 16-bit mode; implement it for 32-bit mode too. Signed-off-by: Finn Thain Tested-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Jason Wang --- hw/net/dp8393x.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index 6329341..d8bf248 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -665,12 +665,16 @@ static void dp8393x_write(void *opaque, hwaddr addr, = uint64_t data, qemu_flush_queued_packets(qemu_get_queue(s->nic)); } break; - /* Ignore least significant bit */ + /* The guest is required to store aligned pointers here */ case SONIC_RSA: case SONIC_REA: case SONIC_RRP: case SONIC_RWP: - s->regs[reg] =3D val & 0xfffe; + if (s->regs[SONIC_DCR] & SONIC_DCR_DW) { + s->regs[reg] =3D val & 0xfffc; + } else { + s->regs[reg] =3D val & 0xfffe; + } break; /* Invert written value for some registers */ case SONIC_CRCT: --=20 2.5.0