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08:44:33 -0800 Received: by vu-tsimpson1-aus.qualcomm.com (Postfix, from userid 47164) id 74A951191; Fri, 28 Feb 2020 10:44:33 -0600 (CST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1582908359; x=1614444359; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=p+Vri9ID0v2qMPSRVZCDVR6Fjn8xFLAsEsVPVgd29To=; b=fqiriyAZHkvpHkKjB0u5NhVJEgQrSe89eXcaDw7WiLeP24qiw3d9kbBc u6h0JJuPTZUENzEUaPaYdm0p5GFrGzIdN/MV9gMG7f+1KZkg9dxxt9pa1 ZVN5kyvFvVQzTalv8ujmVr6shxtIbN+hUwvGukDdEhh7tdq67LytCN8eX U=; From: Taylor Simpson To: qemu-devel@nongnu.org Subject: [RFC PATCH v2 59/67] Hexagon HVX semantics generator Date: Fri, 28 Feb 2020 10:43:55 -0600 Message-Id: <1582908244-304-60-git-send-email-tsimpson@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1582908244-304-1-git-send-email-tsimpson@quicinc.com> References: <1582908244-304-1-git-send-email-tsimpson@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 199.106.114.39 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, Taylor Simpson , philmd@redhat.com, aleksandar.m.mail@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Add HVX support to the semantics generator Signed-off-by: Taylor Simpson --- target/hexagon/gen_semantics.c | 9 +++ target/hexagon/do_qemu.py | 175 +++++++++++++++++++++++++++++++++++++= +--- 2 files changed, 171 insertions(+), 13 deletions(-) diff --git a/target/hexagon/gen_semantics.c b/target/hexagon/gen_semantics.c index 65d04fa..f5ee3ae 100644 --- a/target/hexagon/gen_semantics.c +++ b/target/hexagon/gen_semantics.c @@ -87,6 +87,15 @@ int main(int argc, char *argv[]) #include "imported/macros.def" #undef DEF_MACRO =20 +/* + * Process the macros for HVX + */ +#define DEF_MACRO(MNAME, PARAMS, SDESC, LDESC, BEH, ATTRS) \ + fprintf(outfile, "MACROATTRIB(\"%s\",\"\"\"%s\"\"\",\"%s\",\"%s\")\n",= \ + #MNAME, STRINGIZE(BEH), STRINGIZE(ATTRS), EXTSTR); +#include "imported/allext_macros.def" +#undef DEF_MACRO + fclose(outfile); return 0; } diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py index 32543c8..1306e6e 100755 --- a/target/hexagon/do_qemu.py +++ b/target/hexagon/do_qemu.py @@ -107,6 +107,16 @@ def SEMANTICS(tag, beh, sem): attribdict[tag] =3D set() tags.append(tag) # dicts have no order, this is for order =20 +def EXT_SEMANTICS(ext, tag, beh, sem): + #print tag,beh,sem + extnames[ext] =3D True + extdict[tag] =3D ext + behdict[tag] =3D beh + semdict[tag] =3D sem + attribdict[tag] =3D set() + tags.append(tag) # dicts have no order, this is for order + + def ATTRIBUTES(tag, attribstring): attribstring =3D \ attribstring.replace("ATTRIBS","").replace("(","").replace(")","") @@ -170,6 +180,9 @@ def compute_tag_immediates(tag): ## P predicate register ## R GPR register ## M modifier register +## Q HVX predicate vector +## V HVX vector register +## O HVX new vector register ## regid can be one of the following ## d, e destination register ## dd destination register pair @@ -201,6 +214,9 @@ def is_readwrite(regid): def is_scalar_reg(regtype): return regtype in "RPC" =20 +def is_hvx_reg(regtype): + return regtype in "VQ" + def is_old_val(regtype, regid, tag): return regtype+regid+'V' in semdict[tag] =20 @@ -211,7 +227,8 @@ tagimms =3D dict(zip(tags, list(map(compute_tag_immedia= tes, tags)))) =20 def need_slot(tag): if ('A_CONDEXEC' in attribdict[tag] or - 'A_STORE' in attribdict[tag]): + 'A_STORE' in attribdict[tag] or + 'A_CVI' in attribdict[tag]): return 1 else: return 0 @@ -297,19 +314,32 @@ def gen_helper_prototype(f, tag, regs, imms): f.write('DEF_HELPER_%s(%s' % (def_helper_size, tag)) =20 ## Generate the qemu DEF_HELPER type for each result + ## Iterate over this list twice + ## - Emit the scalar result + ## - Emit the vector result i=3D0 for regtype,regid,toss,numregs in regs: if (is_written(regid)): - gen_def_helper_opn(f, tag, regtype, regid, toss, numregs, = i) + if (not is_hvx_reg(regtype)): + gen_def_helper_opn(f, tag, regtype, regid, toss, numre= gs, i) i +=3D 1 =20 ## Put the env between the outputs and inputs f.write(', env' ) i +=3D 1 =20 + # Second pass + for regtype,regid,toss,numregs in regs: + if (is_written(regid)): + if (is_hvx_reg(regtype)): + gen_def_helper_opn(f, tag, regtype, regid, toss, numre= gs, i) + i +=3D 1 + ## Generate the qemu type for each input operand (regs and immedia= tes) for regtype,regid,toss,numregs in regs: if (is_read(regid)): + if (is_hvx_reg(regtype) and is_readwrite(regid)): + continue gen_def_helper_opn(f, tag, regtype, regid, toss, numregs, = i) i +=3D 1 for immlett,bits,immshift in imms: @@ -437,11 +467,33 @@ def genptr_dst_write(f,regtype, regid): macro =3D "WRITE_%sREG_%s" % (regtype, regid) f.write("%s(%s%sN, %s%sV);\n" % (macro, regtype, regid, regtype, regid= )) =20 +def genptr_dst_write_ext(f, regtype, regid, newv=3D"0"): + macro =3D "WRITE_%sREG_%s" % (regtype, regid) + f.write("%s(%s%sN, %s%sV,%s);\n" % \ + (macro, regtype, regid, regtype, regid, newv)) + def genptr_dst_write_opn(f,regtype, regid, tag): if (is_pair(regid)): - genptr_dst_write(f, regtype, regid) + if (is_hvx_reg(regtype)): + if ('A_CVI_TMP' in attribdict[tag] or + 'A_CVI_TMP_DST' in attribdict[tag]): + genptr_dst_write_ext(f, regtype, regid, "EXT_TMP") + else: + genptr_dst_write_ext(f, regtype, regid) + else: + genptr_dst_write(f, regtype, regid) elif (is_single(regid)): - genptr_dst_write(f, regtype, regid) + if (is_hvx_reg(regtype)): + if 'A_CVI_NEW' in attribdict[tag]: + genptr_dst_write_ext(f, regtype, regid, "EXT_NEW") + elif 'A_CVI_TMP' in attribdict[tag]: + genptr_dst_write_ext(f, regtype, regid, "EXT_TMP") + elif 'A_CVI_TMP_DST' in attribdict[tag]: + genptr_dst_write_ext(f, regtype, regid, "EXT_TMP") + else: + genptr_dst_write_ext(f, regtype, regid, "EXT_DFL") + else: + genptr_dst_write(f, regtype, regid) else: print("Bad register parse: ",regtype,regid,toss,numregs) =20 @@ -504,13 +556,23 @@ def gen_tcg_func(f, tag, regs, imms): ## If there is a scalar result, it is the return type for regtype,regid,toss,numregs in regs: if (is_written(regid)): + if (is_hvx_reg(regtype)): + continue gen_helper_call_opn(f, tag, regtype, regid, toss, numregs, i) i +=3D 1 if (i > 0): f.write(", ") f.write("cpu_env") i=3D1 for regtype,regid,toss,numregs in regs: + if (is_written(regid)): + if (not is_hvx_reg(regtype)): + continue + gen_helper_call_opn(f, tag, regtype, regid, toss, numregs, i) + i +=3D 1 + for regtype,regid,toss,numregs in regs: if (is_read(regid)): + if (is_hvx_reg(regtype) and is_readwrite(regid)): + continue gen_helper_call_opn(f, tag, regtype, regid, toss, numregs, i) i +=3D 1 for immlett,bits,immshift in imms: @@ -573,12 +635,26 @@ def gen_helper_arg_pair(f,regtype,regid,regno): if regno >=3D 0 : f.write(", ") f.write("int64_t %s%sV" % (regtype,regid)) =20 +def gen_helper_arg_ext(f,regtype,regid,regno): + if regno > 0 : f.write(", ") + f.write("void *%s%sV_void" % (regtype,regid)) + +def gen_helper_arg_ext_pair(f,regtype,regid,regno): + if regno > 0 : f.write(", ") + f.write("void *%s%sV_void" % (regtype,regid)) + def gen_helper_arg_opn(f,regtype,regid,i): if (is_pair(regid)): - gen_helper_arg_pair(f,regtype,regid,i) + if (is_hvx_reg(regtype)): + gen_helper_arg_ext_pair(f,regtype,regid,i) + else: + gen_helper_arg_pair(f,regtype,regid,i) elif (is_single(regid)): if is_old_val(regtype, regid, tag): - gen_helper_arg(f,regtype,regid,i) + if (is_hvx_reg(regtype)): + gen_helper_arg_ext(f,regtype,regid,i) + else: + gen_helper_arg(f,regtype,regid,i) elif is_new_val(regtype, regid, tag): gen_helper_arg_new(f,regtype,regid,i) else: @@ -597,25 +673,61 @@ def gen_helper_dest_decl_pair(f,regtype,regid,regno,s= ubfield=3D""): f.write("int64_t %s%sV%s =3D 0;\n" % \ (regtype,regid,subfield)) =20 +def gen_helper_dest_decl_ext(f,regtype,regid): + f.write("/* %s%sV is *(mmvector_t*)(%s%sV_void) */\n" % \ + (regtype,regid,regtype,regid)) + +def gen_helper_dest_decl_ext_pair(f,regtype,regid,regno): + f.write("/* %s%sV is *(mmvector_pair_t*))%s%sV_void) */\n" % \ + (regtype,regid,regtype, regid)) + def gen_helper_dest_decl_opn(f,regtype,regid,i): if (is_pair(regid)): - gen_helper_dest_decl_pair(f,regtype,regid,i) + if (is_hvx_reg(regtype)): + gen_helper_dest_decl_ext_pair(f,regtype,regid, i) + else: + gen_helper_dest_decl_pair(f,regtype,regid,i) elif (is_single(regid)): - gen_helper_dest_decl(f,regtype,regid,i) + if (is_hvx_reg(regtype)): + gen_helper_dest_decl_ext(f,regtype,regid) + else: + gen_helper_dest_decl(f,regtype,regid,i) else: print("Bad register parse: ",regtype,regid,toss,numregs) =20 +def gen_helper_src_var_ext(f,regtype,regid): + f.write("/* %s%sV is *(mmvector_t*)(%s%sV_void) */\n" % \ + (regtype,regid,regtype,regid)) + +def gen_helper_src_var_ext_pair(f,regtype,regid,regno): + f.write("/* %s%sV%s is *(mmvector_pair_t*)(%s%sV%s_void) */\n" % \ + (regtype,regid,regno,regtype,regid,regno)) + def gen_helper_return(f,regtype,regid,regno): f.write("return %s%sV;\n" % (regtype,regid)) =20 def gen_helper_return_pair(f,regtype,regid,regno): f.write("return %s%sV;\n" % (regtype,regid)) =20 +def gen_helper_dst_write_ext(f,regtype,regid): + f.write("/* %s%sV is *(mmvector_t*)%s%sV_void */\n" % \ + (regtype,regid,regtype,regid)) + +def gen_helper_dst_write_ext_pair(f,regtype,regid): + f.write("/* %s%sV is *(mmvector_pair_t*)%s%sV_void */\n" % \ + (regtype,regid, regtype,regid)) + def gen_helper_return_opn(f, regtype, regid, i): if (is_pair(regid)): - gen_helper_return_pair(f,regtype,regid,i) + if (is_hvx_reg(regtype)): + gen_helper_dst_write_ext_pair(f,regtype,regid) + else: + gen_helper_return_pair(f,regtype,regid,i) elif (is_single(regid)): - gen_helper_return(f,regtype,regid,i) + if (is_hvx_reg(regtype)): + gen_helper_dst_write_ext(f,regtype,regid) + else: + gen_helper_return(f,regtype,regid,i) else: print("Bad register parse: ",regtype,regid,toss,numregs) =20 @@ -654,14 +766,20 @@ def gen_helper_definition(f, tag, regs, imms): % (tag, tag)) else: ## The return type of the function is the type of the destination - ## register + ## register (if scalar) i=3D0 for regtype,regid,toss,numregs in regs: if (is_written(regid)): if (is_pair(regid)): - gen_helper_return_type_pair(f,regtype,regid,i) + if (is_hvx_reg(regtype)): + continue + else: + gen_helper_return_type_pair(f,regtype,regid,i) elif (is_single(regid)): - gen_helper_return_type(f,regtype,regid,i) + if (is_hvx_reg(regtype)): + continue + else: + gen_helper_return_type(f,regtype,regid,i) else: print("Bad register parse: ",regtype,regid,toss,numreg= s) i +=3D 1 @@ -670,10 +788,30 @@ def gen_helper_definition(f, tag, regs, imms): f.write("void") f.write(" HELPER(%s)(CPUHexagonState *env" % tag) =20 + ## Arguments include the vector destination operands i =3D 1 + for regtype,regid,toss,numregs in regs: + if (is_written(regid)): + if (is_pair(regid)): + if (is_hvx_reg(regtype)): + gen_helper_arg_ext_pair(f,regtype,regid,i) + else: + continue + elif (is_single(regid)): + if (is_hvx_reg(regtype)): + gen_helper_arg_ext(f,regtype,regid,i) + else: + # This is the return value of the function + continue + else: + print("Bad register parse: ",regtype,regid,toss,numreg= s) + i +=3D 1 + ## Arguments to the helper function are the source regs and immedi= ates for regtype,regid,toss,numregs in regs: if (is_read(regid)): + if (is_hvx_reg(regtype) and is_readwrite(regid)): + continue gen_helper_arg_opn(f,regtype,regid,i) i +=3D 1 for immlett,bits,immshift in imms: @@ -696,6 +834,17 @@ def gen_helper_definition(f, tag, regs, imms): gen_helper_dest_decl_opn(f,regtype,regid,i) i +=3D 1 =20 + for regtype,regid,toss,numregs in regs: + if (is_read(regid)): + if (is_pair(regid)): + if (is_hvx_reg(regtype)): + gen_helper_src_var_ext_pair(f,regtype,regid,i) + elif (is_single(regid)): + if (is_hvx_reg(regtype)): + gen_helper_src_var_ext(f,regtype,regid) + else: + print("Bad register parse: ",regtype,regid,toss,numreg= s) + if 'A_FPOP' in attribdict[tag]: f.write('fFPOP_START();\n'); =20 --=20 2.7.4