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FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: U2lFcjZVbGlpFxgFOd/7C70pNf/++QxjCRhVTKuGgiRRnph7+WapHtpXfFhPwGDJIDi7pSdZQd/V7gegBt4215ptJh7VG7ZLsebS/Wg/YFHADwhTqh29qxQbxIu5RaBkMTn1hIkMU8vrtmLyeOyr8Al5Nq3dXoZm4MtjTC6fnq7fT95KfCJOH+H91P6RY7COs/ePpDO3dICLVebOG+ypit8LjQh2/l0UIVXSzVaJ2xd2adkqmzXKBBpOJuc6t6cI67hzl/C5A7w0pZ8vpST9zsACH9NtMq+41pvjQjfaSHEBT1+8K3u6MX5xFn2uv4n//9I+F8Laa0JXWVossSm2b008Gx5zj6DJDF+n+I1IExaT3ratkvO2CHGU0ju+mY5Nho3q/u1XqeMJILFN3BA4o/HqIf9Qis9LEhTH0QCdp6cvZXj6JTirO3KyFcX4uuuM X-MS-Exchange-AntiSpam-MessageData: NiQGtoxtvEbfPWrAG8CpSFb1eh3EursYBP2o8TzHsEy5XDyWM0z5jqJ60e5AvGXO67LU+I/GnFlibHVaU4NGV5C4uaa2EMCHsSuEYPcrl+qEFJcAEm2708XBHuSQuC2y1gs67ihUAbVhx5LxKpYxgQ== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 568460ee-748c-4286-41ec-08d7b0b0de96 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2020 18:16:39.2735 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: aqxuCnpWZzmouDYO5smAPkAfVItyFKNHe7xRx9gqfmlT5O+thAP2MzL48FhtUCoP X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR12MB1318 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 40.107.236.40 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @amdcloud.onmicrosoft.com) This is an effort to re-arrange few data structure for better readability. Add X86CPUTopoInfo which will have all the topology informations required to build the cpu topology. There is no functional changes. Signed-off-by: Babu Moger Reviewed-by: Igor Mammedov --- hw/i386/pc.c | 14 ++++++++------ hw/i386/x86.c | 28 +++++++++++++++++++++------- include/hw/i386/topology.h | 38 ++++++++++++++++++++++++-------------- 3 files changed, 53 insertions(+), 27 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 3a580f6a60..2adf7f6afa 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1741,6 +1741,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_d= ev, X86MachineState *x86ms =3D X86_MACHINE(pcms); unsigned int smp_cores =3D ms->smp.cores; unsigned int smp_threads =3D ms->smp.threads; + X86CPUTopoInfo topo_info; =20 if(!object_dynamic_cast(OBJECT(cpu), ms->cpu_type)) { error_setg(errp, "Invalid CPU type, expected cpu type: '%s'", @@ -1748,6 +1749,10 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_= dev, return; } =20 + topo_info.dies_per_pkg =3D x86ms->smp_dies; + topo_info.cores_per_die =3D smp_cores; + topo_info.threads_per_core =3D smp_threads; + env->nr_dies =3D x86ms->smp_dies; =20 /* @@ -1803,16 +1808,14 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug= _dev, topo_ids.die_id =3D cpu->die_id; topo_ids.core_id =3D cpu->core_id; topo_ids.smt_id =3D cpu->thread_id; - cpu->apic_id =3D apicid_from_topo_ids(x86ms->smp_dies, smp_cores, - smp_threads, &topo_ids); + cpu->apic_id =3D apicid_from_topo_ids(&topo_info, &topo_ids); } =20 cpu_slot =3D pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx); if (!cpu_slot) { MachineState *ms =3D MACHINE(pcms); =20 - x86_topo_ids_from_apicid(cpu->apic_id, x86ms->smp_dies, - smp_cores, smp_threads, &topo_ids); + x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); error_setg(errp, "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with" " APIC ID %" PRIu32 ", valid index range 0:%d", @@ -1833,8 +1836,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_d= ev, /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizef= n() * once -smp refactoring is complete and there will be CPU private * CPUState::nr_cores and CPUState::nr_threads fields instead of globa= ls */ - x86_topo_ids_from_apicid(cpu->apic_id, x86ms->smp_dies, - smp_cores, smp_threads, &topo_ids); + x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); if (cpu->socket_id !=3D -1 && cpu->socket_id !=3D topo_ids.pkg_id) { error_setg(errp, "property socket-id: %u doesn't match set apic-id= :" " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, topo_id= s.pkg_id); diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 4a112c8e30..f18cab8e5c 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -65,11 +65,15 @@ uint32_t x86_cpu_apic_id_from_index(X86MachineState *x8= 6ms, { MachineState *ms =3D MACHINE(x86ms); X86MachineClass *x86mc =3D X86_MACHINE_GET_CLASS(x86ms); + X86CPUTopoInfo topo_info; uint32_t correct_id; static bool warned; =20 - correct_id =3D x86_apicid_from_cpu_idx(x86ms->smp_dies, ms->smp.cores, - ms->smp.threads, cpu_index); + topo_info.dies_per_pkg =3D x86ms->smp_dies; + topo_info.cores_per_die =3D ms->smp.cores; + topo_info.threads_per_core =3D ms->smp.threads; + + correct_id =3D x86_apicid_from_cpu_idx(&topo_info, cpu_index); if (x86mc->compat_apic_id_mode) { if (cpu_index !=3D correct_id && !warned && !qtest_enabled()) { error_report("APIC IDs set in compatibility mode, " @@ -140,19 +144,25 @@ int64_t x86_get_default_cpu_node_id(const MachineStat= e *ms, int idx) { X86CPUTopoIDs topo_ids; X86MachineState *x86ms =3D X86_MACHINE(ms); + X86CPUTopoInfo topo_info; + + topo_info.dies_per_pkg =3D x86ms->smp_dies; + topo_info.cores_per_die =3D ms->smp.cores; + topo_info.threads_per_core =3D ms->smp.threads; + =20 assert(idx < ms->possible_cpus->len); x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, - x86ms->smp_dies, ms->smp.cores, - ms->smp.threads, &topo_ids); + &topo_info, &topo_ids); return topo_ids.pkg_id % ms->numa_state->num_nodes; } =20 const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms) { X86MachineState *x86ms =3D X86_MACHINE(ms); - int i; unsigned int max_cpus =3D ms->smp.max_cpus; + X86CPUTopoInfo topo_info; + int i; =20 if (ms->possible_cpus) { /* @@ -166,6 +176,11 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(Machine= State *ms) ms->possible_cpus =3D g_malloc0(sizeof(CPUArchIdList) + sizeof(CPUArchId) * max_cpus); ms->possible_cpus->len =3D max_cpus; + + topo_info.dies_per_pkg =3D x86ms->smp_dies; + topo_info.cores_per_die =3D ms->smp.cores; + topo_info.threads_per_core =3D ms->smp.threads; + for (i =3D 0; i < ms->possible_cpus->len; i++) { X86CPUTopoIDs topo_ids; =20 @@ -174,8 +189,7 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(MachineS= tate *ms) ms->possible_cpus->cpus[i].arch_id =3D x86_cpu_apic_id_from_index(x86ms, i); x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, - x86ms->smp_dies, ms->smp.cores, - ms->smp.threads, &topo_ids); + &topo_info, &topo_ids); ms->possible_cpus->cpus[i].props.has_socket_id =3D true; ms->possible_cpus->cpus[i].props.socket_id =3D topo_ids.pkg_id; if (x86ms->smp_dies > 1) { diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h index 6c184f3115..cf1935d548 100644 --- a/include/hw/i386/topology.h +++ b/include/hw/i386/topology.h @@ -52,6 +52,12 @@ typedef struct X86CPUTopoIDs { unsigned smt_id; } X86CPUTopoIDs; =20 +typedef struct X86CPUTopoInfo { + unsigned dies_per_pkg; + unsigned cores_per_die; + unsigned threads_per_core; +} X86CPUTopoInfo; + /* Return the bit width needed for 'count' IDs */ static unsigned apicid_bitwidth_for_count(unsigned count) @@ -119,11 +125,13 @@ static inline unsigned apicid_pkg_offset(unsigned nr_= dies, * * The caller must make sure core_id < nr_cores and smt_id < nr_threads. */ -static inline apic_id_t apicid_from_topo_ids(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads, +static inline apic_id_t apicid_from_topo_ids(X86CPUTopoInfo *topo_info, const X86CPUTopoIDs *topo_ids) { + unsigned nr_dies =3D topo_info->dies_per_pkg; + unsigned nr_cores =3D topo_info->cores_per_die; + unsigned nr_threads =3D topo_info->threads_per_core; + return (topo_ids->pkg_id << apicid_pkg_offset(nr_dies, nr_cores, nr_t= hreads)) | (topo_ids->die_id << apicid_die_offset(nr_dies, nr_cores, nr_t= hreads)) | (topo_ids->core_id << apicid_core_offset(nr_dies, nr_cores, nr_= threads)) | @@ -133,12 +141,14 @@ static inline apic_id_t apicid_from_topo_ids(unsigned= nr_dies, /* Calculate thread/core/package IDs for a specific topology, * based on (contiguous) CPU index */ -static inline void x86_topo_ids_from_idx(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads, +static inline void x86_topo_ids_from_idx(X86CPUTopoInfo *topo_info, unsigned cpu_index, X86CPUTopoIDs *topo_ids) { + unsigned nr_dies =3D topo_info->dies_per_pkg; + unsigned nr_cores =3D topo_info->cores_per_die; + unsigned nr_threads =3D topo_info->threads_per_core; + topo_ids->pkg_id =3D cpu_index / (nr_dies * nr_cores * nr_threads); topo_ids->die_id =3D cpu_index / (nr_cores * nr_threads) % nr_dies; topo_ids->core_id =3D cpu_index / nr_threads % nr_cores; @@ -149,11 +159,13 @@ static inline void x86_topo_ids_from_idx(unsigned nr_= dies, * based on APIC ID */ static inline void x86_topo_ids_from_apicid(apic_id_t apicid, - unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads, + X86CPUTopoInfo *topo_info, X86CPUTopoIDs *topo_ids) { + unsigned nr_dies =3D topo_info->dies_per_pkg; + unsigned nr_cores =3D topo_info->cores_per_die; + unsigned nr_threads =3D topo_info->threads_per_core; + topo_ids->smt_id =3D apicid & ~(0xFFFFFFFFUL << apicid_smt_width(nr_dies, nr_cores, nr_threa= ds)); topo_ids->core_id =3D @@ -169,14 +181,12 @@ static inline void x86_topo_ids_from_apicid(apic_id_t= apicid, * * 'cpu_index' is a sequential, contiguous ID for the CPU. */ -static inline apic_id_t x86_apicid_from_cpu_idx(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads, +static inline apic_id_t x86_apicid_from_cpu_idx(X86CPUTopoInfo *topo_info, unsigned cpu_index) { X86CPUTopoIDs topo_ids; - x86_topo_ids_from_idx(nr_dies, nr_cores, nr_threads, cpu_index, &topo_= ids); - return apicid_from_topo_ids(nr_dies, nr_cores, nr_threads, &topo_ids); + x86_topo_ids_from_idx(topo_info, cpu_index, &topo_ids); + return apicid_from_topo_ids(topo_info, &topo_ids); } =20 #endif /* HW_I386_TOPOLOGY_H */