From nobody Fri May 17 13:35:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1578483292; cv=none; d=zohomail.com; s=zohoarc; b=MfaWuv+XyORbwSsK4b21pisufNSfmXjHsN1KdurgwEdn+EFsO/BB0vu+fwD6NkTRjo7dVFAenzJzTVN0K+vqTMkGYJPMVgooYOS1nopSwlHQxsvcJKmO3YzmjouhZ3wU5s3SS01bxWDu8jwJijMDW1PQZCSOhWHmZN1JK7yV+PY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1578483292; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=unvcPK2BQ2vkBelbvnBtN2iBrW0LhrAXHZiC5iNf1KM=; b=V8VkAtVZBt7wXvjFYIaPZm6cXlTF2uNA22O2JqpN27H+ydh4PIwvvwRumIH7FChyjcVbELDt9kMJ53C7atSCW/WOefISpprwpGQas9H3lMU9nnf+ZdylKYDDfFcyOUMdaINwr7iDKfVWfdKuMp6Sg15n75j5STH/cNfNCBzSgJU= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1578483292192926.0592233424768; Wed, 8 Jan 2020 03:34:52 -0800 (PST) Received: from localhost ([::1]:42366 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ip9bu-0006yV-UY for importer@patchew.org; Wed, 08 Jan 2020 06:34:50 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:55543) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ip9Zq-0005Eg-IL for qemu-devel@nongnu.org; Wed, 08 Jan 2020 06:32:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ip9Zp-0002e5-Do for qemu-devel@nongnu.org; Wed, 08 Jan 2020 06:32:42 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:2230 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ip9Zm-0002Y4-QS; Wed, 08 Jan 2020 06:32:39 -0500 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 9367E28A300D5AB3394B; Wed, 8 Jan 2020 19:32:32 +0800 (CST) Received: from localhost.localdomain (10.151.151.249) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.439.0; Wed, 8 Jan 2020 19:32:25 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , Subject: [PATCH v22 1/9] hw/arm/virt: Introduce a RAS machine option Date: Wed, 8 Jan 2020 19:32:15 +0800 Message-ID: <1578483143-14905-2-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> References: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.151.151.249] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.190 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: zhengxiang9@huawei.com, linuxarm@huawei.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" RAS Virtualization feature is not supported now, so add a RAS machine option and disable it by default. Reviewed-by: Peter Maydell Signed-off-by: Dongjiu Geng Signed-off-by: Xiang Zheng Acked-by: Xiang Zheng --- hw/arm/virt.c | 23 +++++++++++++++++++++++ include/hw/arm/virt.h | 1 + 2 files changed, 24 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 39ab5f4..fe2571f 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1818,6 +1818,20 @@ static void virt_set_its(Object *obj, bool value, Er= ror **errp) vms->its =3D value; } =20 +static bool virt_get_ras(Object *obj, Error **errp) +{ + VirtMachineState *vms =3D VIRT_MACHINE(obj); + + return vms->ras; +} + +static void virt_set_ras(Object *obj, bool value, Error **errp) +{ + VirtMachineState *vms =3D VIRT_MACHINE(obj); + + vms->ras =3D value; +} + static char *virt_get_gic_version(Object *obj, Error **errp) { VirtMachineState *vms =3D VIRT_MACHINE(obj); @@ -2121,6 +2135,15 @@ static void virt_instance_init(Object *obj) "Valid values are none and smmuv3", NULL); =20 + /* Default disallows RAS instantiation */ + vms->ras =3D false; + object_property_add_bool(obj, "ras", virt_get_ras, + virt_set_ras, NULL); + object_property_set_description(obj, "ras", + "Set on/off to enable/disable reportin= g host memory errors " + "to a KVM guest using ACPI and guest e= xternal abort exceptions", + NULL); + vms->irqmap =3D a15irqmap; =20 virt_flash_create(vms); diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 38f0c33..15057f7 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -122,6 +122,7 @@ typedef struct { bool highmem_ecam; bool its; bool virt; + bool ras; int32_t gic_version; VirtIOMMUType iommu; struct arm_boot_info bootinfo; --=20 1.8.3.1 From nobody Fri May 17 13:35:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; 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Wed, 8 Jan 2020 19:32:26 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , Subject: [PATCH v22 2/9] docs: APEI GHES generation and CPER record description Date: Wed, 8 Jan 2020 19:32:16 +0800 Message-ID: <1578483143-14905-3-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> References: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.151.151.249] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.190 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: zhengxiang9@huawei.com, linuxarm@huawei.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add APEI/GHES detailed design document Signed-off-by: Dongjiu Geng Signed-off-by: Xiang Zheng Reviewed-by: Michael S. Tsirkin Reviewed-by: Igor Mammedov --- docs/specs/acpi_hest_ghes.rst | 110 ++++++++++++++++++++++++++++++++++++++= ++++ docs/specs/index.rst | 1 + 2 files changed, 111 insertions(+) create mode 100644 docs/specs/acpi_hest_ghes.rst diff --git a/docs/specs/acpi_hest_ghes.rst b/docs/specs/acpi_hest_ghes.rst new file mode 100644 index 0000000..7a1aa90 --- /dev/null +++ b/docs/specs/acpi_hest_ghes.rst @@ -0,0 +1,110 @@ +APEI tables generating and CPER record +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +.. + Copyright (c) 2019 HUAWEI TECHNOLOGIES CO., LTD. + + This work is licensed under the terms of the GNU GPL, version 2 or late= r. + See the COPYING file in the top-level directory. + +Design Details +-------------- + +:: + + etc/acpi/tables etc/hardware_errors + =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D = =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + + +--------------------------+ +----------------------------+ + | | HEST | +--------->| error_block_address1 |= ------+ + | +--------------------------+ | +----------------------------+= | + | | GHES1 | | +------->| error_block_address2 |= ------+-+ + | +--------------------------+ | | +----------------------------+= | | + | | ................. | | | | .............. |= | | + | | error_status_address-----+-+ | -----------------------------+= | | + | | ................. | | +--->| error_block_addressN |= ------+-+---+ + | | read_ack_register--------+-+ | | +----------------------------+= | | | + | | read_ack_preserve | +-+---+--->| read_ack_register1 |= | | | + | | read_ack_write | | | +----------------------------+= | | | + + +--------------------------+ | +-+--->| read_ack_register2 |= | | | + | | GHES2 | | | | +----------------------------+= | | | + + +--------------------------+ | | | | ............. |= | | | + | | ................. | | | | +----------------------------+= | | | + | | error_status_address-----+---+ | | +->| read_ack_registerN |= | | | + | | ................. | | | | +----------------------------+= | | | + | | read_ack_register--------+-----+ | | |Generic Error Status Block 1|= <-----+ | | + | | read_ack_preserve | | | |-+------------------------+-+= | | + | | read_ack_write | | | | | CPER | |= | | + + +--------------------------| | | | | CPER | |= | | + | | ............... | | | | | .... | |= | | + + +--------------------------+ | | | | CPER | |= | | + | | GHESN | | | |-+------------------------+-|= | | + + +--------------------------+ | | |Generic Error Status Block 2|= <-------+ | + | | ................. | | | |-+------------------------+-+= | + | | error_status_address-----+-------+ | | | CPER | |= | + | | ................. | | | | CPER | |= | + | | read_ack_register--------+---------+ | | .... | |= | + | | read_ack_preserve | | | CPER | |= | + | | read_ack_write | +-+------------------------+-+= | + + +--------------------------+ | .......... |= | + |----------------------------+= | + |Generic Error Status Block N = |<----------+ + |-+-------------------------+-+ + | | CPER | | + | | CPER | | + | | .... | | + | | CPER | | + +-+-------------------------+-+ + + +(1) QEMU generates the ACPI HEST table. This table goes in the current + "etc/acpi/tables" fw_cfg blob. Each error source has different + notification types. + +(2) A new fw_cfg blob called "etc/hardware_errors" is introduced. QEMU + also needs to populate this blob. The "etc/hardware_errors" fw_cfg blob + contains an address registers table and an Error Status Data Block tab= le. + +(3) The address registers table contains N Error Block Address entries + and N Read Ack Register entries. The size for each entry is 8-byte. + The Error Status Data Block table contains N Error Status Data Block + entries. The size for each entry is 4096(0x1000) bytes. The total size + for the "etc/hardware_errors" fw_cfg blob is (N * 8 * 2 + N * 4096) by= tes. + N is the number of the kinds of hardware error sources. + +(4) QEMU generates the ACPI linker/loader script for the firmware. The + firmware pre-allocates memory for "etc/acpi/tables", "etc/hardware_err= ors" + and copies blob contents there. + +(5) QEMU generates N ADD_POINTER commands, which patch addresses in the + "error_status_address" fields of the HEST table with a pointer to the + corresponding "address registers" in the "etc/hardware_errors" blob. + +(6) QEMU generates N ADD_POINTER commands, which patch addresses in the + "read_ack_register" fields of the HEST table with a pointer to the + corresponding "read_ack_register" within the "etc/hardware_errors" blo= b. + +(7) QEMU generates N ADD_POINTER commands for the firmware, which patch + addresses in the "error_block_address" fields with a pointer to the + respective "Error Status Data Block" in the "etc/hardware_errors" blob. + +(8) QEMU defines a third and write-only fw_cfg blob which is called + "etc/hardware_errors_addr". Through that blob, the firmware can send b= ack + the guest-side allocation addresses to QEMU. The "etc/hardware_errors_= addr" + blob contains a 8-byte entry. QEMU generates a single WRITE_POINTER co= mmand + for the firmware. The firmware will write back the start address of + "etc/hardware_errors" blob to the fw_cfg file "etc/hardware_errors_add= r". + +(9) When QEMU gets a SIGBUS from the kernel, QEMU writes CPER into corresp= onding + "Error Status Data Block", guest memory, and then injects platform spe= cific + interrupt (in case of arm/virt machine it's Synchronous External Abort= ) as a + notification which is necessary for notifying the guest. + +(10) This notification (in virtual hardware) will be handled by the guest + kernel, on receiving notification, guest APEI driver could read the C= PER error + and take appropriate action. + +(11) kvm_arch_on_sigbus_vcpu() uses source_id as index in "etc/hardware_er= rors" to + find out "Error Status Data Block" entry corresponding to error sourc= e. So supported + source_id values should be assigned here and not be changed afterward= s to make sure + that guest will write error into expected "Error Status Data Block" e= ven if guest was + migrated to a newer QEMU. diff --git a/docs/specs/index.rst b/docs/specs/index.rst index 984ba44..3019b9c 100644 --- a/docs/specs/index.rst +++ b/docs/specs/index.rst @@ -13,3 +13,4 @@ Contents: ppc-xive ppc-spapr-xive acpi_hw_reduced_hotplug + acpi_hest_ghes --=20 1.8.3.1 From nobody Fri May 17 13:35:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1578483601; cv=none; d=zohomail.com; s=zohoarc; b=Bqag3Pitop0AKPK2R2D7yFI7erqUzX0iGnoe6YFyR+Gwlxt/HbJwYejjsG7HU3j+7d6O1Q7ZM/l0mEO2h2fYVDSM+QzkIm9jF90n00OPibUsAwbd62VFgypBvv9FB4/W6aEuCTPx/Oho+6N+oPTBiT+0VtprPjsp81QrJZcjR/M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1578483601; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=YJAgIhDoOxjpTnK2rV2DJrWtwUkUSEsLo/+k/vNqsic=; b=GpkbW1Ezuyg8UiHZiBzDbTikCyRfwM0lcig8kW5fI9lnrLa/Odjx7JT5Q1pzupARj2RxBvSIwBwCVzN1fJ9W+QrfKJBFvvhl1tc2m6HRis3JfVGyjBu0HAC/1Nfg180+srCJ5zzpNaNj9kmaZwOdn2Ffl/EtPNS5TqMXKbiVFLE= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1578483601191617.4225212817083; Wed, 8 Jan 2020 03:40:01 -0800 (PST) Received: from localhost ([::1]:42456 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ip9gu-00079P-0q for importer@patchew.org; Wed, 08 Jan 2020 06:40:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:55689) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ip9Zu-0005Jm-Mr for qemu-devel@nongnu.org; Wed, 08 Jan 2020 06:32:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ip9Zs-0002hG-CN for qemu-devel@nongnu.org; Wed, 08 Jan 2020 06:32:46 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:2233 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ip9Zn-0002az-Id; Wed, 08 Jan 2020 06:32:40 -0500 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 97C921739C8CA1790FD0; Wed, 8 Jan 2020 19:32:37 +0800 (CST) Received: from localhost.localdomain (10.151.151.249) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.439.0; Wed, 8 Jan 2020 19:32:27 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , Subject: [PATCH v22 3/9] ACPI: Build related register address fields via hardware error fw_cfg blob Date: Wed, 8 Jan 2020 19:32:17 +0800 Message-ID: <1578483143-14905-4-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> References: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.151.151.249] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.190 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: zhengxiang9@huawei.com, linuxarm@huawei.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch builds error_block_address and read_ack_register fields in hardware errors table , the error_block_address points to Generic Error Status Block(GESB) via bios_linker. The max size for one GESB is 0x1000 in bytes, For more detailed information, please refer to document: docs/specs/acpi_hest_ghes.rst Now we only support one Error source, if necessary, we can extend to support more. Suggested-by: Laszlo Ersek Signed-off-by: Dongjiu Geng Signed-off-by: Xiang Zheng Reviewed-by: Michael S. Tsirkin --- default-configs/arm-softmmu.mak | 1 + hw/acpi/Kconfig | 4 ++ hw/acpi/Makefile.objs | 1 + hw/acpi/aml-build.c | 2 + hw/acpi/ghes.c | 94 +++++++++++++++++++++++++++++++++++++= ++++ hw/arm/virt-acpi-build.c | 6 +++ include/hw/acpi/aml-build.h | 1 + include/hw/acpi/ghes.h | 26 ++++++++++++ 8 files changed, 135 insertions(+) create mode 100644 hw/acpi/ghes.c create mode 100644 include/hw/acpi/ghes.h diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.= mak index 1f2e0e7..5722f31 100644 --- a/default-configs/arm-softmmu.mak +++ b/default-configs/arm-softmmu.mak @@ -40,3 +40,4 @@ CONFIG_FSL_IMX25=3Dy CONFIG_FSL_IMX7=3Dy CONFIG_FSL_IMX6UL=3Dy CONFIG_SEMIHOSTING=3Dy +CONFIG_ACPI_APEI=3Dy diff --git a/hw/acpi/Kconfig b/hw/acpi/Kconfig index 12e3f1e..ed8c34d 100644 --- a/hw/acpi/Kconfig +++ b/hw/acpi/Kconfig @@ -23,6 +23,10 @@ config ACPI_NVDIMM bool depends on ACPI =20 +config ACPI_APEI + bool + depends on ACPI + config ACPI_PCI bool depends on ACPI && PCI diff --git a/hw/acpi/Makefile.objs b/hw/acpi/Makefile.objs index 9925305..7b5db4b 100644 --- a/hw/acpi/Makefile.objs +++ b/hw/acpi/Makefile.objs @@ -5,6 +5,7 @@ common-obj-$(CONFIG_ACPI_CPU_HOTPLUG) +=3D cpu_hotplug.o common-obj-$(CONFIG_ACPI_MEMORY_HOTPLUG) +=3D memory_hotplug.o common-obj-$(CONFIG_ACPI_CPU_HOTPLUG) +=3D cpu.o common-obj-$(CONFIG_ACPI_NVDIMM) +=3D nvdimm.o +common-obj-$(CONFIG_ACPI_APEI) +=3D ghes.o common-obj-$(CONFIG_ACPI_VMGENID) +=3D vmgenid.o common-obj-$(CONFIG_ACPI_HW_REDUCED) +=3D generic_event_device.o common-obj-$(call lnot,$(CONFIG_ACPI_X86)) +=3D acpi-stub.o diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index 2c3702b..3681ec6 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -1578,6 +1578,7 @@ void acpi_build_tables_init(AcpiBuildTables *tables) tables->table_data =3D g_array_new(false, true /* clear */, 1); tables->tcpalog =3D g_array_new(false, true /* clear */, 1); tables->vmgenid =3D g_array_new(false, true /* clear */, 1); + tables->hardware_errors =3D g_array_new(false, true /* clear */, 1); tables->linker =3D bios_linker_loader_init(); } =20 @@ -1588,6 +1589,7 @@ void acpi_build_tables_cleanup(AcpiBuildTables *table= s, bool mfre) g_array_free(tables->table_data, true); g_array_free(tables->tcpalog, mfre); g_array_free(tables->vmgenid, mfre); + g_array_free(tables->hardware_errors, mfre); } =20 /* diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c new file mode 100644 index 0000000..b7fdbbb --- /dev/null +++ b/hw/acpi/ghes.c @@ -0,0 +1,94 @@ +/* + * Support for generating APEI tables and recording CPER for Guests + * + * Copyright (c) 2019 HUAWEI TECHNOLOGIES CO., LTD. + * + * Author: Dongjiu Geng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, see . + */ + +#include "qemu/osdep.h" +#include "hw/acpi/acpi.h" +#include "hw/acpi/ghes.h" +#include "hw/acpi/aml-build.h" +#include "hw/nvram/fw_cfg.h" +#include "sysemu/sysemu.h" +#include "qemu/error-report.h" + +#include "hw/acpi/bios-linker-loader.h" + +#define ACPI_GHES_ERRORS_FW_CFG_FILE "etc/hardware_errors" +#define ACPI_GHES_DATA_ADDR_FW_CFG_FILE "etc/hardware_errors_addr" + +/* The max size in bytes for one error block */ +#define ACPI_GHES_MAX_RAW_DATA_LENGTH 0x400 + +/* Now only support ARMv8 SEA notification type error source */ +#define ACPI_GHES_ERROR_SOURCE_COUNT 1 + +/* + * Build table for the hardware error fw_cfg blob. + * Initialize "etc/hardware_errors" and "etc/hardware_errors_addr" fw_cfg = blobs. + * See docs/specs/acpi_hest_ghes.rst for blobs format. + */ +void build_ghes_error_table(GArray *hardware_errors, BIOSLinker *linker) +{ + int i, error_status_block_offset; + + /* Build error_block_address */ + for (i =3D 0; i < ACPI_GHES_ERROR_SOURCE_COUNT; i++) { + build_append_int_noprefix(hardware_errors, 0, sizeof(uint64_t)); + } + + /* Build read_ack_register */ + for (i =3D 0; i < ACPI_GHES_ERROR_SOURCE_COUNT; i++) { + /* + * Initialize the value of read_ack_register to 1, so GHES can be + * writeable after (re)boot. + * ACPI 6.2: 18.3.2.8 Generic Hardware Error Source version 2 + * (GHESv2 - Type 10) + */ + build_append_int_noprefix(hardware_errors, 1, sizeof(uint64_t)); + } + + /* Generic Error Status Block offset in the hardware error fw_cfg blob= */ + error_status_block_offset =3D hardware_errors->len; + + /* Reserve space for Error Status Data Block */ + acpi_data_push(hardware_errors, + ACPI_GHES_MAX_RAW_DATA_LENGTH * ACPI_GHES_ERROR_SOURCE_COUNT); + + /* Tell guest firmware to place hardware_errors blob into RAM */ + bios_linker_loader_alloc(linker, ACPI_GHES_ERRORS_FW_CFG_FILE, + hardware_errors, 1, false); + + for (i =3D 0; i < ACPI_GHES_ERROR_SOURCE_COUNT; i++) { + /* + * Tell firmware to patch error_block_address entries to point to + * corresponding "Generic Error Status Block" + */ + bios_linker_loader_add_pointer(linker, + ACPI_GHES_ERRORS_FW_CFG_FILE, sizeof(uint64_t) * i, + sizeof(uint64_t), ACPI_GHES_ERRORS_FW_CFG_FILE, + error_status_block_offset + i * ACPI_GHES_MAX_RAW_DATA_LENGTH); + } + + /* + * tell firmware to write hardware_errors GPA into + * hardware_errors_addr fw_cfg, once the former has been initialized. + */ + bios_linker_loader_write_pointer(linker, ACPI_GHES_DATA_ADDR_FW_CFG_FI= LE, + 0, sizeof(uint64_t), ACPI_GHES_ERRORS_FW_CFG_FILE, 0); +} diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index bd5f771..6819fcf 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -48,6 +48,7 @@ #include "sysemu/reset.h" #include "kvm_arm.h" #include "migration/vmstate.h" +#include "hw/acpi/ghes.h" =20 #define ARM_SPI_BASE 32 =20 @@ -830,6 +831,11 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildT= ables *tables) acpi_add_table(table_offsets, tables_blob); build_spcr(tables_blob, tables->linker, vms); =20 + if (vms->ras) { + acpi_add_table(table_offsets, tables_blob); + build_ghes_error_table(tables->hardware_errors, tables->linker); + } + if (ms->numa_state->num_nodes > 0) { acpi_add_table(table_offsets, tables_blob); build_srat(tables_blob, tables->linker, vms); diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index de4a406..8f13620 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -220,6 +220,7 @@ struct AcpiBuildTables { GArray *rsdp; GArray *tcpalog; GArray *vmgenid; + GArray *hardware_errors; BIOSLinker *linker; } AcpiBuildTables; =20 diff --git a/include/hw/acpi/ghes.h b/include/hw/acpi/ghes.h new file mode 100644 index 0000000..3dbda3f --- /dev/null +++ b/include/hw/acpi/ghes.h @@ -0,0 +1,26 @@ +/* + * Support for generating APEI tables and recording CPER for Guests + * + * Copyright (c) 2019 HUAWEI TECHNOLOGIES CO., LTD. + * + * Author: Dongjiu Geng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, see . + */ + +#ifndef ACPI_GHES_H +#define ACPI_GHES_H + +void build_ghes_error_table(GArray *hardware_errors, BIOSLinker *linker); +#endif --=20 1.8.3.1 From nobody Fri May 17 13:35:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1578483465; cv=none; d=zohomail.com; s=zohoarc; b=Q7Phjraaxx8k7shzlkqEgfH2nv6YW0/2gTBGVUlHNfYHgeiXhvl7lX9TRwT2X9MgrKW3MjlPmeJBHhWVnx8S78tIZAW1e8tMK56O3RY5jiUqG+Ew0VIZC2gF4I3/V+O+nzLr0gNRPiR4nalrAFQYInRjlFqfcXJYnLOvDu3HPYY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1578483465; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=chDhsELoH4YlkICILoytx5t7k5GgDjaPip0Xh3fqio0=; b=mjLOTwHL8kvd+OtkxGjbYpFAt0TvEeFy/luHAEbzi3gES6zo8PqQxQUErjRRtNtlR8BOrM3KSyUfRau3x169zgEmHwIAtUMltft5fDh0Oi3z4mecjd6w+oHrh5SQhe3vUWhk2Rh8u4GtkrN2wCHzqlUFUGCUarJJSejUcgINo1Q= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1578483465584764.2693481710149; Wed, 8 Jan 2020 03:37:45 -0800 (PST) Received: from localhost ([::1]:42422 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ip9eh-0002y9-5f for importer@patchew.org; Wed, 08 Jan 2020 06:37:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:55707) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ip9Zv-0005Kb-0x for qemu-devel@nongnu.org; Wed, 08 Jan 2020 06:32:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ip9Zt-0002hu-7H for qemu-devel@nongnu.org; Wed, 08 Jan 2020 06:32:46 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:2670 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ip9Zp-0002bk-1H; Wed, 08 Jan 2020 06:32:41 -0500 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id AF9E8A0369AD87D797C2; Wed, 8 Jan 2020 19:32:37 +0800 (CST) Received: from localhost.localdomain (10.151.151.249) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.439.0; Wed, 8 Jan 2020 19:32:28 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , Subject: [PATCH v22 4/9] ACPI: Build Hardware Error Source Table Date: Wed, 8 Jan 2020 19:32:18 +0800 Message-ID: <1578483143-14905-5-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> References: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.151.151.249] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.190 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: zhengxiang9@huawei.com, linuxarm@huawei.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch builds Hardware Error Source Table(HEST) via fw_cfg blobs. Now it only supports ARMv8 SEA, a type of Generic Hardware Error Source version 2(GHESv2) error source. Afterwards, we can extend the supported types if needed. For the CPER section, currently it is memory section because kernel mainly wants userspace to handle the memory errors. This patch follows the spec ACPI 6.2 to build the Hardware Error Source table. For more detailed information, please refer to document: docs/specs/acpi_hest_ghes.rst build_append_ghes_notify() will help to add Hardware Error Notification to ACPI tables without using packed C structures and avoid endianness issues as API doesn't need explicit conversion. Signed-off-by: Dongjiu Geng Signed-off-by: Xiang Zheng Reviewed-by: Michael S. Tsirkin Acked-by: Xiang Zheng --- hw/acpi/ghes.c | 118 +++++++++++++++++++++++++++++++++++++++++++= +++- hw/arm/virt-acpi-build.c | 2 + include/hw/acpi/ghes.h | 40 ++++++++++++++++ 3 files changed, 159 insertions(+), 1 deletion(-) diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c index b7fdbbb..9d37798 100644 --- a/hw/acpi/ghes.c +++ b/hw/acpi/ghes.c @@ -34,9 +34,42 @@ =20 /* The max size in bytes for one error block */ #define ACPI_GHES_MAX_RAW_DATA_LENGTH 0x400 - /* Now only support ARMv8 SEA notification type error source */ #define ACPI_GHES_ERROR_SOURCE_COUNT 1 +/* Generic Hardware Error Source version 2 */ +#define ACPI_GHES_SOURCE_GENERIC_ERROR_V2 10 +/* Address offset in Generic Address Structure(GAS) */ +#define GAS_ADDR_OFFSET 4 + +/* + * Hardware Error Notification + * ACPI 4.0: 17.3.2.7 Hardware Error Notification + * Composes dummy Hardware Error Notification descriptor of specified type + */ +static void build_ghes_hw_error_notification(GArray *table, const uint8_t = type) +{ + /* Type */ + build_append_int_noprefix(table, type, 1); + /* + * Length: + * Total length of the structure in bytes + */ + build_append_int_noprefix(table, 28, 1); + /* Configuration Write Enable */ + build_append_int_noprefix(table, 0, 2); + /* Poll Interval */ + build_append_int_noprefix(table, 0, 4); + /* Vector */ + build_append_int_noprefix(table, 0, 4); + /* Switch To Polling Threshold Value */ + build_append_int_noprefix(table, 0, 4); + /* Switch To Polling Threshold Window */ + build_append_int_noprefix(table, 0, 4); + /* Error Threshold Value */ + build_append_int_noprefix(table, 0, 4); + /* Error Threshold Window */ + build_append_int_noprefix(table, 0, 4); +} =20 /* * Build table for the hardware error fw_cfg blob. @@ -92,3 +125,86 @@ void build_ghes_error_table(GArray *hardware_errors, BI= OSLinker *linker) bios_linker_loader_write_pointer(linker, ACPI_GHES_DATA_ADDR_FW_CFG_FI= LE, 0, sizeof(uint64_t), ACPI_GHES_ERRORS_FW_CFG_FILE, 0); } + +/* Build Generic Hardware Error Source version 2 (GHESv2) */ +static void build_ghes_v2(GArray *table_data, int source_id, BIOSLinker *l= inker) +{ + uint64_t address_offset; + /* + * Type: + * Generic Hardware Error Source version 2(GHESv2 - Type 10) + */ + build_append_int_noprefix(table_data, ACPI_GHES_SOURCE_GENERIC_ERROR_V= 2, 2); + /* Source Id */ + build_append_int_noprefix(table_data, source_id, 2); + /* Related Source Id */ + build_append_int_noprefix(table_data, 0xffff, 2); + /* Flags */ + build_append_int_noprefix(table_data, 0, 1); + /* Enabled */ + build_append_int_noprefix(table_data, 1, 1); + + /* Number of Records To Pre-allocate */ + build_append_int_noprefix(table_data, 1, 4); + /* Max Sections Per Record */ + build_append_int_noprefix(table_data, 1, 4); + /* Max Raw Data Length */ + build_append_int_noprefix(table_data, ACPI_GHES_MAX_RAW_DATA_LENGTH, 4= ); + + address_offset =3D table_data->len; + /* Error Status Address */ + build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 0x40, 0, + 4 /* QWord access */, 0); + bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, + address_offset + GAS_ADDR_OFFSET, + sizeof(uint64_t), ACPI_GHES_ERRORS_FW_CFG_FILE, 0); + + /* + * Notification Structure + * Now only enable ARMv8 SEA notification type + */ + build_ghes_hw_error_notification(table_data, ACPI_GHES_NOTIFY_SEA); + + /* Error Status Block Length */ + build_append_int_noprefix(table_data, ACPI_GHES_MAX_RAW_DATA_LENGTH, 4= ); + + /* + * Read Ack Register + * ACPI 6.1: 18.3.2.8 Generic Hardware Error Source + * version 2 (GHESv2 - Type 10) + */ + address_offset =3D table_data->len; + build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 0x40, 0, + 4 /* QWord access */, 0); + bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, + address_offset + GAS_ADDR_OFFSET, + sizeof(uint64_t), ACPI_GHES_ERRORS_FW_CFG_FILE, + ACPI_GHES_ERROR_SOURCE_COUNT * sizeof(uint64_t)); + + /* + * Read Ack Preserve + * We only provide the first bit in Read Ack Register to OSPM to write + * while the other bits are preserved. + */ + build_append_int_noprefix(table_data, ~0x1ULL, 8); + /* Read Ack Write */ + build_append_int_noprefix(table_data, 0x1, 8); +} + +/* Build Hardware Error Source Table */ +void acpi_build_hest(GArray *table_data, GArray *hardware_errors, + BIOSLinker *linker) +{ + uint64_t hest_start =3D table_data->len; + + /* Hardware Error Source Table header*/ + acpi_data_push(table_data, sizeof(AcpiTableHeader)); + + /* Error Source Count */ + build_append_int_noprefix(table_data, ACPI_GHES_ERROR_SOURCE_COUNT, 4); + + build_ghes_v2(table_data, ACPI_HEST_SRC_ID_SEA, linker); + + build_header(linker, table_data, (void *)(table_data->data + hest_star= t), + "HEST", table_data->len - hest_start, 1, NULL, ""); +} diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 6819fcf..837bbf9 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -834,6 +834,8 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTa= bles *tables) if (vms->ras) { acpi_add_table(table_offsets, tables_blob); build_ghes_error_table(tables->hardware_errors, tables->linker); + acpi_build_hest(tables_blob, tables->hardware_errors, + tables->linker); } =20 if (ms->numa_state->num_nodes > 0) { diff --git a/include/hw/acpi/ghes.h b/include/hw/acpi/ghes.h index 3dbda3f..09a7f86 100644 --- a/include/hw/acpi/ghes.h +++ b/include/hw/acpi/ghes.h @@ -22,5 +22,45 @@ #ifndef ACPI_GHES_H #define ACPI_GHES_H =20 +/* + * Values for Hardware Error Notification Type field + */ +enum AcpiGhesNotifyType { + /* Polled */ + ACPI_GHES_NOTIFY_POLLED =3D 0, + /* External Interrupt */ + ACPI_GHES_NOTIFY_EXTERNAL =3D 1, + /* Local Interrupt */ + ACPI_GHES_NOTIFY_LOCAL =3D 2, + /* SCI */ + ACPI_GHES_NOTIFY_SCI =3D 3, + /* NMI */ + ACPI_GHES_NOTIFY_NMI =3D 4, + /* CMCI, ACPI 5.0: 18.3.2.7, Table 18-290 */ + ACPI_GHES_NOTIFY_CMCI =3D 5, + /* MCE, ACPI 5.0: 18.3.2.7, Table 18-290 */ + ACPI_GHES_NOTIFY_MCE =3D 6, + /* GPIO-Signal, ACPI 6.0: 18.3.2.7, Table 18-332 */ + ACPI_GHES_NOTIFY_GPIO =3D 7, + /* ARMv8 SEA, ACPI 6.1: 18.3.2.9, Table 18-345 */ + ACPI_GHES_NOTIFY_SEA =3D 8, + /* ARMv8 SEI, ACPI 6.1: 18.3.2.9, Table 18-345 */ + ACPI_GHES_NOTIFY_SEI =3D 9, + /* External Interrupt - GSIV, ACPI 6.1: 18.3.2.9, Table 18-345 */ + ACPI_GHES_NOTIFY_GSIV =3D 10, + /* Software Delegated Exception, ACPI 6.2: 18.3.2.9, Table 18-383 */ + ACPI_GHES_NOTIFY_SDEI =3D 11, + /* 12 and greater are reserved */ + ACPI_GHES_NOTIFY_RESERVED =3D 12 +}; + +enum { + ACPI_HEST_SRC_ID_SEA =3D 0, + /* future ids go here */ + ACPI_HEST_SRC_ID_RESERVED, +}; + void build_ghes_error_table(GArray *hardware_errors, BIOSLinker *linker); +void acpi_build_hest(GArray *table_data, GArray *hardware_error, + BIOSLinker *linker); #endif --=20 1.8.3.1 From nobody Fri May 17 13:35:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1578483442; cv=none; d=zohomail.com; s=zohoarc; b=gANyDF2WxAvsOkKsQWUAPiSw4XtIez1B5mZ25tM+33GQXXpnWJgOS+6Xd9jdZ7Tla6Z/hTRGPGXc/EYphph9SQBeV7vo49PyGbFeymHNX9qYdq9Sw0ICgpDU7SGfbLnFbL4DaugFNwtvfB1X0BP8SRz1//iejezq6Y04z6sQn1E= ARC-Message-Signature: i=1; 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Wed, 08 Jan 2020 06:37:21 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:55639) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ip9Zt-0005Hm-1y for qemu-devel@nongnu.org; Wed, 08 Jan 2020 06:32:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ip9Zr-0002gQ-KX for qemu-devel@nongnu.org; Wed, 08 Jan 2020 06:32:44 -0500 Received: from szxga07-in.huawei.com ([45.249.212.35]:58904 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ip9Zo-0002b4-EF; Wed, 08 Jan 2020 06:32:40 -0500 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id C611F54EA6A0E52F86F0; Wed, 8 Jan 2020 19:32:37 +0800 (CST) Received: from localhost.localdomain (10.151.151.249) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.439.0; Wed, 8 Jan 2020 19:32:29 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , Subject: [PATCH v22 5/9] ACPI: Record the Generic Error Status Block address Date: Wed, 8 Jan 2020 19:32:19 +0800 Message-ID: <1578483143-14905-6-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> References: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.151.151.249] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.35 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: zhengxiang9@huawei.com, linuxarm@huawei.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Record the GHEB address via fw_cfg file, when recording a error to CPER, it will use this address to find out Generic Error Data Entries and write the error. Make the HEST GHES to a GED device. Signed-off-by: Dongjiu Geng Signed-off-by: Xiang Zheng --- hw/acpi/generic_event_device.c | 15 ++++++++++++++- hw/acpi/ghes.c | 16 ++++++++++++++++ hw/arm/virt-acpi-build.c | 13 ++++++++++++- include/hw/acpi/generic_event_device.h | 2 ++ include/hw/acpi/ghes.h | 6 ++++++ 5 files changed, 50 insertions(+), 2 deletions(-) diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c index 9cee90c..9bf37e4 100644 --- a/hw/acpi/generic_event_device.c +++ b/hw/acpi/generic_event_device.c @@ -234,12 +234,25 @@ static const VMStateDescription vmstate_ged_state =3D= { } }; =20 +static const VMStateDescription vmstate_ghes_state =3D { + .name =3D "acpi-ghes-state", + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (VMStateField[]) { + VMSTATE_UINT64(ghes_addr_le, AcpiGhesState), + VMSTATE_END_OF_LIST() + } +}; + static const VMStateDescription vmstate_acpi_ged =3D { .name =3D "acpi-ged", .version_id =3D 1, .minimum_version_id =3D 1, .fields =3D (VMStateField[]) { - VMSTATE_STRUCT(ged_state, AcpiGedState, 1, vmstate_ged_state, GEDS= tate), + VMSTATE_STRUCT(ged_state, AcpiGedState, 1, + vmstate_ged_state, GEDState), + VMSTATE_STRUCT(ghes_state, AcpiGedState, 1, + vmstate_ghes_state, AcpiGhesState), VMSTATE_END_OF_LIST(), }, .subsections =3D (const VMStateDescription * []) { diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c index 9d37798..68f4abf 100644 --- a/hw/acpi/ghes.c +++ b/hw/acpi/ghes.c @@ -23,6 +23,7 @@ #include "hw/acpi/acpi.h" #include "hw/acpi/ghes.h" #include "hw/acpi/aml-build.h" +#include "hw/acpi/generic_event_device.h" #include "hw/nvram/fw_cfg.h" #include "sysemu/sysemu.h" #include "qemu/error-report.h" @@ -208,3 +209,18 @@ void acpi_build_hest(GArray *table_data, GArray *hardw= are_errors, build_header(linker, table_data, (void *)(table_data->data + hest_star= t), "HEST", table_data->len - hest_start, 1, NULL, ""); } + +void acpi_ghes_add_fw_cfg(AcpiGhesState *ags, FWCfgState *s, + GArray *hardware_error) +{ + size_t size =3D 2 * sizeof(uint64_t) + ACPI_GHES_MAX_RAW_DATA_LENGTH; + size_t request_block_size =3D ACPI_GHES_ERROR_SOURCE_COUNT * size; + + /* Create a read-only fw_cfg file for GHES */ + fw_cfg_add_file(s, ACPI_GHES_ERRORS_FW_CFG_FILE, hardware_error->data, + request_block_size); + + /* Create a read-write fw_cfg file for Address */ + fw_cfg_add_file_callback(s, ACPI_GHES_DATA_ADDR_FW_CFG_FILE, NULL, NUL= L, + NULL, &(ags->ghes_addr_le), sizeof(ags->ghes_addr_le), false); +} diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 837bbf9..c8aa94d 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -797,6 +797,7 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTa= bles *tables) unsigned dsdt, xsdt; GArray *tables_blob =3D tables->table_data; MachineState *ms =3D MACHINE(vms); + AcpiGedState *acpi_ged_state; =20 table_offsets =3D g_array_new(false, true /* clear */, sizeof(uint32_t)); @@ -831,7 +832,9 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTa= bles *tables) acpi_add_table(table_offsets, tables_blob); build_spcr(tables_blob, tables->linker, vms); =20 - if (vms->ras) { + acpi_ged_state =3D ACPI_GED(object_resolve_path_type("", TYPE_ACPI_GED, + NULL)); + if (acpi_ged_state && vms->ras) { acpi_add_table(table_offsets, tables_blob); build_ghes_error_table(tables->hardware_errors, tables->linker); acpi_build_hest(tables_blob, tables->hardware_errors, @@ -925,6 +928,7 @@ void virt_acpi_setup(VirtMachineState *vms) { AcpiBuildTables tables; AcpiBuildState *build_state; + AcpiGedState *acpi_ged_state; =20 if (!vms->fw_cfg) { trace_virt_acpi_setup(); @@ -955,6 +959,13 @@ void virt_acpi_setup(VirtMachineState *vms) fw_cfg_add_file(vms->fw_cfg, ACPI_BUILD_TPMLOG_FILE, tables.tcpalog->d= ata, acpi_data_len(tables.tcpalog)); =20 + acpi_ged_state =3D ACPI_GED(object_resolve_path_type("", TYPE_ACPI_GED, + NULL)); + if (acpi_ged_state && vms->ras) { + acpi_ghes_add_fw_cfg(&acpi_ged_state->ghes_state, + vms->fw_cfg, tables.hardware_errors); + } + build_state->rsdp_mr =3D acpi_add_rom_blob(virt_acpi_build_update, build_state, tables.rsdp, ACPI_BUILD_RSDP_FILE, 0); diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/gener= ic_event_device.h index d157eac..037d2b5 100644 --- a/include/hw/acpi/generic_event_device.h +++ b/include/hw/acpi/generic_event_device.h @@ -61,6 +61,7 @@ =20 #include "hw/sysbus.h" #include "hw/acpi/memory_hotplug.h" +#include "hw/acpi/ghes.h" =20 #define ACPI_POWER_BUTTON_DEVICE "PWRB" =20 @@ -95,6 +96,7 @@ typedef struct AcpiGedState { GEDState ged_state; uint32_t ged_event_bitmap; qemu_irq irq; + AcpiGhesState ghes_state; } AcpiGedState; =20 void build_ged_aml(Aml *table, const char* name, HotplugHandler *hotplug_d= ev, diff --git a/include/hw/acpi/ghes.h b/include/hw/acpi/ghes.h index 09a7f86..a6761e6 100644 --- a/include/hw/acpi/ghes.h +++ b/include/hw/acpi/ghes.h @@ -60,7 +60,13 @@ enum { ACPI_HEST_SRC_ID_RESERVED, }; =20 +typedef struct AcpiGhesState { + uint64_t ghes_addr_le; +} AcpiGhesState; + void build_ghes_error_table(GArray *hardware_errors, BIOSLinker *linker); void acpi_build_hest(GArray *table_data, GArray *hardware_error, BIOSLinker *linker); +void acpi_ghes_add_fw_cfg(AcpiGhesState *vms, FWCfgState *s, + GArray *hardware_errors); #endif --=20 1.8.3.1 From nobody Fri May 17 13:35:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1578483297; cv=none; d=zohomail.com; s=zohoarc; b=SUNdPnaZsBEaVz+HSSS3tnNcrj/aeJ7VYYdFJ/8nPZv35aXRbpNVc3iCGrv8rLgpTQAa4CY3d+MYpDBHQrau6D2A9e2PNF8mcarBpx9JELXgV7EMbM8dKG8ZfihHAo9VC5MlESAR2xrAcr8kA+be+0xO9IYOdMsOy4gy1SaiNEE= ARC-Message-Signature: i=1; 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Wed, 08 Jan 2020 06:34:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:55608) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ip9Zs-0005Gm-6J for qemu-devel@nongnu.org; Wed, 08 Jan 2020 06:32:45 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ip9Zq-0002fc-Qh for qemu-devel@nongnu.org; Wed, 08 Jan 2020 06:32:44 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:2668 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ip9Zn-0002ay-Ho; Wed, 08 Jan 2020 06:32:39 -0500 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 8C568BEF8D604AA2D803; Wed, 8 Jan 2020 19:32:37 +0800 (CST) Received: from localhost.localdomain (10.151.151.249) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.439.0; Wed, 8 Jan 2020 19:32:29 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , Subject: [PATCH v22 6/9] KVM: Move hwpoison page related functions into kvm-all.c Date: Wed, 8 Jan 2020 19:32:20 +0800 Message-ID: <1578483143-14905-7-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> References: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.151.151.249] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.190 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: zhengxiang9@huawei.com, linuxarm@huawei.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" kvm_hwpoison_page_add() and kvm_unpoison_all() will both be used by X86 and ARM platforms, so moving them into "accel/kvm/kvm-all.c" to avoid duplicate code. For architectures that don't use the poison-list functionality the reset handler will harmlessly do nothing, so let's register the kvm_unpoison_all() function in the generic kvm_init() function. Reviewed-by: Peter Maydell Signed-off-by: Dongjiu Geng Signed-off-by: Xiang Zheng Acked-by: Xiang Zheng --- accel/kvm/kvm-all.c | 36 ++++++++++++++++++++++++++++++++++++ include/sysemu/kvm_int.h | 12 ++++++++++++ target/i386/kvm.c | 36 ------------------------------------ 3 files changed, 48 insertions(+), 36 deletions(-) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index b2f1a5b..404e863 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -44,6 +44,7 @@ #include "qapi/visitor.h" #include "qapi/qapi-types-common.h" #include "qapi/qapi-visit-common.h" +#include "sysemu/reset.h" =20 #include "hw/boards.h" =20 @@ -873,6 +874,39 @@ int kvm_vm_check_extension(KVMState *s, unsigned int e= xtension) return ret; } =20 +typedef struct HWPoisonPage { + ram_addr_t ram_addr; + QLIST_ENTRY(HWPoisonPage) list; +} HWPoisonPage; + +static QLIST_HEAD(, HWPoisonPage) hwpoison_page_list =3D + QLIST_HEAD_INITIALIZER(hwpoison_page_list); + +static void kvm_unpoison_all(void *param) +{ + HWPoisonPage *page, *next_page; + + QLIST_FOREACH_SAFE(page, &hwpoison_page_list, list, next_page) { + QLIST_REMOVE(page, list); + qemu_ram_remap(page->ram_addr, TARGET_PAGE_SIZE); + g_free(page); + } +} + +void kvm_hwpoison_page_add(ram_addr_t ram_addr) +{ + HWPoisonPage *page; + + QLIST_FOREACH(page, &hwpoison_page_list, list) { + if (page->ram_addr =3D=3D ram_addr) { + return; + } + } + page =3D g_new(HWPoisonPage, 1); + page->ram_addr =3D ram_addr; + QLIST_INSERT_HEAD(&hwpoison_page_list, page, list); +} + static uint32_t adjust_ioeventfd_endianness(uint32_t val, uint32_t size) { #if defined(HOST_WORDS_BIGENDIAN) !=3D defined(TARGET_WORDS_BIGENDIAN) @@ -2070,6 +2104,8 @@ static int kvm_init(MachineState *ms) goto err; } =20 + qemu_register_reset(kvm_unpoison_all, NULL); + if (s->kernel_irqchip_allowed) { kvm_irqchip_create(s); } diff --git a/include/sysemu/kvm_int.h b/include/sysemu/kvm_int.h index ac2d1f8..c660a70 100644 --- a/include/sysemu/kvm_int.h +++ b/include/sysemu/kvm_int.h @@ -42,4 +42,16 @@ void kvm_memory_listener_register(KVMState *s, KVMMemory= Listener *kml, AddressSpace *as, int as_id); =20 void kvm_set_max_memslot_size(hwaddr max_slot_size); + +/** + * kvm_hwpoison_page_add: + * + * Parameters: + * @ram_addr: the address in the RAM for the poisoned page + * + * Add a poisoned page to the list + * + * Return: None. + */ +void kvm_hwpoison_page_add(ram_addr_t ram_addr); #endif diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 0b51190..66e7543 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -24,7 +24,6 @@ #include "sysemu/sysemu.h" #include "sysemu/hw_accel.h" #include "sysemu/kvm_int.h" -#include "sysemu/reset.h" #include "sysemu/runstate.h" #include "kvm_i386.h" #include "hyperv.h" @@ -522,40 +521,6 @@ uint64_t kvm_arch_get_supported_msr_feature(KVMState *= s, uint32_t index) } } =20 - -typedef struct HWPoisonPage { - ram_addr_t ram_addr; - QLIST_ENTRY(HWPoisonPage) list; -} HWPoisonPage; - -static QLIST_HEAD(, HWPoisonPage) hwpoison_page_list =3D - QLIST_HEAD_INITIALIZER(hwpoison_page_list); - -static void kvm_unpoison_all(void *param) -{ - HWPoisonPage *page, *next_page; - - QLIST_FOREACH_SAFE(page, &hwpoison_page_list, list, next_page) { - QLIST_REMOVE(page, list); - qemu_ram_remap(page->ram_addr, TARGET_PAGE_SIZE); - g_free(page); - } -} - -static void kvm_hwpoison_page_add(ram_addr_t ram_addr) -{ - HWPoisonPage *page; - - QLIST_FOREACH(page, &hwpoison_page_list, list) { - if (page->ram_addr =3D=3D ram_addr) { - return; - } - } - page =3D g_new(HWPoisonPage, 1); - page->ram_addr =3D ram_addr; - QLIST_INSERT_HEAD(&hwpoison_page_list, page, list); -} - static int kvm_get_mce_cap_supported(KVMState *s, uint64_t *mce_cap, int *max_banks) { @@ -2161,7 +2126,6 @@ int kvm_arch_init(MachineState *ms, KVMState *s) fprintf(stderr, "e820_add_entry() table is full\n"); return ret; } - qemu_register_reset(kvm_unpoison_all, NULL); =20 shadow_mem =3D object_property_get_int(OBJECT(s), "kvm-shadow-mem", &e= rror_abort); if (shadow_mem !=3D -1) { --=20 1.8.3.1 From nobody Fri May 17 13:35:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Wed, 08 Jan 2020 06:32:41 -0500 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id A4DFF4B5853672A5E57A; Wed, 8 Jan 2020 19:32:37 +0800 (CST) Received: from localhost.localdomain (10.151.151.249) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.439.0; Wed, 8 Jan 2020 19:32:30 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , Subject: [PATCH v22 7/9] ACPI: Record Generic Error Status Block(GESB) table Date: Wed, 8 Jan 2020 19:32:21 +0800 Message-ID: <1578483143-14905-8-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> References: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.151.151.249] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.190 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: zhengxiang9@huawei.com, linuxarm@huawei.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" kvm_arch_on_sigbus_vcpu() error injection uses source_id as index in etc/hardware_errors to find out Error Status Data Block entry corresponding to error source. So supported source_id values should be assigned here and not be changed afterwards to make sure that guest will write error into expected Error Status Data Block even if guest was migrated to a newer QEMU. Before QEMU writes a new error to ACPI table, it will check whether previous error has been acknowledged. Otherwise it will ignore the new error. For the errors section type, QEMU simulate it to memory section error. Signed-off-by: Dongjiu Geng Signed-off-by: Xiang Zheng Reviewed-by: Michael S. Tsirkin --- hw/acpi/ghes.c | 224 +++++++++++++++++++++++++++++++++++++++++++++= +++- include/hw/acpi/ghes.h | 3 + include/qemu/uuid.h | 5 ++ 3 files changed, 230 insertions(+), 2 deletions(-) diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c index 68f4abf..f2ecffe 100644 --- a/hw/acpi/ghes.c +++ b/hw/acpi/ghes.c @@ -28,21 +28,56 @@ #include "sysemu/sysemu.h" #include "qemu/error-report.h" =20 -#include "hw/acpi/bios-linker-loader.h" - #define ACPI_GHES_ERRORS_FW_CFG_FILE "etc/hardware_errors" #define ACPI_GHES_DATA_ADDR_FW_CFG_FILE "etc/hardware_errors_addr" =20 /* The max size in bytes for one error block */ #define ACPI_GHES_MAX_RAW_DATA_LENGTH 0x400 + /* Now only support ARMv8 SEA notification type error source */ #define ACPI_GHES_ERROR_SOURCE_COUNT 1 + /* Generic Hardware Error Source version 2 */ #define ACPI_GHES_SOURCE_GENERIC_ERROR_V2 10 + /* Address offset in Generic Address Structure(GAS) */ #define GAS_ADDR_OFFSET 4 =20 /* + * The total size of Generic Error Data Entry + * ACPI 6.1/6.2: 18.3.2.7.1 Generic Error Data, + * Table 18-343 Generic Error Data Entry + */ +#define ACPI_GHES_DATA_LENGTH 72 + +/* The memory section CPER size, UEFI 2.6: N.2.5 Memory Error Section */ +#define ACPI_GHES_MEM_CPER_LENGTH 80 + +/* Masks for block_status flags */ +#define ACPI_GEBS_UNCORRECTABLE 1 + +#define UEFI_CPER_SEC_PLATFORM_MEM \ + UUID_LE(0xA5BC1114, 0x6F64, 0x4EDE, 0xB8, 0x63, 0x3E, 0x83, \ + 0xED, 0x7C, 0x83, 0xB1) + +/* + * Total size for Generic Error Status Block except Generic Error Data Ent= ries + * ACPI 6.2: 18.3.2.7.1 Generic Error Data, + * Table 18-380 Generic Error Status Block + */ +#define ACPI_GHES_GESB_SIZE 20 + +/* + * Values for error_severity field + */ +enum AcpiGenericErrorSeverity { + ACPI_CPER_SEV_RECOVERABLE =3D 0, + ACPI_CPER_SEV_FATAL =3D 1, + ACPI_CPER_SEV_CORRECTED =3D 2, + ACPI_CPER_SEV_NONE =3D 3, +}; + +/* * Hardware Error Notification * ACPI 4.0: 17.3.2.7 Hardware Error Notification * Composes dummy Hardware Error Notification descriptor of specified type @@ -73,6 +108,127 @@ static void build_ghes_hw_error_notification(GArray *t= able, const uint8_t type) } =20 /* + * Generic Error Data Entry + * ACPI 6.1: 18.3.2.7.1 Generic Error Data + */ +static void acpi_ghes_generic_error_data(GArray *table, QemuUUID section_t= ype, + uint32_t error_severity, uint8_t validation_bits, uint8_t = flags, + uint32_t error_data_length, QemuUUID fru_id, + uint64_t time_stamp) +{ + /* Section Type */ + g_array_append_vals(table, section_type.data, + ARRAY_SIZE(section_type.data)); + + /* Error Severity */ + build_append_int_noprefix(table, error_severity, 4); + /* Revision */ + build_append_int_noprefix(table, 0x300, 2); + /* Validation Bits */ + build_append_int_noprefix(table, validation_bits, 1); + /* Flags */ + build_append_int_noprefix(table, flags, 1); + /* Error Data Length */ + build_append_int_noprefix(table, error_data_length, 4); + + /* FRU Id */ + g_array_append_vals(table, fru_id.data, ARRAY_SIZE(fru_id.data)); + + /* FRU Text */ + build_append_int_noprefix(table, 0, 20); + /* Timestamp */ + build_append_int_noprefix(table, time_stamp, 8); +} + +/* + * Generic Error Status Block + * ACPI 6.1: 18.3.2.7.1 Generic Error Data + */ +static void acpi_ghes_generic_error_status(GArray *table, uint32_t block_s= tatus, + uint32_t raw_data_offset, uint32_t raw_data_length, + uint32_t data_length, uint32_t error_severity) +{ + /* Block Status */ + build_append_int_noprefix(table, block_status, 4); + /* Raw Data Offset */ + build_append_int_noprefix(table, raw_data_offset, 4); + /* Raw Data Length */ + build_append_int_noprefix(table, raw_data_length, 4); + /* Data Length */ + build_append_int_noprefix(table, data_length, 4); + /* Error Severity */ + build_append_int_noprefix(table, error_severity, 4); +} + +/* UEFI 2.6: N.2.5 Memory Error Section */ +static void acpi_ghes_build_append_mem_cper(GArray *table, + uint64_t error_physical_addr) +{ + /* + * Memory Error Record + */ + + /* Validation Bits */ + build_append_int_noprefix(table, + (1ULL << 14) | /* Type Valid */ + (1ULL << 1) /* Physical Address Valid */, + 8); + /* Error Status */ + build_append_int_noprefix(table, 0, 8); + /* Physical Address */ + build_append_int_noprefix(table, error_physical_addr, 8); + /* Skip all the detailed information normally found in such a record */ + build_append_int_noprefix(table, 0, 48); + /* Memory Error Type */ + build_append_int_noprefix(table, 0 /* Unknown error */, 1); + /* Skip all the detailed information normally found in such a record */ + build_append_int_noprefix(table, 0, 7); +} + +static int acpi_ghes_record_mem_error(uint64_t error_block_address, + uint64_t error_physical_addr) +{ + GArray *block; + /* Memory Error Section Type */ + QemuUUID mem_section_id_le =3D UEFI_CPER_SEC_PLATFORM_MEM; + QemuUUID fru_id =3D {}; + uint32_t data_length; + + block =3D g_array_new(false, true /* clear */, 1); + + /* This is the length if adding a new generic error data entry*/ + data_length =3D ACPI_GHES_DATA_LENGTH + ACPI_GHES_MEM_CPER_LENGTH; + + /* + * Check whether it will run out of the preallocated memory if adding = a new + * generic error data entry + */ + if ((data_length + ACPI_GHES_GESB_SIZE) > ACPI_GHES_MAX_RAW_DATA_LENGT= H) { + error_report("Not enough memory to record new CPER!!!"); + return -1; + } + + /* Build the new generic error status block header */ + acpi_ghes_generic_error_status(block, ACPI_GEBS_UNCORRECTABLE, + 0, 0, data_length, ACPI_CPER_SEV_RECOVERABLE); + + /* Build this new generic error data entry header */ + acpi_ghes_generic_error_data(block, mem_section_id_le, + ACPI_CPER_SEV_RECOVERABLE, 0, 0, + ACPI_GHES_MEM_CPER_LENGTH, fru_id, 0); + + /* Build the memory section CPER for above new generic error data entr= y */ + acpi_ghes_build_append_mem_cper(block, error_physical_addr); + + /* Write back above this new generic error data entry to guest memory = */ + cpu_physical_memory_write(error_block_address, block->data, block->len= ); + + g_array_free(block, true); + + return 0; +} + +/* * Build table for the hardware error fw_cfg blob. * Initialize "etc/hardware_errors" and "etc/hardware_errors_addr" fw_cfg = blobs. * See docs/specs/acpi_hest_ghes.rst for blobs format. @@ -224,3 +380,67 @@ void acpi_ghes_add_fw_cfg(AcpiGhesState *ags, FWCfgSta= te *s, fw_cfg_add_file_callback(s, ACPI_GHES_DATA_ADDR_FW_CFG_FILE, NULL, NUL= L, NULL, &(ags->ghes_addr_le), sizeof(ags->ghes_addr_le), false); } + +int acpi_ghes_record_errors(uint8_t source_id, uint64_t physical_address) +{ + uint64_t error_block_addr, read_ack_register_addr, read_ack_register = =3D 0; + int loop =3D 0; + uint64_t start_addr; + bool ret =3D -1; + AcpiGedState *acpi_ged_state; + AcpiGhesState *ags; + + assert(source_id < ACPI_HEST_SRC_ID_RESERVED); + + acpi_ged_state =3D ACPI_GED(object_resolve_path_type("", TYPE_ACPI_GED, + NULL)); + if (acpi_ged_state) { + ags =3D &acpi_ged_state->ghes_state; + } else { + error_report("ACPI GED device not found"); + return -1; + } + + start_addr =3D le64_to_cpu(ags->ghes_addr_le); + + if (physical_address) { + + if (source_id < ACPI_HEST_SRC_ID_RESERVED) { + start_addr +=3D source_id * sizeof(uint64_t); + } + + cpu_physical_memory_read(start_addr, &error_block_addr, + sizeof(error_block_addr)); + + read_ack_register_addr =3D start_addr + + ACPI_GHES_ERROR_SOURCE_COUNT * sizeof(uint64_t); +retry: + cpu_physical_memory_read(read_ack_register_addr, + &read_ack_register, sizeof(read_ack_regis= ter)); + + /* zero means OSPM does not acknowledge the error */ + if (!read_ack_register) { + if (loop < 3) { + usleep(100 * 1000); + loop++; + goto retry; + } else { + error_report("OSPM does not acknowledge previous error," + " so can not record CPER for current error anymore"); + } + } else if (error_block_addr) { + read_ack_register =3D cpu_to_le64(0); + /* + * Clear the Read Ack Register, OSPM will write it to 1 wh= en + * acknowledge this error. + */ + cpu_physical_memory_write(read_ack_register_addr, + &read_ack_register, sizeof(uint64_t)); + + ret =3D acpi_ghes_record_mem_error(error_block_addr, + physical_address); + } + } + + return ret; +} diff --git a/include/hw/acpi/ghes.h b/include/hw/acpi/ghes.h index a6761e6..ab0ae33 100644 --- a/include/hw/acpi/ghes.h +++ b/include/hw/acpi/ghes.h @@ -22,6 +22,8 @@ #ifndef ACPI_GHES_H #define ACPI_GHES_H =20 +#include "hw/acpi/bios-linker-loader.h" + /* * Values for Hardware Error Notification Type field */ @@ -69,4 +71,5 @@ void acpi_build_hest(GArray *table_data, GArray *hardware= _error, BIOSLinker *linker); void acpi_ghes_add_fw_cfg(AcpiGhesState *vms, FWCfgState *s, GArray *hardware_errors); +int acpi_ghes_record_errors(uint8_t notify, uint64_t error_physical_addr); #endif diff --git a/include/qemu/uuid.h b/include/qemu/uuid.h index 129c45f..b35e294 100644 --- a/include/qemu/uuid.h +++ b/include/qemu/uuid.h @@ -34,6 +34,11 @@ typedef struct { }; } QemuUUID; =20 +#define UUID_LE(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \ + {{{ (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xf= f, \ + (b) & 0xff, ((b) >> 8) & 0xff, (c) & 0xff, ((c) >> 8) & 0xff, = \ + (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) } } } + #define UUID_FMT "%02hhx%02hhx%02hhx%02hhx-" \ "%02hhx%02hhx-%02hhx%02hhx-" \ "%02hhx%02hhx-" \ --=20 1.8.3.1 From nobody Fri May 17 13:35:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; 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Wed, 8 Jan 2020 19:32:31 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , Subject: [PATCH v22 8/9] target-arm: kvm64: handle SIGBUS signal from kernel or KVM Date: Wed, 8 Jan 2020 19:32:22 +0800 Message-ID: <1578483143-14905-9-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> References: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.151.151.249] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.35 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: zhengxiang9@huawei.com, linuxarm@huawei.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a SIGBUS signal handler. In this handler, it checks the SIGBUS type, translates the host VA delivered by host to guest PA, then fills this PA to guest APEI GHES memory, then notifies guest according to the SIGBUS type. When guest accesses the poisoned memory, it will generate a Synchronous External Abort(SEA). Then host kernel gets an APEI notification and calls memory_failure() to unmapped the affected page in stage 2, finally returns to guest. Guest continues to access the PG_hwpoison page, it will trap to KVM as stage2 fault, then a SIGBUS_MCEERR_AR synchronous signal is delivered to Qemu, Qemu records this error address into guest APEI GHES memory and notifes guest using Synchronous-External-Abort(SEA). In order to inject a vSEA, we introduce the kvm_inject_arm_sea() function in which we can setup the type of exception and the syndrome information. When switching to guest, the target vcpu will jump to the synchronous external abort vector table entry. The ESR_ELx.DFSC is set to synchronous external abort(0x10), and the ESR_ELx.FnV is set to not valid(0x1), which will tell guest that FAR is not valid and hold an UNKNOWN value. These values will be set to KVM register structures through KVM_SET_ONE_REG IOCTL. Signed-off-by: Dongjiu Geng Signed-off-by: Xiang Zheng Reviewed-by: Michael S. Tsirkin Acked-by: Xiang Zheng --- include/sysemu/kvm.h | 3 +-- target/arm/cpu.h | 4 +++ target/arm/helper.c | 2 +- target/arm/internals.h | 5 ++-- target/arm/kvm64.c | 66 +++++++++++++++++++++++++++++++++++++++++++++= ++++ target/arm/tlb_helper.c | 2 +- target/i386/cpu.h | 2 ++ 7 files changed, 78 insertions(+), 6 deletions(-) diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index 141342d..3b22504 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -379,8 +379,7 @@ bool kvm_vcpu_id_is_valid(int vcpu_id); /* Returns VCPU ID to be used on KVM_CREATE_VCPU ioctl() */ unsigned long kvm_arch_vcpu_id(CPUState *cpu); =20 -#ifdef TARGET_I386 -#define KVM_HAVE_MCE_INJECTION 1 +#ifdef KVM_HAVE_MCE_INJECTION void kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr); #endif =20 diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 5f70e9e..723bdb9 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -28,6 +28,10 @@ /* ARM processors have a weak memory model */ #define TCG_GUEST_DEFAULT_MO (0) =20 +#ifdef TARGET_AARCH64 +#define KVM_HAVE_MCE_INJECTION 1 +#endif + #define EXCP_UDEF 1 /* undefined instruction */ #define EXCP_SWI 2 /* software interrupt */ #define EXCP_PREFETCH_ABORT 3 diff --git a/target/arm/helper.c b/target/arm/helper.c index 5074b5f..05bffd3 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -3045,7 +3045,7 @@ static uint64_t do_ats_write(CPUARMState *env, uint64= _t value, * Report exception with ESR indicating a fault due to a * translation table walk for a cache maintenance instruction. */ - syn =3D syn_data_abort_no_iss(current_el =3D=3D target_el, + syn =3D syn_data_abort_no_iss(current_el =3D=3D target_el, 0, fi.ea, 1, fi.s1ptw, 1, fsc); env->exception.vaddress =3D value; env->exception.fsr =3D fsr; diff --git a/target/arm/internals.h b/target/arm/internals.h index f5313dd..28b8451 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -451,13 +451,14 @@ static inline uint32_t syn_insn_abort(int same_el, in= t ea, int s1ptw, int fsc) | ARM_EL_IL | (ea << 9) | (s1ptw << 7) | fsc; } =20 -static inline uint32_t syn_data_abort_no_iss(int same_el, +static inline uint32_t syn_data_abort_no_iss(int same_el, int fnv, int ea, int cm, int s1ptw, int wnr, int fsc) { return (EC_DATAABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) | ARM_EL_IL - | (ea << 9) | (cm << 8) | (s1ptw << 7) | (wnr << 6) | fsc; + | (fnv << 10) | (ea << 9) | (cm << 8) | (s1ptw << 7) + | (wnr << 6) | fsc; } =20 static inline uint32_t syn_data_abort_with_iss(int same_el, diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 876184b..f3b05c1 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -28,6 +28,8 @@ #include "kvm_arm.h" #include "hw/boards.h" #include "internals.h" +#include "hw/acpi/acpi.h" +#include "hw/acpi/ghes.h" =20 static bool have_guest_debug; =20 @@ -843,6 +845,30 @@ int kvm_arm_cpreg_level(uint64_t regidx) return KVM_PUT_RUNTIME_STATE; } =20 +/* Callers must hold the iothread mutex lock */ +static void kvm_inject_arm_sea(CPUState *c) +{ + ARMCPU *cpu =3D ARM_CPU(c); + CPUARMState *env =3D &cpu->env; + CPUClass *cc =3D CPU_GET_CLASS(c); + uint32_t esr; + bool same_el; + + c->exception_index =3D EXCP_DATA_ABORT; + env->exception.target_el =3D 1; + + /* + * Set the DFSC to synchronous external abort and set FnV to not valid, + * this will tell guest the FAR_ELx is UNKNOWN for this abort. + */ + same_el =3D arm_current_el(env) =3D=3D env->exception.target_el; + esr =3D syn_data_abort_no_iss(same_el, 1, 0, 0, 0, 0, 0x10); + + env->exception.syndrome =3D esr; + + cc->do_interrupt(c); +} + #define AARCH64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \ KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x)) =20 @@ -1295,6 +1321,46 @@ int kvm_arch_get_registers(CPUState *cs) return ret; } =20 +void kvm_arch_on_sigbus_vcpu(CPUState *c, int code, void *addr) +{ + ram_addr_t ram_addr; + hwaddr paddr; + + assert(code =3D=3D BUS_MCEERR_AR || code =3D=3D BUS_MCEERR_AO); + + if (acpi_enabled && addr && + object_property_get_bool(qdev_get_machine(), "ras", NULL)) { + ram_addr =3D qemu_ram_addr_from_host(addr); + if (ram_addr !=3D RAM_ADDR_INVALID && + kvm_physical_memory_addr_from_host(c->kvm_state, addr, &paddr)= ) { + kvm_hwpoison_page_add(ram_addr); + /* + * Asynchronous signal will be masked by main thread, so + * only handle synchronous signal. + */ + if (code =3D=3D BUS_MCEERR_AR) { + kvm_cpu_synchronize_state(c); + if (!acpi_ghes_record_errors(ACPI_HEST_SRC_ID_SEA, paddr))= { + kvm_inject_arm_sea(c); + } else { + error_report("failed to record the error"); + abort(); + } + } + return; + } + if (code =3D=3D BUS_MCEERR_AO) { + error_report("Hardware memory error at addr %p for memory used= by " + "QEMU itself instead of guest system!", addr); + } + } + + if (code =3D=3D BUS_MCEERR_AR) { + error_report("Hardware memory error!"); + exit(1); + } +} + /* C6.6.29 BRK instruction */ static const uint32_t brk_insn =3D 0xd4200000; =20 diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c index 5feb312..499672e 100644 --- a/target/arm/tlb_helper.c +++ b/target/arm/tlb_helper.c @@ -33,7 +33,7 @@ static inline uint32_t merge_syn_data_abort(uint32_t temp= late_syn, * ISV field. */ if (!(template_syn & ARM_EL_ISV) || target_el !=3D 2 || s1ptw) { - syn =3D syn_data_abort_no_iss(same_el, + syn =3D syn_data_abort_no_iss(same_el, 0, ea, 0, s1ptw, is_write, fsc); } else { /* diff --git a/target/i386/cpu.h b/target/i386/cpu.h index af28293..1a0dbc1 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -29,6 +29,8 @@ /* The x86 has a strong memory model with some store-after-load re-orderin= g */ #define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) =20 +#define KVM_HAVE_MCE_INJECTION 1 + /* Maximum instruction code size */ #define TARGET_MAX_INSN_SIZE 16 =20 --=20 1.8.3.1 From nobody Fri May 17 13:35:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Wed, 08 Jan 2020 06:32:44 -0500 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id AAFB23071A6A1679EE8B; Wed, 8 Jan 2020 19:32:42 +0800 (CST) Received: from localhost.localdomain (10.151.151.249) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.439.0; Wed, 8 Jan 2020 19:32:32 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , Subject: [PATCH v22 9/9] MAINTAINERS: Add ACPI/HEST/GHES entries Date: Wed, 8 Jan 2020 19:32:23 +0800 Message-ID: <1578483143-14905-10-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> References: <1578483143-14905-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.151.151.249] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.190 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: zhengxiang9@huawei.com, linuxarm@huawei.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" I and Xiang are willing to review the APEI-related patches and volunteer as the reviewers for the HEST/GHES part. Signed-off-by: Dongjiu Geng Signed-off-by: Xiang Zheng Acked-by: Michael S. Tsirkin Reviewed-by: Philippe Mathieu-Daud=C3=A9 acked-by: that you think this division of files makes sense? --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 387879a..5af70a5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1423,6 +1423,15 @@ F: tests/bios-tables-test.c F: tests/acpi-utils.[hc] F: tests/data/acpi/ =20 +ACPI/HEST/GHES +R: Dongjiu Geng +R: Xiang Zheng +L: qemu-arm@nongnu.org +S: Maintained +F: hw/acpi/ghes.c +F: include/hw/acpi/ghes.h +F: docs/specs/acpi_hest_ghes.rst + ppc4xx M: David Gibson L: qemu-ppc@nongnu.org --=20 1.8.3.1