From nobody Mon May 13 03:43:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass header.i=@amazon.de; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=amazon.de ARC-Seal: i=1; a=rsa-sha256; t=1576509577; cv=none; d=zohomail.com; s=zohoarc; b=E84SSSdzH9dQch7ijUQjTfl+I5oAOKxAXhFLjPi1ObL5QlY7YA45iCKTWXVFGYyCaMlFVa8UiHoSjlhGzZx4u9PNq7XUCjXg6+1whMEoa4N7EtFFHZxNAKv4uxC3cuRw0amDJVjtnghrFeyJEP4EothWu4QJk/uXqyp5PuH5FhQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1576509577; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=syWV6RethZ9zkiIkM27Et4g5OSvaauBfpbT1hVu+9aY=; b=hmSlDxYCANGJglMsg/0A16nVcFvLzDAgcLqrf+3Utf1nzo6+jYQdUKxYPh1+b5mdCAnAIKa7vdkvmJFeonIfw1jzsvBEueumOlCiCBYdLAx+zolITFUjrbPsVCYWh5qq3fHN9S3Dx59Te4m6LLBPIXwyBt7797OP4Zp99WCJgQQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@amazon.de; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=quarantine dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1576509577841176.46013608315934; Mon, 16 Dec 2019 07:19:37 -0800 (PST) Received: from localhost ([::1]:55440 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1igs9n-0005oI-PS for importer@patchew.org; Mon, 16 Dec 2019 10:19:35 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:54288) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1igs7P-0003Yf-33 for qemu-devel@nongnu.org; Mon, 16 Dec 2019 10:17:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1igs7O-0001bj-1z for qemu-devel@nongnu.org; Mon, 16 Dec 2019 10:17:06 -0500 Received: from smtp-fw-9102.amazon.com ([207.171.184.29]:58507) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1igs7L-0001X4-NW; Mon, 16 Dec 2019 10:17:03 -0500 Received: from sea32-co-svc-lb4-vlan3.sea.corp.amazon.com (HELO email-inbound-relay-1e-27fb8269.us-east-1.amazon.com) ([10.47.23.38]) by smtp-border-fw-out-9102.sea19.amazon.com with ESMTP; 16 Dec 2019 15:16:51 +0000 Received: from sveith-desktop.aka.corp.amazon.com (iad7-ws-svc-lb50-vlan3.amazon.com [10.0.93.214]) by email-inbound-relay-1e-27fb8269.us-east-1.amazon.com (Postfix) with ESMTPS id BBA31A1F8B; Mon, 16 Dec 2019 15:16:48 +0000 (UTC) Received: from sveith-desktop.aka.corp.amazon.com (localhost [127.0.0.1]) by sveith-desktop.aka.corp.amazon.com (8.15.2/8.15.2/Debian-3) with ESMTP id xBGFGkar013914; Mon, 16 Dec 2019 16:16:46 +0100 Received: (from sveith@localhost) by sveith-desktop.aka.corp.amazon.com (8.15.2/8.15.2/Submit) id xBGFGjQT013913; Mon, 16 Dec 2019 16:16:45 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.de; i=@amazon.de; q=dns/txt; s=amazon201209; t=1576509424; x=1608045424; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=syWV6RethZ9zkiIkM27Et4g5OSvaauBfpbT1hVu+9aY=; b=p2UuQMvElHSlnLKSkedp7iu6zc1Te87fsWnxqjSJq9H+x2KqHJSNVQLp 1JeFevw+OrcFM9h1uslLZjPRWEgTqws5XlnEXt0i7TRTCzRVLOhH2qwry bw0BbR9R0PpbFmn3nDQCEsfh7IaC9sOT38z7RAe2/EvfZdlHIOBKnEq2q E=; IronPort-SDR: d2aUp2IqMXXURcCZGkgJ6eC2IDAbm4psYZDe8xXWk8OubI7jUG94fqjYgRQRkm4r5ScrAmXpHI U33CvYSon9hw== X-IronPort-AV: E=Sophos;i="5.69,322,1571702400"; d="scan'208";a="13787925" From: Simon Veith To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Cc: Simon Veith , Eric Auger Subject: [PATCH v3 1/6] hw/arm/smmuv3: Apply address mask to linear strtab base address Date: Mon, 16 Dec 2019 16:15:07 +0100 Message-Id: <1576509312-13083-2-git-send-email-sveith@amazon.de> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1576509312-13083-1-git-send-email-sveith@amazon.de> References: <1576509312-13083-1-git-send-email-sveith@amazon.de> Precedence: Bulk X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 207.171.184.29 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @amazon.de) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" In the SMMU_STRTAB_BASE register, the stream table base address only occupies bits [51:6]. Other bits, such as RA (bit [62]), must be masked out to obtain the base address. The branch for 2-level stream tables correctly applies this mask by way of SMMU_BASE_ADDR_MASK, but the one for linear stream tables does not. Apply the missing mask in that case as well so that the correct stream base address is used by guests which configure a linear stream table. Linux guests are unaffected by this change because they choose a 2-level stream table layout for the QEMU SMMUv3, based on the size of its stream ID space. ref. ARM IHI 0070C, section 6.3.23. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Acked-by: Eric Auger Tested-by: Eric Auger --- hw/arm/smmuv3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index e2fbb83..eef9a18 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -429,7 +429,7 @@ static int smmu_find_ste(SMMUv3State *s, uint32_t sid, = STE *ste, } addr =3D l2ptr + l2_ste_offset * sizeof(*ste); } else { - addr =3D s->strtab_base + sid * sizeof(*ste); + addr =3D (s->strtab_base & SMMU_BASE_ADDR_MASK) + sid * sizeof(*st= e); } =20 if (smmu_get_ste(s, addr, ste, event)) { --=20 2.7.4 From nobody Mon May 13 03:43:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass header.i=@amazon.de; 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Mon, 16 Dec 2019 10:16:56 -0500 Received: from iad6-co-svc-p1-lb1-vlan3.amazon.com (HELO email-inbound-relay-2a-538b0bfb.us-west-2.amazon.com) ([10.124.125.6]) by smtp-border-fw-out-6002.iad6.amazon.com with ESMTP; 16 Dec 2019 15:16:53 +0000 Received: from sveith-desktop.aka.corp.amazon.com (pdx2-ws-svc-lb17-vlan2.amazon.com [10.247.140.66]) by email-inbound-relay-2a-538b0bfb.us-west-2.amazon.com (Postfix) with ESMTPS id 6CCD1A262A; Mon, 16 Dec 2019 15:16:52 +0000 (UTC) Received: from sveith-desktop.aka.corp.amazon.com (localhost [127.0.0.1]) by sveith-desktop.aka.corp.amazon.com (8.15.2/8.15.2/Debian-3) with ESMTP id xBGFGolE013973; Mon, 16 Dec 2019 16:16:50 +0100 Received: (from sveith@localhost) by sveith-desktop.aka.corp.amazon.com (8.15.2/8.15.2/Submit) id xBGFGn2g013944; Mon, 16 Dec 2019 16:16:49 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.de; i=@amazon.de; q=dns/txt; s=amazon201209; t=1576509416; x=1608045416; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=mVMZNzfGgCZy2rnEt7SIpbodq72YKWuf3Om7HpAHf2g=; b=seMttDmuf556S4JhsB25HzawlXSy71DW80BU9CQ2+zTK33m7cVNsWiYw AaqEZM++YcNyGD41w4uzPBi28z23J0SEEjvnEYuMkFukGe+b6TsbMEGff RsMes+IRC/GlMQ6MXQ1zGCYml8VRvyQSB8LDrHxUs2K3omHAwB2lA9gYB Q=; IronPort-SDR: Td7t4XrxG8vLi7kFqoN91DaZsotrP8zKsf3WW3ib3YIHRhFtHtt3iAcSY4kZbkeH6//wYfi7r9 aLRjdmhmR+Bg== X-IronPort-AV: E=Sophos;i="5.69,322,1571702400"; d="scan'208";a="7831631" From: Simon Veith To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Cc: Simon Veith , Eric Auger Subject: [PATCH v3 2/6] hw/arm/smmuv3: Correct SMMU_BASE_ADDR_MASK value Date: Mon, 16 Dec 2019 16:15:08 +0100 Message-Id: <1576509312-13083-3-git-send-email-sveith@amazon.de> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1576509312-13083-1-git-send-email-sveith@amazon.de> References: <1576509312-13083-1-git-send-email-sveith@amazon.de> Precedence: Bulk X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 52.95.49.90 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @amazon.de) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" There are two issues with the current value of SMMU_BASE_ADDR_MASK: - At the lower end, we are clearing bits [4:0]. Per the SMMUv3 spec, we should also be treating bit 5 as zero in the base address. - At the upper end, we are clearing bits [63:48]. Per the SMMUv3 spec, only bits [63:52] must be explicitly treated as zero. Update the SMMU_BASE_ADDR_MASK value to mask out bits [63:52] and [5:0]. ref. ARM IHI 0070C, section 6.3.23. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Acked-by: Eric Auger Tested-by: Eric Auger --- hw/arm/smmuv3-internal.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h index d190181..042b435 100644 --- a/hw/arm/smmuv3-internal.h +++ b/hw/arm/smmuv3-internal.h @@ -99,7 +99,7 @@ REG32(GERROR_IRQ_CFG2, 0x74) =20 #define A_STRTAB_BASE 0x80 /* 64b */ =20 -#define SMMU_BASE_ADDR_MASK 0xffffffffffe0 +#define SMMU_BASE_ADDR_MASK 0xfffffffffffc0 =20 REG32(STRTAB_BASE_CFG, 0x88) FIELD(STRTAB_BASE_CFG, FMT, 16, 2) --=20 2.7.4 From nobody Mon May 13 03:43:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=pass header.i=@amazon.de; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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16 Dec 2019 15:17:04 +0000 Received: from sveith-desktop.aka.corp.amazon.com (iad7-ws-svc-lb50-vlan3.amazon.com [10.0.93.214]) by email-inbound-relay-1e-303d0b0e.us-east-1.amazon.com (Postfix) with ESMTPS id F4185A1FE4; Mon, 16 Dec 2019 15:17:01 +0000 (UTC) Received: from sveith-desktop.aka.corp.amazon.com (localhost [127.0.0.1]) by sveith-desktop.aka.corp.amazon.com (8.15.2/8.15.2/Debian-3) with ESMTP id xBGFGxjA014019; Mon, 16 Dec 2019 16:16:59 +0100 Received: (from sveith@localhost) by sveith-desktop.aka.corp.amazon.com (8.15.2/8.15.2/Submit) id xBGFGwne014013; Mon, 16 Dec 2019 16:16:58 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.de; i=@amazon.de; q=dns/txt; s=amazon201209; t=1576509424; x=1608045424; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=PCOnbhJypslF5hM47QeKN1c0yopkDWzpKcTM5nMU8Xo=; b=JQJA9+u5KO1EVQ97mBzLioreIw1ZHq4WCHY6dgS/hJIhEE12kEikGV1+ KN3cl16LGn9VI+HCEZL/JZU+76smRcOB8sMQeMOvyc4ontaCWBCqkquXt csrydVDtgnsiB3qNKlT64xj6qfDl4s89WprFn+AkH4bpZZsQ4Nch0lZtM Y=; IronPort-SDR: 6xqwswH05mbkLO3HeKVn+kdonjZ3btRLADrYMNbSZTLnQl9BRVmgM4U6N92XGWUObfdsPZHebY fsmvPnGVKmZA== X-IronPort-AV: E=Sophos;i="5.69,322,1571702400"; d="scan'208";a="13787967" From: Simon Veith To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Cc: Simon Veith , Eric Auger Subject: [PATCH v3 3/6] hw/arm/smmuv3: Check stream IDs against actual table LOG2SIZE Date: Mon, 16 Dec 2019 16:15:09 +0100 Message-Id: <1576509312-13083-4-git-send-email-sveith@amazon.de> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1576509312-13083-1-git-send-email-sveith@amazon.de> References: <1576509312-13083-1-git-send-email-sveith@amazon.de> Precedence: Bulk X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 207.171.184.29 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @amazon.de) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" When checking whether a stream ID is in range of the stream table, we have so far been only checking it against our implementation limit (SMMU_IDR1_SIDSIZE). However, the guest can program the STRTAB_BASE_CFG.LOG2SIZE field to a size that is smaller than this limit. Check the stream ID against this limit as well to match the hardware behavior of raising C_BAD_STREAMID events in case the limit is exceeded. Also, ensure that we do not go one entry beyond the end of the table by checking that its index is strictly smaller than the table size. ref. ARM IHI 0070C, section 6.3.24. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Acked-by: Eric Auger Tested-by: Eric Auger --- Changed in v2: * Also check that stream ID is strictly lower than the table size hw/arm/smmuv3.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index eef9a18..727558b 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -377,11 +377,15 @@ static int smmu_find_ste(SMMUv3State *s, uint32_t sid= , STE *ste, SMMUEventInfo *event) { dma_addr_t addr; + uint32_t log2size; int ret; =20 trace_smmuv3_find_ste(sid, s->features, s->sid_split); - /* Check SID range */ - if (sid > (1 << SMMU_IDR1_SIDSIZE)) { + log2size =3D FIELD_EX32(s->strtab_base_cfg, STRTAB_BASE_CFG, LOG2SIZE); + /* + * Check SID range against both guest-configured and implementation li= mits + */ + if (sid >=3D (1 << MIN(log2size, SMMU_IDR1_SIDSIZE))) { event->type =3D SMMU_EVT_C_BAD_STREAMID; return -EINVAL; } --=20 2.7.4 From nobody Mon May 13 03:43:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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bh=tRSad7WoTFOponF+G6UnpmzO4ecidPjoO2ZvHdSbdBA=; b=fewE8YntJ/FWHnvYXTIByiEhniOkO0YmXv7icz6MzYmHYElgL1Vc72vm BvoMJrHD9k+p4vy0lSKLN2NqAH4GpLZHQ8HXWZC1RV6x/foeQZ41Pe+Wz iYBeKdToncyL/CidOzjXPwsjATn41ttlJt/SNwPW4SUHsP/CqUErRHLTP 4=; IronPort-SDR: mnslBslxYJbZJhEZ8OcfCdpE+K3DZv88iBICrIRMc+gsWHv2RpDWm9BKNMwj/dAT/NS2JtydBw dcbjh0+KcVDg== X-IronPort-AV: E=Sophos;i="5.69,322,1571702400"; d="scan'208";a="15161854" From: Simon Veith To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Cc: Simon Veith , Eric Auger Subject: [PATCH v3 4/6] hw/arm/smmuv3: Align stream table base address to table size Date: Mon, 16 Dec 2019 16:15:10 +0100 Message-Id: <1576509312-13083-5-git-send-email-sveith@amazon.de> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1576509312-13083-1-git-send-email-sveith@amazon.de> References: <1576509312-13083-1-git-send-email-sveith@amazon.de> Precedence: Bulk X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 207.171.190.10 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @amazon.de) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Per the specification, and as observed in hardware, the SMMUv3 aligns the SMMU_STRTAB_BASE address to the size of the table by masking out the respective least significant bits in the ADDR field. Apply this masking logic to our smmu_find_ste() lookup function per the specification. ref. ARM IHI 0070C, section 6.3.23. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Acked-by: Eric Auger Tested-by: Eric Auger --- Changed in v2: * Now using MAKE_64BIT_MASK() * Eliminated unnecessary branches by using MAX() * Removed unnecessary range check against DMA_ADDR_BITS hw/arm/smmuv3.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 727558b..31ac3ca 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -376,8 +376,9 @@ bad_ste: static int smmu_find_ste(SMMUv3State *s, uint32_t sid, STE *ste, SMMUEventInfo *event) { - dma_addr_t addr; + dma_addr_t addr, strtab_base; uint32_t log2size; + int strtab_size_shift; int ret; =20 trace_smmuv3_find_ste(sid, s->features, s->sid_split); @@ -391,10 +392,16 @@ static int smmu_find_ste(SMMUv3State *s, uint32_t sid= , STE *ste, } if (s->features & SMMU_FEATURE_2LVL_STE) { int l1_ste_offset, l2_ste_offset, max_l2_ste, span; - dma_addr_t strtab_base, l1ptr, l2ptr; + dma_addr_t l1ptr, l2ptr; STEDesc l1std; =20 - strtab_base =3D s->strtab_base & SMMU_BASE_ADDR_MASK; + /* + * Align strtab base address to table size. For this purpose, assu= me it + * is not bounded by SMMU_IDR1_SIDSIZE. + */ + strtab_size_shift =3D MAX(5, (int)log2size - s->sid_split - 1 + 3); + strtab_base =3D s->strtab_base & SMMU_BASE_ADDR_MASK & + ~MAKE_64BIT_MASK(0, strtab_size_shift); l1_ste_offset =3D sid >> s->sid_split; l2_ste_offset =3D sid & ((1 << s->sid_split) - 1); l1ptr =3D (dma_addr_t)(strtab_base + l1_ste_offset * sizeof(l1std)= ); @@ -433,7 +440,10 @@ static int smmu_find_ste(SMMUv3State *s, uint32_t sid,= STE *ste, } addr =3D l2ptr + l2_ste_offset * sizeof(*ste); } else { - addr =3D (s->strtab_base & SMMU_BASE_ADDR_MASK) + sid * sizeof(*st= e); + strtab_size_shift =3D log2size + 5; + strtab_base =3D s->strtab_base & SMMU_BASE_ADDR_MASK & + ~MAKE_64BIT_MASK(0, strtab_size_shift); + addr =3D strtab_base + sid * sizeof(*ste); } =20 if (smmu_get_ste(s, addr, ste, event)) { --=20 2.7.4 From nobody Mon May 13 03:43:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Mon, 16 Dec 2019 10:17:16 -0500 Received: from iad6-co-svc-p1-lb1-vlan3.amazon.com (HELO email-inbound-relay-2a-538b0bfb.us-west-2.amazon.com) ([10.124.125.6]) by smtp-border-fw-out-6001.iad6.amazon.com with ESMTP; 16 Dec 2019 15:17:15 +0000 Received: from sveith-desktop.aka.corp.amazon.com (pdx2-ws-svc-lb17-vlan2.amazon.com [10.247.140.66]) by email-inbound-relay-2a-538b0bfb.us-west-2.amazon.com (Postfix) with ESMTPS id 42F47A2651; Mon, 16 Dec 2019 15:17:13 +0000 (UTC) Received: from sveith-desktop.aka.corp.amazon.com (localhost [127.0.0.1]) by sveith-desktop.aka.corp.amazon.com (8.15.2/8.15.2/Debian-3) with ESMTP id xBGFHBbE014128; Mon, 16 Dec 2019 16:17:11 +0100 Received: (from sveith@localhost) by sveith-desktop.aka.corp.amazon.com (8.15.2/8.15.2/Submit) id xBGFHAp4014106; Mon, 16 Dec 2019 16:17:10 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.de; i=@amazon.de; q=dns/txt; s=amazon201209; t=1576509437; x=1608045437; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=DnWdil9M/KHhlCYcqIHDhxnPOJB7mXEYpBcWYuPCZHo=; b=ZjxCzYM84JfFSa9Z9sQVZU8v82yo+3mc/KYDf/dWicJneZqF6m7OCMLM i+a0bM0xCBKERFwoekgt3ujBOPS1Ihp8jf+5C3bQwX04CBUDm32Zh7lzW L/1x23CX6GEuGdvREjVSNeaGVl4t2XHXhkqIK7RVHvcMRqPpqqxQ+g/9f 4=; IronPort-SDR: 7M0g3OtvPRRWfh9g4zkiGG3kZd7aWHFvz0OntyTUBMYpn+YRpnOA6OYJejATP9M7iTDGDeUOGx tzlI5LgVq5TQ== X-IronPort-AV: E=Sophos;i="5.69,322,1571702400"; d="scan'208";a="9275759" From: Simon Veith To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Cc: Simon Veith , Eric Auger Subject: [PATCH v3 5/6] hw/arm/smmuv3: Use correct bit positions in EVT_SET_ADDR2 macro Date: Mon, 16 Dec 2019 16:15:11 +0100 Message-Id: <1576509312-13083-6-git-send-email-sveith@amazon.de> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1576509312-13083-1-git-send-email-sveith@amazon.de> References: <1576509312-13083-1-git-send-email-sveith@amazon.de> Precedence: Bulk X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 52.95.48.154 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @amazon.de) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The bit offsets in the EVT_SET_ADDR2 macro do not match those specified in the ARM SMMUv3 Architecture Specification. In all events that use this macro, e.g. F_WALK_EABT, the faulting fetch address or IPA actually occupies the 32-bit words 6 and 7 in the event record contiguously, with the upper and lower unused bits clear due to alignment or maximum supported address bits. How many bits are clear depends on the individual event type. Update the macro to write to the correct words in the event record so that guest drivers can obtain accurate address information on events. ref. ARM IHI 0070C, sections 7.3.12 through 7.3.16. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Acked-by: Eric Auger Tested-by: Eric Auger --- hw/arm/smmuv3-internal.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h index 042b435..4112394 100644 --- a/hw/arm/smmuv3-internal.h +++ b/hw/arm/smmuv3-internal.h @@ -461,8 +461,8 @@ typedef struct SMMUEventInfo { } while (0) #define EVT_SET_ADDR2(x, addr) \ do { \ - (x)->word[7] =3D deposit32((x)->word[7], 3, 29, addr >> 16); = \ - (x)->word[7] =3D deposit32((x)->word[7], 0, 16, addr & 0xffff)= ;\ + (x)->word[7] =3D (uint32_t)(addr >> 32); \ + (x)->word[6] =3D (uint32_t)(addr & 0xffffffff); \ } while (0) =20 void smmuv3_record_event(SMMUv3State *s, SMMUEventInfo *event); --=20 2.7.4 From nobody Mon May 13 03:43:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Mon, 16 Dec 2019 10:17:20 -0500 Received: from iad6-co-svc-p1-lb1-vlan3.amazon.com (HELO email-inbound-relay-2b-5bdc5131.us-west-2.amazon.com) ([10.124.125.6]) by smtp-border-fw-out-6001.iad6.amazon.com with ESMTP; 16 Dec 2019 15:17:20 +0000 Received: from sveith-desktop.aka.corp.amazon.com (pdx2-ws-svc-lb17-vlan2.amazon.com [10.247.140.66]) by email-inbound-relay-2b-5bdc5131.us-west-2.amazon.com (Postfix) with ESMTPS id 3CCE3A2197; Mon, 16 Dec 2019 15:17:18 +0000 (UTC) Received: from sveith-desktop.aka.corp.amazon.com (localhost [127.0.0.1]) by sveith-desktop.aka.corp.amazon.com (8.15.2/8.15.2/Debian-3) with ESMTP id xBGFHGdw014168; Mon, 16 Dec 2019 16:17:16 +0100 Received: (from sveith@localhost) by sveith-desktop.aka.corp.amazon.com (8.15.2/8.15.2/Submit) id xBGFHFLS014143; Mon, 16 Dec 2019 16:17:15 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.de; i=@amazon.de; q=dns/txt; s=amazon201209; t=1576509440; x=1608045440; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=Z0g33k0fJJlh3np7I7IZdcyVyzV2EJT6J7A5HaBP1Jc=; b=DdQXvSKhl1V1Io4wkW879gc70VYua6X1AQQX1wvqDzEzaUxgvBtCcym2 +pVKbLx7DUeH78UH38X6XNNjkrB28HAbMlJmgYROPCqnkB9eV3BQBQ/i7 7bfY/5089iyGEjLfgBifrb2h5uOCUZ9Og0WHcGm9uyrztUEqZsckaEgSf I=; IronPort-SDR: fw3ADRrLN+ng2QTpfC/KOk7ikWLls4Hna//RYlheOYRyO2E025gTqCHfcvS2suqr9aiNJiFeDx nUvjaVQR7u+g== X-IronPort-AV: E=Sophos;i="5.69,322,1571702400"; d="scan'208";a="9275773" From: Simon Veith To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Cc: Simon Veith , Eric Auger Subject: [PATCH v3 6/6] hw/arm/smmuv3: Report F_STE_FETCH fault address in correct word position Date: Mon, 16 Dec 2019 16:15:12 +0100 Message-Id: <1576509312-13083-7-git-send-email-sveith@amazon.de> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1576509312-13083-1-git-send-email-sveith@amazon.de> References: <1576509312-13083-1-git-send-email-sveith@amazon.de> Precedence: Bulk X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 52.95.48.154 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @amazon.de) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The smmuv3_record_event() function that generates the F_STE_FETCH error uses the EVT_SET_ADDR macro to record the fetch address, placing it in 32-bit words 4 and 5. The correct position for this address is in words 6 and 7, per the SMMUv3 Architecture Specification. Update the function to use the EVT_SET_ADDR2 macro instead, which is the macro intended for writing to these words. ref. ARM IHI 0070C, section 7.3.4. Signed-off-by: Simon Veith Cc: Eric Auger Cc: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Acked-by: Eric Auger Tested-by: Eric Auger --- hw/arm/smmuv3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 31ac3ca..8b5f157 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -172,7 +172,7 @@ void smmuv3_record_event(SMMUv3State *s, SMMUEventInfo = *info) case SMMU_EVT_F_STE_FETCH: EVT_SET_SSID(&evt, info->u.f_ste_fetch.ssid); EVT_SET_SSV(&evt, info->u.f_ste_fetch.ssv); - EVT_SET_ADDR(&evt, info->u.f_ste_fetch.addr); + EVT_SET_ADDR2(&evt, info->u.f_ste_fetch.addr); break; case SMMU_EVT_C_BAD_STE: EVT_SET_SSID(&evt, info->u.c_bad_ste.ssid); --=20 2.7.4