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Wed, 4 Dec 2019 17:05:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1575479154; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mc1RI1X6a9TI2HtaGuOb+i8lvqAVJiC3NOsuJudvhDI=; b=NYY4mCcJEaagKXwV3xMCCxoC96kCqQOX0C+GS7QmBkd0ZK2NXOnLe9fo25WH+sbgRKZF7+ znZC5Ht6xVFupG1n2JFiEzXB1SbVekj5tc7Xj0mwiOWP8iHBupYIO0YntyZQ98YbQR/IbP vYB9vi/fSjYtoBT0eH/K6aFOcM/ibfw= From: Igor Mammedov To: qemu-devel@nongnu.org Subject: [PATCH for-5.0 3/8] acpi: cpuhp: spec: clarify 'CPU selector' register usage and endianness Date: Wed, 4 Dec 2019 18:05:42 +0100 Message-Id: <1575479147-6641-4-git-send-email-imammedo@redhat.com> In-Reply-To: <1575479147-6641-1-git-send-email-imammedo@redhat.com> References: <1575479147-6641-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-MC-Unique: KBjbhOBNNSOoZlMNalx3Lg-1 X-Mimecast-Spam-Score: 0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.81 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, philmd@redhat.com, lersek@redhat.com, mst@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" * Move reserved registers to the top of the section, so reader would be aware of effects when reading registers description. * State registers endianness explicitly at the beginning of the section * Describe registers behavior in case of 'CPU selector' register contains value that doesn't point to a possible CPU. Signed-off-by: Igor Mammedov Reviewed-by: Laszlo Ersek --- docs/specs/acpi_cpu_hotplug.txt | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/docs/specs/acpi_cpu_hotplug.txt b/docs/specs/acpi_cpu_hotplug.= txt index ee219c8..4e65286 100644 --- a/docs/specs/acpi_cpu_hotplug.txt +++ b/docs/specs/acpi_cpu_hotplug.txt @@ -30,6 +30,18 @@ Register block base address: Register block size: ACPI_CPU_HOTPLUG_REG_LEN =3D 12 =20 +All accesses to registers described below, imply little-endian byte order. + +Reserved resisters behavior: + - write accesses are ignored + - read accesses return all bits set to 0. + +The last stored value in 'CPU selector' must refer to a possible CPU, othe= rwise + - reads from any register return 0 + - writes to any other register are ignored until valid value is stored i= nto it +On QEMU start, 'CPU selector' is initialized to a valid value, on reset it +keeps the current value. + read access: offset: [0x0-0x3] reserved @@ -86,9 +98,3 @@ write access: ACPI_DEVICE_OST QMP event from QEMU to external applicati= ons with current values of OST event and status registers. other values: reserved - -Selecting CPU device beyond possible range has no effect on platform: - - write accesses to CPU hot-plug registers not documented above are - ignored - - read accesses to CPU hot-plug registers not documented above return - all bits set to 0. --=20 2.7.4