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X-Received-From: 2a00:1450:4864:20::429 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Philippe Mathieu-Daud=C3=A9 The GSI creation code is common to all PC machines, extract the common code. Reviewed-by: Aleksandar Markovic Reviewed-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20191018135910.24286-2-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- hw/i386/pc.c | 15 +++++++++++++++ hw/i386/pc_piix.c | 9 +-------- hw/i386/pc_q35.c | 9 +-------- include/hw/i386/pc.h | 2 ++ 4 files changed, 19 insertions(+), 16 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index a8888dd..e8a54ac 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -355,6 +355,21 @@ void gsi_handler(void *opaque, int n, int level) qemu_set_irq(s->ioapic_irq[n], level); } =20 +GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled) +{ + GSIState *s; + + s =3D g_new0(GSIState, 1); + if (kvm_ioapic_in_kernel()) { + kvm_pc_setup_irq_routing(pci_enabled); + *irqs =3D qemu_allocate_irqs(kvm_pc_gsi_handler, s, GSI_NUM_PINS); + } else { + *irqs =3D qemu_allocate_irqs(gsi_handler, s, GSI_NUM_PINS); + } + + return s; +} + static void ioport80_write(void *opaque, hwaddr addr, uint64_t data, unsigned size) { diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index a86317c..0cc951a 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -189,14 +189,7 @@ static void pc_init1(MachineState *machine, xen_load_linux(pcms); } =20 - gsi_state =3D g_malloc0(sizeof(*gsi_state)); - if (kvm_ioapic_in_kernel()) { - kvm_pc_setup_irq_routing(pcmc->pci_enabled); - x86ms->gsi =3D qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state, - GSI_NUM_PINS); - } else { - x86ms->gsi =3D qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_= PINS); - } + gsi_state =3D pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); =20 if (pcmc->pci_enabled) { pci_bus =3D i440fx_init(host_type, diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 75c8caf..255c803 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -212,14 +212,7 @@ static void pc_q35_init(MachineState *machine) } =20 /* irq lines */ - gsi_state =3D g_malloc0(sizeof(*gsi_state)); - if (kvm_ioapic_in_kernel()) { - kvm_pc_setup_irq_routing(pcmc->pci_enabled); - x86ms->gsi =3D qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state, - GSI_NUM_PINS); - } else { - x86ms->gsi =3D qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_= PINS); - } + gsi_state =3D pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled); =20 /* create pci host bus */ q35_host =3D Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE)); diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 13c4eac..8c5dc39 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -157,6 +157,8 @@ typedef struct GSIState { =20 void gsi_handler(void *opaque, int n, int level); =20 +GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); + /* vmport.c */ #define TYPE_VMPORT "vmport" typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); --=20 1.8.3.1