From nobody Mon Feb 9 05:41:13 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1570883406; cv=none; d=zoho.com; s=zohoarc; b=AFnXkWwieJ9aPMMH8S6pZQ3iG7fL3R4jv5Dg4J4Q/fXCyLVabVJGnk9/Vm+MM1KdyJgGWO7rkb/bjS9r9qwx/gPpV3TsUN0hiy8DIGBdTy7v7BbK37/FwEi5HsnvYmkWNA0x1vESFjXuLftrALXBA1d2IGFEAMvX7hPQ6erLCzc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570883406; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=ofkST6yKoKf4WxzoKibk4SJ9R2f9XIR8FU91V5QPksI=; b=EQLOmaf5LnVO6PMAl80RRUiOTbvLVopnwXeRpTWUuSAkHvnyLxS+mwaieIbrIoJUPC6TpqFlvaQ1qakAtchsUe9YZ+xoVWciGNAAWpA50hnh/wqN2eh1h7GsSfaNnmrc8c5oi8rewXy3LUMq4yGa4B9oyKmRHNSaIwKyAX7fBbg= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 15708834067041013.8492993158734; Sat, 12 Oct 2019 05:30:06 -0700 (PDT) Received: from localhost ([::1]:32954 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iJGX7-00064m-7N for importer@patchew.org; Sat, 12 Oct 2019 08:30:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47893) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iJBRt-0001Gw-Rj for qemu-devel@nongnu.org; Sat, 12 Oct 2019 03:04:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iJBRs-0001yy-AV for qemu-devel@nongnu.org; Sat, 12 Oct 2019 03:04:21 -0400 Received: from mga01.intel.com ([192.55.52.88]:29436) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iJBRs-0001s3-2a for qemu-devel@nongnu.org; Sat, 12 Oct 2019 03:04:20 -0400 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2019 00:04:14 -0700 Received: from unknown (HELO localhost.localdomain.bj.intel.com) ([10.238.156.101]) by orsmga003.jf.intel.com with ESMTP; 12 Oct 2019 00:04:13 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,286,1566889200"; d="scan'208";a="197802829" From: Cathy Zhang To: pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com Subject: [PATCH 1/3] i386: Add MSR feature bit for MDS-NO Date: Sat, 12 Oct 2019 15:00:36 +0800 Message-Id: <1570863638-22272-2-git-send-email-cathy.zhang@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1570863638-22272-1-git-send-email-cathy.zhang@intel.com> References: <1570863638-22272-1-git-send-email-cathy.zhang@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.88 X-Mailman-Approved-At: Sat, 12 Oct 2019 08:24:54 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, Cathy Zhang Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Define MSR_ARCH_CAP_MDS_NO in the IA32_ARCH_CAPABILITIES MSR to allow CPU models to report the feature when host supports it. Signed-off-by: Cathy Zhang --- target/i386/cpu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index eaa5395..e757149 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -777,6 +777,7 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; #define MSR_ARCH_CAP_RSBA (1U << 2) #define MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY (1U << 3) #define MSR_ARCH_CAP_SSB_NO (1U << 4) +#define MSR_ARCH_CAP_MDS_NO (1U << 5) =20 #define MSR_CORE_CAP_SPLIT_LOCK_DETECT (1U << 5) =20 --=20 1.8.3.1