From nobody Wed Nov 12 10:10:53 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1570196864; cv=none; d=zoho.com; s=zohoarc; b=hhwRaXjVDaPJcBZbbYAzlIIe2Hvr1ZW5I8afafkDbTYYQaN9VyjwUVto46bqwVCTqe8GE1H8l8o4h4FeYkZkrcUkS5Bd7+WsliIINMcWhm2RUSsfeCt9gEVPZA8QIuocK0SRoRR4AxB6Yz4K8zWiQxyGh2tsqSXWoTMxcJa8HGQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570196864; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=5Nia3iOrwJuoAMIyuynSS1GSJjxGOcDQwdjeJIuIcUg=; b=eGFZrmgJPgDzuTesqOlW/GggXm0nS1guIt/j3Q4Xi09qJRG3XqIxlDhcr4l4d8z2PWuZBHNbGgOsqGc5XAL9M5XQadvFBwhdB3gTdwYK6MxpAaSA6sFs7l/WzZCYDH8aCApVTgYLVnSJXRqm9ICSvql2U9MHTdw+CAjEQdVIvoE= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570196863859126.51566024415274; Fri, 4 Oct 2019 06:47:43 -0700 (PDT) Received: from localhost ([::1]:49044 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iGNvn-0001RG-BA for importer@patchew.org; Fri, 04 Oct 2019 09:47:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49165) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iGNtR-0000AY-Be for qemu-devel@nongnu.org; Fri, 04 Oct 2019 09:45:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iGNtP-0002kq-Be for qemu-devel@nongnu.org; Fri, 04 Oct 2019 09:45:13 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:41306 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iGNtN-00021z-VT; Fri, 04 Oct 2019 09:45:11 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 368EC1A1DCD; Fri, 4 Oct 2019 15:44:02 +0200 (CEST) Received: from rtrkw870-lin.domain.local (rtrkw870-lin.domain.local [10.10.13.132]) by mail.rt-rk.com (Postfix) with ESMTPSA id 0F9601A212D; Fri, 4 Oct 2019 15:44:02 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Stefan Brankovic To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v2] target/ppc: Fix for optimized vsl/vsr instructions Date: Fri, 4 Oct 2019 15:43:59 +0200 Message-Id: <1570196639-7025-2-git-send-email-stefan.brankovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1570196639-7025-1-git-send-email-stefan.brankovic@rt-rk.com> References: <1570196639-7025-1-git-send-email-stefan.brankovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 89.216.37.149 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.hendreson@linaro.org, mark.cave-ayland@ilande.co.uk, pc@us.ibm.com, amarkovic@wavecomp.com, stefan.brankovic@rt-rk.com, alex.bennee@linaro.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" In previous implementation, invocation of TCG shift function could request shift of TCG variable by 64 bits when variable 'sh' is 0, which is not supported in TCG (values can be shifted by 0 to 63 bits). This patch fixes this by using two separate invocation of TCG shift functions, with maximum shift amount of 32. Name of variable 'shifted' is changed to 'carry' so variable naming is similar to old helper implementation. Variables 'avrA' and 'avrB' are replaced with variable 'avr'. Fixes: 4e6d0920e7547e6af4bbac5ffe9adfe6ea621822 Reported-by: Paul Clark Reported-by: Mark Cave-Ayland Suggested-by: Aleksandar Markovic Signed-off-by: Stefan Brankovic Tested-by: Paul A. Clarke --- target/ppc/translate/vmx-impl.inc.c | 84 ++++++++++++++++++---------------= ---- 1 file changed, 40 insertions(+), 44 deletions(-) diff --git a/target/ppc/translate/vmx-impl.inc.c b/target/ppc/translate/vmx= -impl.inc.c index 2472a52..81d5a7a 100644 --- a/target/ppc/translate/vmx-impl.inc.c +++ b/target/ppc/translate/vmx-impl.inc.c @@ -590,40 +590,38 @@ static void trans_vsl(DisasContext *ctx) int VT =3D rD(ctx->opcode); int VA =3D rA(ctx->opcode); int VB =3D rB(ctx->opcode); - TCGv_i64 avrA =3D tcg_temp_new_i64(); - TCGv_i64 avrB =3D tcg_temp_new_i64(); + TCGv_i64 avr =3D tcg_temp_new_i64(); TCGv_i64 sh =3D tcg_temp_new_i64(); - TCGv_i64 shifted =3D tcg_temp_new_i64(); + TCGv_i64 carry =3D tcg_temp_new_i64(); TCGv_i64 tmp =3D tcg_temp_new_i64(); =20 - /* Place bits 125-127 of vB in sh. */ - get_avr64(avrB, VB, false); - tcg_gen_andi_i64(sh, avrB, 0x07ULL); + /* Place bits 125-127 of vB in 'sh'. */ + get_avr64(avr, VB, false); + tcg_gen_andi_i64(sh, avr, 0x07ULL); =20 /* - * Save highest sh bits of lower doubleword element of vA in variable - * shifted and perform shift on lower doubleword. + * Save highest 'sh' bits of lower doubleword element of vA in variable + * 'carry' and perform shift on lower doubleword. */ - get_avr64(avrA, VA, false); - tcg_gen_subfi_i64(tmp, 64, sh); - tcg_gen_shr_i64(shifted, avrA, tmp); - tcg_gen_andi_i64(shifted, shifted, 0x7fULL); - tcg_gen_shl_i64(avrA, avrA, sh); - set_avr64(VT, avrA, false); + get_avr64(avr, VA, false); + tcg_gen_subfi_i64(tmp, 32, sh); + tcg_gen_shri_i64(carry, avr, 32); + tcg_gen_shr_i64(carry, carry, tmp); + tcg_gen_shl_i64(avr, avr, sh); + set_avr64(VT, avr, false); =20 /* * Perform shift on higher doubleword element of vA and replace lowest - * sh bits with shifted. + * 'sh' bits with 'carry'. */ - get_avr64(avrA, VA, true); - tcg_gen_shl_i64(avrA, avrA, sh); - tcg_gen_or_i64(avrA, avrA, shifted); - set_avr64(VT, avrA, true); + get_avr64(avr, VA, true); + tcg_gen_shl_i64(avr, avr, sh); + tcg_gen_or_i64(avr, avr, carry); + set_avr64(VT, avr, true); =20 - tcg_temp_free_i64(avrA); - tcg_temp_free_i64(avrB); + tcg_temp_free_i64(avr); tcg_temp_free_i64(sh); - tcg_temp_free_i64(shifted); + tcg_temp_free_i64(carry); tcg_temp_free_i64(tmp); } =20 @@ -639,39 +637,37 @@ static void trans_vsr(DisasContext *ctx) int VT =3D rD(ctx->opcode); int VA =3D rA(ctx->opcode); int VB =3D rB(ctx->opcode); - TCGv_i64 avrA =3D tcg_temp_new_i64(); - TCGv_i64 avrB =3D tcg_temp_new_i64(); + TCGv_i64 avr =3D tcg_temp_new_i64(); TCGv_i64 sh =3D tcg_temp_new_i64(); - TCGv_i64 shifted =3D tcg_temp_new_i64(); + TCGv_i64 carry =3D tcg_temp_new_i64(); TCGv_i64 tmp =3D tcg_temp_new_i64(); =20 - /* Place bits 125-127 of vB in sh. */ - get_avr64(avrB, VB, false); - tcg_gen_andi_i64(sh, avrB, 0x07ULL); + /* Place bits 125-127 of vB in 'sh'. */ + get_avr64(avr, VB, false); + tcg_gen_andi_i64(sh, avr, 0x07ULL); =20 /* - * Save lowest sh bits of higher doubleword element of vA in variable - * shifted and perform shift on higher doubleword. + * Save lowest 'sh' bits of higher doubleword element of vA in variable + * 'carry' and perform shift on higher doubleword. */ - get_avr64(avrA, VA, true); - tcg_gen_subfi_i64(tmp, 64, sh); - tcg_gen_shl_i64(shifted, avrA, tmp); - tcg_gen_andi_i64(shifted, shifted, 0xfe00000000000000ULL); - tcg_gen_shr_i64(avrA, avrA, sh); - set_avr64(VT, avrA, true); + get_avr64(avr, VA, true); + tcg_gen_subfi_i64(tmp, 32, sh); + tcg_gen_shli_i64(carry, avr, 32); + tcg_gen_shl_i64(carry, carry, tmp); + tcg_gen_shr_i64(avr, avr, sh); + set_avr64(VT, avr, true); /* * Perform shift on lower doubleword element of vA and replace highest - * sh bits with shifted. + * 'sh' bits with 'carry'. */ - get_avr64(avrA, VA, false); - tcg_gen_shr_i64(avrA, avrA, sh); - tcg_gen_or_i64(avrA, avrA, shifted); - set_avr64(VT, avrA, false); + get_avr64(avr, VA, false); + tcg_gen_shr_i64(avr, avr, sh); + tcg_gen_or_i64(avr, avr, carry); + set_avr64(VT, avr, false); =20 - tcg_temp_free_i64(avrA); - tcg_temp_free_i64(avrB); + tcg_temp_free_i64(avr); tcg_temp_free_i64(sh); - tcg_temp_free_i64(shifted); + tcg_temp_free_i64(carry); tcg_temp_free_i64(tmp); } =20 --=20 2.7.4