From nobody Sun May 5 17:59:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1570104212; cv=none; d=zoho.com; s=zohoarc; b=NHv2DnlJylLeyXbkgR/nL8wlQnP6ziBBfCRnIKHzTqVn2FpTLmT4D7pZMkZTvOOWD0+u7rSp2WlJt3nJ3zgFSMNUxQCTScZpTC3sK4ePEUqiqaWHfaaodyCizWLVccGzPFVq6k3gX3VkBzubUgwUbUXaiqvmN12mkNDrz2XlLOg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570104212; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=tpg6TYAyUEFKHT/HlyOI9meQ+naGh2ehPK1NA6n7Q1Y=; b=QIGmnsHwGe6rWzTBaOSYsqTivi7GTl9dRcxC3m6HWfu0nC6r7VD4EK9gHhEZcLYrWNaJom2z8YQZmiNgjKviwjO8rOjUI57A+cx+Kb6Nle0yU3G/2nxv++yJY1uMrzJNnrzIhwygCQTugLGxJnyF+hc8OyJe2I+RRb2wN09QfY8= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 15701042124928.99234572554326; Thu, 3 Oct 2019 05:03:32 -0700 (PDT) Received: from localhost ([::1]:35572 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iFzpQ-0001T1-Mu for importer@patchew.org; Thu, 03 Oct 2019 08:03:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39813) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iFznG-0008Bm-QM for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:01:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iFznB-0007CI-KW for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:01:14 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:23768 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iFznB-0007Bm-GC for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:01:09 -0400 Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x93Bvns8045930 for ; Thu, 3 Oct 2019 08:01:04 -0400 Received: from e06smtp05.uk.ibm.com (e06smtp05.uk.ibm.com [195.75.94.101]) by mx0b-001b2d01.pphosted.com with ESMTP id 2vddd9x3kq-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 03 Oct 2019 08:01:04 -0400 Received: from localhost by e06smtp05.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 3 Oct 2019 13:00:58 +0100 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x93C0vu122675624 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 3 Oct 2019 12:00:57 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 077534C05A; Thu, 3 Oct 2019 12:00:57 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C88394C040; Thu, 3 Oct 2019 12:00:56 +0000 (GMT) Received: from bahia.lan (unknown [9.145.67.254]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 3 Oct 2019 12:00:56 +0000 (GMT) Subject: [PATCH 1/7] spapr, xics: Get number of servers with a XICSFabricClass method From: Greg Kurz To: David Gibson , =?utf-8?q?C=C3=A9dric?= Le Goater Date: Thu, 03 Oct 2019 14:00:56 +0200 In-Reply-To: <157010404888.246126.9768030542733152637.stgit@bahia.lan> References: <157010404888.246126.9768030542733152637.stgit@bahia.lan> User-Agent: StGit/unknown-version MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 x-cbid: 19100312-0020-0000-0000-00000374A8C2 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19100312-0021-0000-0000-000021CAB256 Message-Id: <157010405465.246126.7760334967989385566.stgit@bahia.lan> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-10-03_05:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1908290000 definitions=main-1910030113 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" The number of servers, ie. upper bound of the highest VCPU id, is currently only needed to generate the "interrupt-controller" node in the DT. Soon it will be needed to inform the XICS-on-XIVE KVM device that it can allocates less resources in the XIVE HW. Add a method to XICSFabricClass for this purpose. Implement it for sPAPR and use it to generate the "interrupt-controller" node. Signed-off-by: Greg Kurz --- hw/intc/xics.c | 7 +++++++ hw/intc/xics_spapr.c | 3 ++- hw/ppc/spapr.c | 8 ++++++++ include/hw/ppc/xics.h | 2 ++ 4 files changed, 19 insertions(+), 1 deletion(-) diff --git a/hw/intc/xics.c b/hw/intc/xics.c index dfe7dbd254ab..f82072935266 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -716,6 +716,13 @@ ICPState *xics_icp_get(XICSFabric *xi, int server) return xic->icp_get(xi, server); } =20 +uint32_t xics_nr_servers(XICSFabric *xi) +{ + XICSFabricClass *xic =3D XICS_FABRIC_GET_CLASS(xi); + + return xic->nr_servers(xi); +} + void ics_set_irq_type(ICSState *ics, int srcno, bool lsi) { assert(!(ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MASK)); diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c index 6e5eb24b3cca..aa568ed0dc0d 100644 --- a/hw/intc/xics_spapr.c +++ b/hw/intc/xics_spapr.c @@ -311,8 +311,9 @@ static void ics_spapr_realize(DeviceState *dev, Error *= *errp) void spapr_dt_xics(SpaprMachineState *spapr, uint32_t nr_servers, void *fd= t, uint32_t phandle) { + ICSState *ics =3D spapr->ics; uint32_t interrupt_server_ranges_prop[] =3D { - 0, cpu_to_be32(nr_servers), + 0, cpu_to_be32(xics_nr_servers(ics->xics)), }; int node; =20 diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 514a17ae74d6..b8b9796c88e4 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -4266,6 +4266,13 @@ static ICPState *spapr_icp_get(XICSFabric *xi, int v= cpu_id) return cpu ? spapr_cpu_state(cpu)->icp : NULL; } =20 +static uint32_t spapr_nr_servers(XICSFabric *xi) +{ + SpaprMachineState *spapr =3D SPAPR_MACHINE(xi); + + return spapr_max_server_number(spapr); +} + static void spapr_pic_print_info(InterruptStatsProvider *obj, Monitor *mon) { @@ -4423,6 +4430,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) xic->ics_get =3D spapr_ics_get; xic->ics_resend =3D spapr_ics_resend; xic->icp_get =3D spapr_icp_get; + xic->nr_servers =3D spapr_nr_servers; ispc->print_info =3D spapr_pic_print_info; /* Force NUMA node memory size to be a multiple of * SPAPR_MEMORY_BLOCK_SIZE (256M) since that's the granularity diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 1e6a9300eb2b..e6bb1239e8f8 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -151,9 +151,11 @@ typedef struct XICSFabricClass { ICSState *(*ics_get)(XICSFabric *xi, int irq); void (*ics_resend)(XICSFabric *xi); ICPState *(*icp_get)(XICSFabric *xi, int server); + uint32_t (*nr_servers)(XICSFabric *xi); } XICSFabricClass; =20 ICPState *xics_icp_get(XICSFabric *xi, int server); +uint32_t xics_nr_servers(XICSFabric *xi); =20 /* Internal XICS interfaces */ void icp_set_cppr(ICPState *icp, uint8_t cppr); From nobody Sun May 5 17:59:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1570104388; cv=none; d=zoho.com; s=zohoarc; b=Ou/35nonXmG75RQX+cKpV6AANr5huIAT3eMjsbNvWuU66fxUabPy75jNEwq5OyHfzjxdQFM/eAHwPxVOm2cqlke8CmApPYZE0YP41xuCkiLf8kFto9KtLrdjOcUXOoXaqzAHC0pRP1CdbnsQfTx5duxgZoJxwslA6HVcOQ8EhRk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570104388; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=ZSxhoG76HKwvdQV+JLYBtmSYI1Dl3pNBIRDkiilNQp8=; b=b3e/P1ys4/ZbaHHJBnEJQaHMbsV/YvTzRJS5lJd7/BPpqUvxtnEt1QBujoHyaicGBTSwEhFE7knO2W/Et/BQXwvqUr+7FAmm4a5u34StzWaSrhgopq6l1frXbBXsvPMPogTJh7eHaT67yYIHKmxNP3UmhQiDEpqYJsgcIrSKOAY= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570104388018430.4980317471758; Thu, 3 Oct 2019 05:06:28 -0700 (PDT) Received: from localhost ([::1]:35608 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iFzsI-0004x1-OJ for importer@patchew.org; Thu, 03 Oct 2019 08:06:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39840) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iFznO-0008Ns-1v for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:01:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iFznM-0007PT-4I for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:01:21 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:18958 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iFznL-0007P6-VN for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:01:20 -0400 Received: from pps.filterd (m0098413.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x93BvFQ3020314 for ; Thu, 3 Oct 2019 08:01:19 -0400 Received: from e06smtp01.uk.ibm.com (e06smtp01.uk.ibm.com [195.75.94.97]) by mx0b-001b2d01.pphosted.com with ESMTP id 2vdfe1a91y-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 03 Oct 2019 08:01:19 -0400 Received: from localhost by e06smtp01.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 3 Oct 2019 13:01:15 +0100 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x93C1EBD43188412 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 3 Oct 2019 12:01:14 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EBA85A406E; Thu, 3 Oct 2019 12:01:13 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C150FA4069; Thu, 3 Oct 2019 12:01:13 +0000 (GMT) Received: from bahia.lan (unknown [9.145.67.254]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 3 Oct 2019 12:01:13 +0000 (GMT) Subject: [PATCH 2/7] spapr, xive: Turn "nr-ends" property into "nr-servers" property From: Greg Kurz To: David Gibson , =?utf-8?q?C=C3=A9dric?= Le Goater Date: Thu, 03 Oct 2019 14:01:13 +0200 In-Reply-To: <157010404888.246126.9768030542733152637.stgit@bahia.lan> References: <157010404888.246126.9768030542733152637.stgit@bahia.lan> User-Agent: StGit/unknown-version MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 x-cbid: 19100312-4275-0000-0000-0000036DAAC4 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19100312-4276-0000-0000-00003880B0D6 Message-Id: <157010406203.246126.13381271918474281392.stgit@bahia.lan> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-10-03_05:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1908290000 definitions=main-1910030113 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" The sPAPR XIVE object has an nr_ends field which happens to be a multiple of spapr_max_server_number(). It is currently set with the help of "nr-ends" property. This is a bit unfortunate since it exposes to the sPAPR irq frontend what should remain an implemantation detail within the XIVE backend. It will be possible soon to inform the XIVE KVM device about the range of VCPU ids that may be used in the VM, as returned by the spapr_max_server_number() function. This will allow the device to substantially reduce the consumption of scarce resources in the XIVE HW. For both reasons, replace the "nr-ends" property with an "nr-servers" one. The existing nr_ends field must be kept though since it tells how many ENDs are migrated, it is derived from "nr-servers" at realize time for simplicity. Convert spapr_dt_xive() to use it as well. Signed-off-by: Greg Kurz --- hw/intc/spapr_xive.c | 21 ++++++++++++++++----- hw/ppc/spapr_irq.c | 2 +- include/hw/ppc/spapr_xive.h | 1 + 3 files changed, 18 insertions(+), 6 deletions(-) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 04879abf2e7a..62888ddc68db 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -99,6 +99,15 @@ int spapr_xive_end_to_target(uint8_t end_blk, uint32_t e= nd_idx, return 0; } =20 +static uint32_t spapr_xive_vcpu_id_to_end_idx(uint32_t vcpu_id) +{ + /* + * 8 XIVE END structures per CPU. One for each available + * priority + */ + return vcpu_id << 3; +} + static void spapr_xive_cpu_to_end(PowerPCCPU *cpu, uint8_t prio, uint8_t *out_end_blk, uint32_t *out_end_= idx) { @@ -109,7 +118,7 @@ static void spapr_xive_cpu_to_end(PowerPCCPU *cpu, uint= 8_t prio, } =20 if (out_end_idx) { - *out_end_idx =3D (cpu->vcpu_id << 3) + prio; + *out_end_idx =3D spapr_xive_vcpu_id_to_end_idx(cpu->vcpu_id) + pri= o; } } =20 @@ -283,11 +292,13 @@ static void spapr_xive_realize(DeviceState *dev, Erro= r **errp) return; } =20 - if (!xive->nr_ends) { - error_setg(errp, "Number of interrupt needs to be greater 0"); + if (!xive->nr_servers) { + error_setg(errp, "Number of interrupt servers must be greater than= 0"); return; } =20 + xive->nr_ends =3D spapr_xive_vcpu_id_to_end_idx(xive->nr_servers); + /* * Initialize the internal sources, for IPIs and virtual devices. */ @@ -489,7 +500,7 @@ static const VMStateDescription vmstate_spapr_xive =3D { =20 static Property spapr_xive_properties[] =3D { DEFINE_PROP_UINT32("nr-irqs", SpaprXive, nr_irqs, 0), - DEFINE_PROP_UINT32("nr-ends", SpaprXive, nr_ends, 0), + DEFINE_PROP_UINT32("nr-servers", SpaprXive, nr_servers, 0), DEFINE_PROP_UINT64("vc-base", SpaprXive, vc_base, SPAPR_XIVE_VC_BASE), DEFINE_PROP_UINT64("tm-base", SpaprXive, tm_base, SPAPR_XIVE_TM_BASE), DEFINE_PROP_END_OF_LIST(), @@ -1550,7 +1561,7 @@ void spapr_dt_xive(SpaprMachineState *spapr, uint32_t= nr_servers, void *fdt, /* Interrupt number ranges for the IPIs */ uint32_t lisn_ranges[] =3D { cpu_to_be32(0), - cpu_to_be32(nr_servers), + cpu_to_be32(xive->nr_servers), }; /* * EQ size - the sizes of pages supported by the system 4K, 64K, diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index 457eabe24cda..025fd00143a2 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -591,7 +591,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **e= rrp) * 8 XIVE END structures per CPU. One for each available * priority */ - qdev_prop_set_uint32(dev, "nr-ends", nr_servers << 3); + qdev_prop_set_uint32(dev, "nr-servers", nr_servers); qdev_init_nofail(dev); =20 spapr->xive =3D SPAPR_XIVE(dev); diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h index 0df20a6590a5..4a4a6fc6be7f 100644 --- a/include/hw/ppc/spapr_xive.h +++ b/include/hw/ppc/spapr_xive.h @@ -22,6 +22,7 @@ typedef struct SpaprXive { /* Internal interrupt source for IPIs and virtual devices */ XiveSource source; hwaddr vc_base; + uint32_t nr_servers; =20 /* END ESB MMIOs */ XiveENDSource end_source; From nobody Sun May 5 17:59:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1570104231; cv=none; d=zoho.com; s=zohoarc; b=JDZv0dDbk9GLIsNDvcDb6LD2a1qgYv98ixBjO9qApMNgYFMRSP0Px20+zLw2xuXwFNO+CVYDNlvORdDDe915fG1RUL+elQgBr+ktLodo5ypH+J83e59QRXPwhfvzxfCcYedbnaI04zXj1F+X3oD9C/e8YUlhSg+/VMcTV5LgSnA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570104231; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=zms0XATw/kO47HC4kpFnPcn5TeDcT9zYwZpDr4Xzre0=; b=I/sOkIQ77P4y4Mlqp4WcxK1QGBwYRl/U+JhLWs7eezrAiaKOV2FI/zGhWZuC44sto22UoIVNlDDdxnwsvUmR7vE40d2vwLavSNuRV0TlvTSrAjeABjxuRBRb/V0/7eDLQao+aZq2B/yAj4JzC/0kQe8NQjhQ7x1H6nTgy3wMp+c= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570104231530451.91044077441893; Thu, 3 Oct 2019 05:03:51 -0700 (PDT) Received: from localhost ([::1]:35574 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iFzpl-0001ov-PX for importer@patchew.org; Thu, 03 Oct 2019 08:03:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39886) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iFznX-0008V3-VN for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:01:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iFznW-0007g8-Jl for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:01:31 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:54922 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iFznW-0007ew-EG for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:01:30 -0400 Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x93BvehE075758 for ; Thu, 3 Oct 2019 08:01:28 -0400 Received: from e06smtp03.uk.ibm.com (e06smtp03.uk.ibm.com [195.75.94.99]) by mx0a-001b2d01.pphosted.com with ESMTP id 2vdg8m0tdh-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 03 Oct 2019 08:01:28 -0400 Received: from localhost by e06smtp03.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 3 Oct 2019 13:01:24 +0100 Received: from d06av24.portsmouth.uk.ibm.com (d06av24.portsmouth.uk.ibm.com [9.149.105.60]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x93C1N4G40894658 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 3 Oct 2019 12:01:24 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B6F8842047; Thu, 3 Oct 2019 12:01:23 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 866FD42049; Thu, 3 Oct 2019 12:01:23 +0000 (GMT) Received: from bahia.lan (unknown [9.145.67.254]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 3 Oct 2019 12:01:23 +0000 (GMT) Subject: [PATCH 3/7] spapr, xics, xive: Drop nr_servers argument in DT-related functions From: Greg Kurz To: David Gibson , =?utf-8?q?C=C3=A9dric?= Le Goater Date: Thu, 03 Oct 2019 14:01:23 +0200 In-Reply-To: <157010404888.246126.9768030542733152637.stgit@bahia.lan> References: <157010404888.246126.9768030542733152637.stgit@bahia.lan> User-Agent: StGit/unknown-version MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 x-cbid: 19100312-0012-0000-0000-00000353AB8E X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19100312-0013-0000-0000-0000218EB25D Message-Id: <157010407899.246126.7691819104525548257.stgit@bahia.lan> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-10-03_05:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1908290000 definitions=main-1910030113 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Both XICS and XIVE backends can access nr_servers by other means. No need to pass it around anymore. Signed-off-by: Greg Kurz Reviewed-by: C=C3=A9dric Le Goater --- hw/intc/spapr_xive.c | 3 +-- hw/intc/xics_spapr.c | 3 +-- hw/ppc/spapr.c | 3 +-- hw/ppc/spapr_irq.c | 5 ++--- include/hw/ppc/spapr_irq.h | 3 +-- include/hw/ppc/spapr_xive.h | 3 +-- include/hw/ppc/xics_spapr.h | 3 +-- 7 files changed, 8 insertions(+), 15 deletions(-) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 62888ddc68db..56d851169cf6 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -1552,8 +1552,7 @@ void spapr_xive_hcall_init(SpaprMachineState *spapr) spapr_register_hypercall(H_INT_RESET, h_int_reset); } =20 -void spapr_dt_xive(SpaprMachineState *spapr, uint32_t nr_servers, void *fd= t, - uint32_t phandle) +void spapr_dt_xive(SpaprMachineState *spapr, void *fdt, uint32_t phandle) { SpaprXive *xive =3D spapr->xive; int node; diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c index aa568ed0dc0d..015753c19c5d 100644 --- a/hw/intc/xics_spapr.c +++ b/hw/intc/xics_spapr.c @@ -308,8 +308,7 @@ static void ics_spapr_realize(DeviceState *dev, Error *= *errp) spapr_register_hypercall(H_IPOLL, h_ipoll); } =20 -void spapr_dt_xics(SpaprMachineState *spapr, uint32_t nr_servers, void *fd= t, - uint32_t phandle) +void spapr_dt_xics(SpaprMachineState *spapr, void *fdt, uint32_t phandle) { ICSState *ics =3D spapr->ics; uint32_t interrupt_server_ranges_prop[] =3D { diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index b8b9796c88e4..8f59f08c102e 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1255,8 +1255,7 @@ static void *spapr_build_fdt(SpaprMachineState *spapr) _FDT(fdt_setprop_cell(fdt, 0, "#size-cells", 2)); =20 /* /interrupt controller */ - spapr->irq->dt_populate(spapr, spapr_max_server_number(spapr), fdt, - PHANDLE_INTC); + spapr->irq->dt_populate(spapr, fdt, PHANDLE_INTC); =20 ret =3D spapr_populate_memory(spapr, fdt); if (ret < 0) { diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index 025fd00143a2..02e1b5503b65 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -368,11 +368,10 @@ static void spapr_irq_print_info_dual(SpaprMachineSta= te *spapr, Monitor *mon) spapr_irq_current(spapr)->print_info(spapr, mon); } =20 -static void spapr_irq_dt_populate_dual(SpaprMachineState *spapr, - uint32_t nr_servers, void *fdt, +static void spapr_irq_dt_populate_dual(SpaprMachineState *spapr, void *fdt, uint32_t phandle) { - spapr_irq_current(spapr)->dt_populate(spapr, nr_servers, fdt, phandle); + spapr_irq_current(spapr)->dt_populate(spapr, fdt, phandle); } =20 static void spapr_irq_cpu_intc_create_dual(SpaprMachineState *spapr, diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index 69a37f608e01..1736e503a8e9 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -45,8 +45,7 @@ typedef struct SpaprIrq { int (*claim)(SpaprMachineState *spapr, int irq, bool lsi, Error **errp= ); void (*free)(SpaprMachineState *spapr, int irq); void (*print_info)(SpaprMachineState *spapr, Monitor *mon); - void (*dt_populate)(SpaprMachineState *spapr, uint32_t nr_servers, - void *fdt, uint32_t phandle); + void (*dt_populate)(SpaprMachineState *spapr, void *fdt, uint32_t phan= dle); void (*cpu_intc_create)(SpaprMachineState *spapr, PowerPCCPU *cpu, Error **errp); int (*post_load)(SpaprMachineState *spapr, int version_id); diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h index 4a4a6fc6be7f..fae075d51815 100644 --- a/include/hw/ppc/spapr_xive.h +++ b/include/hw/ppc/spapr_xive.h @@ -61,8 +61,7 @@ void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *= mon); int spapr_xive_post_load(SpaprXive *xive, int version_id); =20 void spapr_xive_hcall_init(SpaprMachineState *spapr); -void spapr_dt_xive(SpaprMachineState *spapr, uint32_t nr_servers, void *fd= t, - uint32_t phandle); +void spapr_dt_xive(SpaprMachineState *spapr, void *fdt, uint32_t phandle); void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx); void spapr_xive_mmio_set_enabled(SpaprXive *xive, bool enable); void spapr_xive_map_mmio(SpaprXive *xive); diff --git a/include/hw/ppc/xics_spapr.h b/include/hw/ppc/xics_spapr.h index 0b35e85c266a..ecb67c6c340a 100644 --- a/include/hw/ppc/xics_spapr.h +++ b/include/hw/ppc/xics_spapr.h @@ -32,8 +32,7 @@ #define TYPE_ICS_SPAPR "ics-spapr" #define ICS_SPAPR(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_SPAPR) =20 -void spapr_dt_xics(SpaprMachineState *spapr, uint32_t nr_servers, void *fd= t, - uint32_t phandle); +void spapr_dt_xics(SpaprMachineState *spapr, void *fdt, uint32_t phandle); int xics_kvm_connect(SpaprMachineState *spapr, Error **errp); void xics_kvm_disconnect(SpaprMachineState *spapr, Error **errp); bool xics_kvm_has_broken_disconnect(SpaprMachineState *spapr); From nobody Sun May 5 17:59:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1570104248; cv=none; d=zoho.com; s=zohoarc; b=O095CKnYj3IysQp75RJgpMzEnyOySneNJbDRIXAQqupKAv5XfqGTkAVZdTmNd7WnaYKQUVy3PmhXB0vv3S6kKdsBrz/HsxNaT/hrzTPkZZaMY5T1HSHFuDSjJUelWiuWQKzxw9/MCGtHqafTJ23mPYaI3T9n7Mo8VJLfaxjtP/Y= ARC-Message-Signature: i=1; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 3 Oct 2019 13:01:40 +0100 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06avi18626390.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x93C1AHu28377502 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 3 Oct 2019 12:01:10 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0D5AE11C070; Thu, 3 Oct 2019 12:01:39 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B9BE111C050; Thu, 3 Oct 2019 12:01:38 +0000 (GMT) Received: from bahia.lan (unknown [9.145.67.254]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 3 Oct 2019 12:01:38 +0000 (GMT) Subject: [PATCH RFC 4/7] linux-headers: Update against 5.3-rc2 From: Greg Kurz To: David Gibson , =?utf-8?q?C=C3=A9dric?= Le Goater Date: Thu, 03 Oct 2019 14:01:38 +0200 In-Reply-To: <157010404888.246126.9768030542733152637.stgit@bahia.lan> References: <157010404888.246126.9768030542733152637.stgit@bahia.lan> User-Agent: StGit/unknown-version MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 x-cbid: 19100312-0012-0000-0000-00000353AB94 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19100312-0013-0000-0000-0000218EB264 Message-Id: <157010408874.246126.3029715196145879526.stgit@bahia.lan> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-10-03_05:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1908290000 definitions=main-1910030113 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" In order to get some new KVM definitions: #define KVM_DEV_XICS_GRP_CTRL 2 #define KVM_DEV_XICS_NR_SERVERS 1 #define KVM_DEV_XIVE_NR_SERVERS 3 Signed-off-by: Greg Kurz --- This is tagged as RFC since these KVM definitions aren't upstream yet. --- include/standard-headers/asm-x86/bootparam.h | 2 ++ include/standard-headers/asm-x86/kvm_para.h | 1 + include/standard-headers/linux/ethtool.h | 2 ++ include/standard-headers/linux/pci_regs.h | 4 ++++ include/standard-headers/linux/virtio_ids.h | 1 + include/standard-headers/linux/virtio_pmem.h | 6 +++--- linux-headers/asm-arm/kvm.h | 12 +++++++++++ linux-headers/asm-arm/unistd-common.h | 2 ++ linux-headers/asm-arm64/kvm.h | 17 ++++++++++++++++ linux-headers/asm-generic/mman-common.h | 15 ++++++++------ linux-headers/asm-generic/mman.h | 10 ++++----- linux-headers/asm-generic/unistd.h | 8 +++++++ linux-headers/asm-mips/unistd_n32.h | 1 + linux-headers/asm-mips/unistd_n64.h | 1 + linux-headers/asm-mips/unistd_o32.h | 1 + linux-headers/asm-powerpc/kvm.h | 3 +++ linux-headers/asm-powerpc/mman.h | 6 +----- linux-headers/asm-powerpc/unistd_32.h | 2 ++ linux-headers/asm-powerpc/unistd_64.h | 2 ++ linux-headers/asm-s390/unistd_32.h | 2 ++ linux-headers/asm-s390/unistd_64.h | 2 ++ linux-headers/asm-x86/kvm.h | 28 ++++++++++++++++++++--= ---- linux-headers/asm-x86/unistd_32.h | 2 ++ linux-headers/asm-x86/unistd_64.h | 2 ++ linux-headers/asm-x86/unistd_x32.h | 2 ++ linux-headers/linux/kvm.h | 7 +++++-- linux-headers/linux/psp-sev.h | 5 +---- 27 files changed, 112 insertions(+), 34 deletions(-) diff --git a/include/standard-headers/asm-x86/bootparam.h b/include/standar= d-headers/asm-x86/bootparam.h index 67d4f0119f45..a6f7cf535e1e 100644 --- a/include/standard-headers/asm-x86/bootparam.h +++ b/include/standard-headers/asm-x86/bootparam.h @@ -29,6 +29,8 @@ #define XLF_EFI_HANDOVER_32 (1<<2) #define XLF_EFI_HANDOVER_64 (1<<3) #define XLF_EFI_KEXEC (1<<4) +#define XLF_5LEVEL (1<<5) +#define XLF_5LEVEL_ENABLED (1<<6) =20 =20 #endif /* _ASM_X86_BOOTPARAM_H */ diff --git a/include/standard-headers/asm-x86/kvm_para.h b/include/standard= -headers/asm-x86/kvm_para.h index e1715143fdda..90604a8fb77b 100644 --- a/include/standard-headers/asm-x86/kvm_para.h +++ b/include/standard-headers/asm-x86/kvm_para.h @@ -30,6 +30,7 @@ #define KVM_FEATURE_ASYNC_PF_VMEXIT 10 #define KVM_FEATURE_PV_SEND_IPI 11 #define KVM_FEATURE_POLL_CONTROL 12 +#define KVM_FEATURE_PV_SCHED_YIELD 13 =20 #define KVM_HINTS_REALTIME 0 =20 diff --git a/include/standard-headers/linux/ethtool.h b/include/standard-he= aders/linux/ethtool.h index 9b9919a8f621..16d0eeea868d 100644 --- a/include/standard-headers/linux/ethtool.h +++ b/include/standard-headers/linux/ethtool.h @@ -1483,6 +1483,8 @@ enum ethtool_link_mode_bit_indices { ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT =3D 64, ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT =3D 65, ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT =3D 66, + ETHTOOL_LINK_MODE_100baseT1_Full_BIT =3D 67, + ETHTOOL_LINK_MODE_1000baseT1_Full_BIT =3D 68, =20 /* must be last entry */ __ETHTOOL_LINK_MODE_MASK_NBITS diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-h= eaders/linux/pci_regs.h index 27164769d184..f28e562d7ca8 100644 --- a/include/standard-headers/linux/pci_regs.h +++ b/include/standard-headers/linux/pci_regs.h @@ -528,6 +528,7 @@ #define PCI_EXP_LNKCAP_SLS_5_0GB 0x00000002 /* LNKCAP2 SLS Vector bit 1 */ #define PCI_EXP_LNKCAP_SLS_8_0GB 0x00000003 /* LNKCAP2 SLS Vector bit 2 */ #define PCI_EXP_LNKCAP_SLS_16_0GB 0x00000004 /* LNKCAP2 SLS Vector bit 3 = */ +#define PCI_EXP_LNKCAP_SLS_32_0GB 0x00000005 /* LNKCAP2 SLS Vector bit 4 = */ #define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */ #define PCI_EXP_LNKCAP_ASPMS 0x00000c00 /* ASPM Support */ #define PCI_EXP_LNKCAP_L0SEL 0x00007000 /* L0s Exit Latency */ @@ -556,6 +557,7 @@ #define PCI_EXP_LNKSTA_CLS_5_0GB 0x0002 /* Current Link Speed 5.0GT/s */ #define PCI_EXP_LNKSTA_CLS_8_0GB 0x0003 /* Current Link Speed 8.0GT/s */ #define PCI_EXP_LNKSTA_CLS_16_0GB 0x0004 /* Current Link Speed 16.0GT/s */ +#define PCI_EXP_LNKSTA_CLS_32_0GB 0x0005 /* Current Link Speed 32.0GT/s */ #define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */ #define PCI_EXP_LNKSTA_NLW_X1 0x0010 /* Current Link Width x1 */ #define PCI_EXP_LNKSTA_NLW_X2 0x0020 /* Current Link Width x2 */ @@ -661,6 +663,7 @@ #define PCI_EXP_LNKCAP2_SLS_5_0GB 0x00000004 /* Supported Speed 5GT/s */ #define PCI_EXP_LNKCAP2_SLS_8_0GB 0x00000008 /* Supported Speed 8GT/s */ #define PCI_EXP_LNKCAP2_SLS_16_0GB 0x00000010 /* Supported Speed 16GT/s */ +#define PCI_EXP_LNKCAP2_SLS_32_0GB 0x00000020 /* Supported Speed 32GT/s */ #define PCI_EXP_LNKCAP2_CROSSLINK 0x00000100 /* Crosslink supported */ #define PCI_EXP_LNKCTL2 48 /* Link Control 2 */ #define PCI_EXP_LNKCTL2_TLS 0x000f @@ -668,6 +671,7 @@ #define PCI_EXP_LNKCTL2_TLS_5_0GT 0x0002 /* Supported Speed 5GT/s */ #define PCI_EXP_LNKCTL2_TLS_8_0GT 0x0003 /* Supported Speed 8GT/s */ #define PCI_EXP_LNKCTL2_TLS_16_0GT 0x0004 /* Supported Speed 16GT/s */ +#define PCI_EXP_LNKCTL2_TLS_32_0GT 0x0005 /* Supported Speed 32GT/s */ #define PCI_EXP_LNKSTA2 50 /* Link Status 2 */ #define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 52 /* v2 endpoints with link end he= re */ #define PCI_EXP_SLTCAP2 52 /* Slot Capabilities 2 */ diff --git a/include/standard-headers/linux/virtio_ids.h b/include/standard= -headers/linux/virtio_ids.h index 32b2f94d1f58..348fd0176f75 100644 --- a/include/standard-headers/linux/virtio_ids.h +++ b/include/standard-headers/linux/virtio_ids.h @@ -43,6 +43,7 @@ #define VIRTIO_ID_INPUT 18 /* virtio input */ #define VIRTIO_ID_VSOCK 19 /* virtio vsock transport */ #define VIRTIO_ID_CRYPTO 20 /* virtio crypto */ +#define VIRTIO_ID_IOMMU 23 /* virtio IOMMU */ #define VIRTIO_ID_PMEM 27 /* virtio pmem */ =20 #endif /* _LINUX_VIRTIO_IDS_H */ diff --git a/include/standard-headers/linux/virtio_pmem.h b/include/standar= d-headers/linux/virtio_pmem.h index 7e3d43b12136..fc029de7988e 100644 --- a/include/standard-headers/linux/virtio_pmem.h +++ b/include/standard-headers/linux/virtio_pmem.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ +/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Cla= use */ /* * Definitions for virtio-pmem devices. * @@ -7,8 +7,8 @@ * Author(s): Pankaj Gupta */ =20 -#ifndef _UAPI_LINUX_VIRTIO_PMEM_H -#define _UAPI_LINUX_VIRTIO_PMEM_H +#ifndef _LINUX_VIRTIO_PMEM_H +#define _LINUX_VIRTIO_PMEM_H =20 #include "standard-headers/linux/types.h" #include "standard-headers/linux/virtio_ids.h" diff --git a/linux-headers/asm-arm/kvm.h b/linux-headers/asm-arm/kvm.h index e1f8b745582f..dfccc47092c0 100644 --- a/linux-headers/asm-arm/kvm.h +++ b/linux-headers/asm-arm/kvm.h @@ -214,6 +214,18 @@ struct kvm_vcpu_events { #define KVM_REG_ARM_FW_REG(r) (KVM_REG_ARM | KVM_REG_SIZE_U64 | \ KVM_REG_ARM_FW | ((r) & 0xffff)) #define KVM_REG_ARM_PSCI_VERSION KVM_REG_ARM_FW_REG(0) +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1 KVM_REG_ARM_FW_REG(1) + /* Higher values mean better protection. */ +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL 0 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL 1 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED 2 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2 KVM_REG_ARM_FW_REG(2) + /* Higher values mean better protection. */ +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL 0 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN 1 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL 2 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED 3 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED (1U << 4) =20 /* Device Control API: ARM VGIC */ #define KVM_DEV_ARM_VGIC_GRP_ADDR 0 diff --git a/linux-headers/asm-arm/unistd-common.h b/linux-headers/asm-arm/= unistd-common.h index 27a9b6da27a1..eb5d361b117b 100644 --- a/linux-headers/asm-arm/unistd-common.h +++ b/linux-headers/asm-arm/unistd-common.h @@ -388,5 +388,7 @@ #define __NR_fsconfig (__NR_SYSCALL_BASE + 431) #define __NR_fsmount (__NR_SYSCALL_BASE + 432) #define __NR_fspick (__NR_SYSCALL_BASE + 433) +#define __NR_pidfd_open (__NR_SYSCALL_BASE + 434) +#define __NR_clone3 (__NR_SYSCALL_BASE + 435) =20 #endif /* _ASM_ARM_UNISTD_COMMON_H */ diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h index 2431ec35a958..a95d3a420389 100644 --- a/linux-headers/asm-arm64/kvm.h +++ b/linux-headers/asm-arm64/kvm.h @@ -229,6 +229,16 @@ struct kvm_vcpu_events { #define KVM_REG_ARM_FW_REG(r) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \ KVM_REG_ARM_FW | ((r) & 0xffff)) #define KVM_REG_ARM_PSCI_VERSION KVM_REG_ARM_FW_REG(0) +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1 KVM_REG_ARM_FW_REG(1) +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL 0 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL 1 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED 2 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2 KVM_REG_ARM_FW_REG(2) +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL 0 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN 1 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL 2 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED 3 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED (1U << 4) =20 /* SVE registers */ #define KVM_REG_ARM64_SVE (0x15 << KVM_REG_ARM_COPROC_SHIFT) @@ -260,6 +270,13 @@ struct kvm_vcpu_events { KVM_REG_SIZE_U256 | \ ((i) & (KVM_ARM64_SVE_MAX_SLICES - 1))) =20 +/* + * Register values for KVM_REG_ARM64_SVE_ZREG(), KVM_REG_ARM64_SVE_PREG() = and + * KVM_REG_ARM64_SVE_FFR() are represented in memory in an endianness- + * invariant layout which differs from the layout used for the FPSIMD + * V-registers on big-endian systems: see sigcontext.h for more explanatio= n. + */ + #define KVM_ARM64_SVE_VQ_MIN __SVE_VQ_MIN #define KVM_ARM64_SVE_VQ_MAX __SVE_VQ_MAX =20 diff --git a/linux-headers/asm-generic/mman-common.h b/linux-headers/asm-ge= neric/mman-common.h index abd238d0f7a4..63b1f506ea67 100644 --- a/linux-headers/asm-generic/mman-common.h +++ b/linux-headers/asm-generic/mman-common.h @@ -19,15 +19,18 @@ #define MAP_TYPE 0x0f /* Mask for type of mapping */ #define MAP_FIXED 0x10 /* Interpret addr exactly */ #define MAP_ANONYMOUS 0x20 /* don't use a file */ -#ifdef CONFIG_MMAP_ALLOW_UNINITIALIZED -# define MAP_UNINITIALIZED 0x4000000 /* For anonymous mmap, memory could b= e uninitialized */ -#else -# define MAP_UNINITIALIZED 0x0 /* Don't support this flag */ -#endif =20 -/* 0x0100 - 0x80000 flags are defined in asm-generic/mman.h */ +/* 0x0100 - 0x4000 flags are defined in asm-generic/mman.h */ +#define MAP_POPULATE 0x008000 /* populate (prefault) pagetables */ +#define MAP_NONBLOCK 0x010000 /* do not block on IO */ +#define MAP_STACK 0x020000 /* give out an address that is best suited for= process/thread stacks */ +#define MAP_HUGETLB 0x040000 /* create a huge page mapping */ +#define MAP_SYNC 0x080000 /* perform synchronous page faults for the mapp= ing */ #define MAP_FIXED_NOREPLACE 0x100000 /* MAP_FIXED which doesn't unmap unde= rlying mapping */ =20 +#define MAP_UNINITIALIZED 0x4000000 /* For anonymous mmap, memory could be + * uninitialized */ + /* * Flags for mlock */ diff --git a/linux-headers/asm-generic/mman.h b/linux-headers/asm-generic/m= man.h index 653687d9771b..57e8195d0b53 100644 --- a/linux-headers/asm-generic/mman.h +++ b/linux-headers/asm-generic/mman.h @@ -9,13 +9,11 @@ #define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ #define MAP_LOCKED 0x2000 /* pages are locked */ #define MAP_NORESERVE 0x4000 /* don't check for reservations */ -#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */ -#define MAP_NONBLOCK 0x10000 /* do not block on IO */ -#define MAP_STACK 0x20000 /* give out an address that is best suited for = process/thread stacks */ -#define MAP_HUGETLB 0x40000 /* create a huge page mapping */ -#define MAP_SYNC 0x80000 /* perform synchronous page faults for the mappi= ng */ =20 -/* Bits [26:31] are reserved, see mman-common.h for MAP_HUGETLB usage */ +/* + * Bits [26:31] are reserved, see asm-generic/hugetlb_encode.h + * for MAP_HUGETLB usage + */ =20 #define MCL_CURRENT 1 /* lock all current mappings */ #define MCL_FUTURE 2 /* lock all future mappings */ diff --git a/linux-headers/asm-generic/unistd.h b/linux-headers/asm-generic= /unistd.h index a87904daf103..1be0e798e362 100644 --- a/linux-headers/asm-generic/unistd.h +++ b/linux-headers/asm-generic/unistd.h @@ -844,9 +844,15 @@ __SYSCALL(__NR_fsconfig, sys_fsconfig) __SYSCALL(__NR_fsmount, sys_fsmount) #define __NR_fspick 433 __SYSCALL(__NR_fspick, sys_fspick) +#define __NR_pidfd_open 434 +__SYSCALL(__NR_pidfd_open, sys_pidfd_open) +#ifdef __ARCH_WANT_SYS_CLONE3 +#define __NR_clone3 435 +__SYSCALL(__NR_clone3, sys_clone3) +#endif =20 #undef __NR_syscalls -#define __NR_syscalls 434 +#define __NR_syscalls 436 =20 /* * 32 bit systems traditionally used different diff --git a/linux-headers/asm-mips/unistd_n32.h b/linux-headers/asm-mips/u= nistd_n32.h index fb988de9001e..7dffe8e34e63 100644 --- a/linux-headers/asm-mips/unistd_n32.h +++ b/linux-headers/asm-mips/unistd_n32.h @@ -363,6 +363,7 @@ #define __NR_fsconfig (__NR_Linux + 431) #define __NR_fsmount (__NR_Linux + 432) #define __NR_fspick (__NR_Linux + 433) +#define __NR_pidfd_open (__NR_Linux + 434) =20 =20 #endif /* _ASM_MIPS_UNISTD_N32_H */ diff --git a/linux-headers/asm-mips/unistd_n64.h b/linux-headers/asm-mips/u= nistd_n64.h index 17359163c9af..f4592d6fc50c 100644 --- a/linux-headers/asm-mips/unistd_n64.h +++ b/linux-headers/asm-mips/unistd_n64.h @@ -339,6 +339,7 @@ #define __NR_fsconfig (__NR_Linux + 431) #define __NR_fsmount (__NR_Linux + 432) #define __NR_fspick (__NR_Linux + 433) +#define __NR_pidfd_open (__NR_Linux + 434) =20 =20 #endif /* _ASM_MIPS_UNISTD_N64_H */ diff --git a/linux-headers/asm-mips/unistd_o32.h b/linux-headers/asm-mips/u= nistd_o32.h index 83c8d8fb83ad..04c6728352a5 100644 --- a/linux-headers/asm-mips/unistd_o32.h +++ b/linux-headers/asm-mips/unistd_o32.h @@ -409,6 +409,7 @@ #define __NR_fsconfig (__NR_Linux + 431) #define __NR_fsmount (__NR_Linux + 432) #define __NR_fspick (__NR_Linux + 433) +#define __NR_pidfd_open (__NR_Linux + 434) =20 =20 #endif /* _ASM_MIPS_UNISTD_O32_H */ diff --git a/linux-headers/asm-powerpc/kvm.h b/linux-headers/asm-powerpc/kv= m.h index b0f72dea8b11..264e266a85bf 100644 --- a/linux-headers/asm-powerpc/kvm.h +++ b/linux-headers/asm-powerpc/kvm.h @@ -667,6 +667,8 @@ struct kvm_ppc_cpu_char { =20 /* PPC64 eXternal Interrupt Controller Specification */ #define KVM_DEV_XICS_GRP_SOURCES 1 /* 64-bit source attributes */ +#define KVM_DEV_XICS_GRP_CTRL 2 +#define KVM_DEV_XICS_NR_SERVERS 1 =20 /* Layout of 64-bit source attribute values */ #define KVM_XICS_DESTINATION_SHIFT 0 @@ -683,6 +685,7 @@ struct kvm_ppc_cpu_char { #define KVM_DEV_XIVE_GRP_CTRL 1 #define KVM_DEV_XIVE_RESET 1 #define KVM_DEV_XIVE_EQ_SYNC 2 +#define KVM_DEV_XIVE_NR_SERVERS 3 #define KVM_DEV_XIVE_GRP_SOURCE 2 /* 64-bit source identifier */ #define KVM_DEV_XIVE_GRP_SOURCE_CONFIG 3 /* 64-bit source identifier */ #define KVM_DEV_XIVE_GRP_EQ_CONFIG 4 /* 64-bit EQ identifier */ diff --git a/linux-headers/asm-powerpc/mman.h b/linux-headers/asm-powerpc/m= man.h index 1c2b3fca05a8..8db7c2a3be30 100644 --- a/linux-headers/asm-powerpc/mman.h +++ b/linux-headers/asm-powerpc/mman.h @@ -21,15 +21,11 @@ #define MAP_DENYWRITE 0x0800 /* ETXTBSY */ #define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ =20 + #define MCL_CURRENT 0x2000 /* lock all currently mapped pages= */ #define MCL_FUTURE 0x4000 /* lock all additions to address s= pace */ #define MCL_ONFAULT 0x8000 /* lock all pages that are faulted in */ =20 -#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */ -#define MAP_NONBLOCK 0x10000 /* do not block on IO */ -#define MAP_STACK 0x20000 /* give out an address that is best suited for = process/thread stacks */ -#define MAP_HUGETLB 0x40000 /* create a huge page mapping */ - /* Override any generic PKEY permission defines */ #define PKEY_DISABLE_EXECUTE 0x4 #undef PKEY_ACCESS_MASK diff --git a/linux-headers/asm-powerpc/unistd_32.h b/linux-headers/asm-powe= rpc/unistd_32.h index 04cb2d3e619e..5584cc1b4fc1 100644 --- a/linux-headers/asm-powerpc/unistd_32.h +++ b/linux-headers/asm-powerpc/unistd_32.h @@ -416,6 +416,8 @@ #define __NR_fsconfig 431 #define __NR_fsmount 432 #define __NR_fspick 433 +#define __NR_pidfd_open 434 +#define __NR_clone3 435 =20 =20 #endif /* _ASM_POWERPC_UNISTD_32_H */ diff --git a/linux-headers/asm-powerpc/unistd_64.h b/linux-headers/asm-powe= rpc/unistd_64.h index b1e69214903b..251bcff77ea4 100644 --- a/linux-headers/asm-powerpc/unistd_64.h +++ b/linux-headers/asm-powerpc/unistd_64.h @@ -388,6 +388,8 @@ #define __NR_fsconfig 431 #define __NR_fsmount 432 #define __NR_fspick 433 +#define __NR_pidfd_open 434 +#define __NR_clone3 435 =20 =20 #endif /* _ASM_POWERPC_UNISTD_64_H */ diff --git a/linux-headers/asm-s390/unistd_32.h b/linux-headers/asm-s390/un= istd_32.h index 941853f3e954..7cce3ee29609 100644 --- a/linux-headers/asm-s390/unistd_32.h +++ b/linux-headers/asm-s390/unistd_32.h @@ -406,5 +406,7 @@ #define __NR_fsconfig 431 #define __NR_fsmount 432 #define __NR_fspick 433 +#define __NR_pidfd_open 434 +#define __NR_clone3 435 =20 #endif /* _ASM_S390_UNISTD_32_H */ diff --git a/linux-headers/asm-s390/unistd_64.h b/linux-headers/asm-s390/un= istd_64.h index 90271d7f8255..2371ff1e7a79 100644 --- a/linux-headers/asm-s390/unistd_64.h +++ b/linux-headers/asm-s390/unistd_64.h @@ -354,5 +354,7 @@ #define __NR_fsconfig 431 #define __NR_fsmount 432 #define __NR_fspick 433 +#define __NR_pidfd_open 434 +#define __NR_clone3 435 =20 #endif /* _ASM_S390_UNISTD_64_H */ diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h index 6e7dd792e448..503d3f42da16 100644 --- a/linux-headers/asm-x86/kvm.h +++ b/linux-headers/asm-x86/kvm.h @@ -378,23 +378,24 @@ struct kvm_sync_regs { struct kvm_vcpu_events events; }; =20 -#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0) -#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1) -#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2) -#define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3) +#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0) +#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1) +#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2) +#define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3) +#define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4) =20 #define KVM_STATE_NESTED_FORMAT_VMX 0 -#define KVM_STATE_NESTED_FORMAT_SVM 1 +#define KVM_STATE_NESTED_FORMAT_SVM 1 /* unused */ =20 #define KVM_STATE_NESTED_GUEST_MODE 0x00000001 #define KVM_STATE_NESTED_RUN_PENDING 0x00000002 #define KVM_STATE_NESTED_EVMCS 0x00000004 =20 -#define KVM_STATE_NESTED_VMX_VMCS_SIZE 0x1000 - #define KVM_STATE_NESTED_SMM_GUEST_MODE 0x00000001 #define KVM_STATE_NESTED_SMM_VMXON 0x00000002 =20 +#define KVM_STATE_NESTED_VMX_VMCS_SIZE 0x1000 + struct kvm_vmx_nested_state_data { __u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE]; __u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE]; @@ -432,4 +433,17 @@ struct kvm_nested_state { } data; }; =20 +/* for KVM_CAP_PMU_EVENT_FILTER */ +struct kvm_pmu_event_filter { + __u32 action; + __u32 nevents; + __u32 fixed_counter_bitmap; + __u32 flags; + __u32 pad[4]; + __u64 events[0]; +}; + +#define KVM_PMU_EVENT_ALLOW 0 +#define KVM_PMU_EVENT_DENY 1 + #endif /* _ASM_X86_KVM_H */ diff --git a/linux-headers/asm-x86/unistd_32.h b/linux-headers/asm-x86/unis= td_32.h index 57bb48854c9a..e8ebec1cdc99 100644 --- a/linux-headers/asm-x86/unistd_32.h +++ b/linux-headers/asm-x86/unistd_32.h @@ -424,5 +424,7 @@ #define __NR_fsconfig 431 #define __NR_fsmount 432 #define __NR_fspick 433 +#define __NR_pidfd_open 434 +#define __NR_clone3 435 =20 #endif /* _ASM_X86_UNISTD_32_H */ diff --git a/linux-headers/asm-x86/unistd_64.h b/linux-headers/asm-x86/unis= td_64.h index fe6aa0688a18..a2f863d5493f 100644 --- a/linux-headers/asm-x86/unistd_64.h +++ b/linux-headers/asm-x86/unistd_64.h @@ -346,5 +346,7 @@ #define __NR_fsconfig 431 #define __NR_fsmount 432 #define __NR_fspick 433 +#define __NR_pidfd_open 434 +#define __NR_clone3 435 =20 #endif /* _ASM_X86_UNISTD_64_H */ diff --git a/linux-headers/asm-x86/unistd_x32.h b/linux-headers/asm-x86/uni= std_x32.h index 09cca49ba7ba..4cdc67d84810 100644 --- a/linux-headers/asm-x86/unistd_x32.h +++ b/linux-headers/asm-x86/unistd_x32.h @@ -299,6 +299,8 @@ #define __NR_fsconfig (__X32_SYSCALL_BIT + 431) #define __NR_fsmount (__X32_SYSCALL_BIT + 432) #define __NR_fspick (__X32_SYSCALL_BIT + 433) +#define __NR_pidfd_open (__X32_SYSCALL_BIT + 434) +#define __NR_clone3 (__X32_SYSCALL_BIT + 435) #define __NR_rt_sigaction (__X32_SYSCALL_BIT + 512) #define __NR_rt_sigreturn (__X32_SYSCALL_BIT + 513) #define __NR_ioctl (__X32_SYSCALL_BIT + 514) diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index 18892d65414a..9cf351919c88 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -116,7 +116,7 @@ struct kvm_irq_level { * ACPI gsi notion of irq. * For IA-64 (APIC model) IOAPIC0: irq 0-23; IOAPIC1: irq 24-47.. * For X86 (standard AT mode) PIC0/1: irq 0-15. IOAPIC0: 0-23.. - * For ARM: See Documentation/virtual/kvm/api.txt + * For ARM: See Documentation/virt/kvm/api.txt */ union { __u32 irq; @@ -995,6 +995,7 @@ struct kvm_ppc_resize_hpt { #define KVM_CAP_ARM_SVE 170 #define KVM_CAP_ARM_PTRAUTH_ADDRESS 171 #define KVM_CAP_ARM_PTRAUTH_GENERIC 172 +#define KVM_CAP_PMU_EVENT_FILTER 173 =20 #ifdef KVM_CAP_IRQ_ROUTING =20 @@ -1085,7 +1086,7 @@ struct kvm_xen_hvm_config { * * KVM_IRQFD_FLAG_RESAMPLE indicates resamplefd is valid and specifies * the irqfd to operate in resampling mode for level triggered interrupt - * emulation. See Documentation/virtual/kvm/api.txt. + * emulation. See Documentation/virt/kvm/api.txt. */ #define KVM_IRQFD_FLAG_RESAMPLE (1 << 1) =20 @@ -1329,6 +1330,8 @@ struct kvm_s390_ucas_mapping { #define KVM_PPC_GET_RMMU_INFO _IOW(KVMIO, 0xb0, struct kvm_ppc_rmmu_inf= o) /* Available with KVM_CAP_PPC_GET_CPU_CHAR */ #define KVM_PPC_GET_CPU_CHAR _IOR(KVMIO, 0xb1, struct kvm_ppc_cpu_char) +/* Available with KVM_CAP_PMU_EVENT_FILTER */ +#define KVM_SET_PMU_EVENT_FILTER _IOW(KVMIO, 0xb2, struct kvm_pmu_event_= filter) =20 /* ioctl for vm fd */ #define KVM_CREATE_DEVICE _IOWR(KVMIO, 0xe0, struct kvm_create_device) diff --git a/linux-headers/linux/psp-sev.h b/linux-headers/linux/psp-sev.h index 36bbe17d8fa7..34c39690c09d 100644 --- a/linux-headers/linux/psp-sev.h +++ b/linux-headers/linux/psp-sev.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ /* * Userspace interface for AMD Secure Encrypted Virtualization (SEV) * platform management commands. @@ -7,10 +8,6 @@ * Author: Brijesh Singh * * SEV API specification is available at: https://developer.amd.com/sev/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ =20 #ifndef __PSP_SEV_USER_H__ From nobody Sun May 5 17:59:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1570104521; cv=none; d=zoho.com; s=zohoarc; b=RQmL+39QELuVNZuCv3pTf+4DGAiU3qsMRqnhjsFJ6dvjznkWQNcwAqnPnMQhAxQ4YGkn7XNZbVKxff5jSb/ffxF7BMYSPSSL37trmnEqBkCI1eQWJPl0I0Lz0dlQ6fxE3COIQRgA2HOmfaPJTGilbxaK/9xEqKHarmSlRIAldEM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570104521; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=VepSG+EE78Bb4o0OcqmZLK+kqRc2fBMZ7Znj+xHg7JA=; b=OenCBlXogxvIBifuCeb7hoWXXZxgT/sG+SxMsDphxxjLudYjYeAx4gg0mOkb+K4mSoPjum1N99h2awQGInv/cygytJRwOrYgibcLkGhLeP4hB4dD+UIud+LHVLZecKDEz5UnfNLVIR9qSI2gzQ7EUE3Ek1tX5VZrxzpfy1VQ1VA= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570104521738146.89307338182493; Thu, 3 Oct 2019 05:08:41 -0700 (PDT) Received: from localhost ([::1]:35658 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iFzuL-0007m7-Cc for importer@patchew.org; Thu, 03 Oct 2019 08:08:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40020) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iFznv-0000Rc-Og for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:02:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iFznt-00088S-1M for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:01:55 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:22698) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iFzns-00087k-MH for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:01:52 -0400 Received: from pps.filterd (m0098394.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x93Bvnk0056582 for ; Thu, 3 Oct 2019 08:01:51 -0400 Received: from e06smtp05.uk.ibm.com (e06smtp05.uk.ibm.com [195.75.94.101]) by mx0a-001b2d01.pphosted.com with ESMTP id 2vde6emyn3-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 03 Oct 2019 08:01:51 -0400 Received: from localhost by e06smtp05.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 3 Oct 2019 13:01:47 +0100 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x93C1kvY17826012 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 3 Oct 2019 12:01:46 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5F68BAE059; Thu, 3 Oct 2019 12:01:46 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2F259AE061; Thu, 3 Oct 2019 12:01:46 +0000 (GMT) Received: from bahia.lan (unknown [9.145.67.254]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 3 Oct 2019 12:01:46 +0000 (GMT) Subject: [PATCH 5/7] spapr/xics: Configure number of servers in KVM From: Greg Kurz To: David Gibson , =?utf-8?q?C=C3=A9dric?= Le Goater Date: Thu, 03 Oct 2019 14:01:45 +0200 In-Reply-To: <157010404888.246126.9768030542733152637.stgit@bahia.lan> References: <157010404888.246126.9768030542733152637.stgit@bahia.lan> User-Agent: StGit/unknown-version MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 x-cbid: 19100312-0020-0000-0000-00000374A8D8 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19100312-0021-0000-0000-000021CAB26D Message-Id: <157010410405.246126.5846482955650460662.stgit@bahia.lan> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-10-03_05:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=794 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1908290000 definitions=main-1910030113 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" The XICS-on-XIVE KVM devices now has an attribute to configure the number of interrupt servers. This allows to greatly optimize the usage of the VP space in the XIVE HW, and thus to start a lot more VMs. Only set this attribute if available in order to support older POWER9 KVM and pre-POWER9 XICS KVM devices. The XICS-on-XIVE KVM device now reports the exhaustion of VPs upon the connection of the first VCPU. Check that in order to have a chance to provide an hint to the user. Signed-off-by: Greg Kurz Reviewed-by: C=C3=A9dric Le Goater --- hw/intc/xics_kvm.c | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c index ba90d6dc966c..12d9524cc432 100644 --- a/hw/intc/xics_kvm.c +++ b/hw/intc/xics_kvm.c @@ -165,8 +165,15 @@ void icp_kvm_realize(DeviceState *dev, Error **errp) =20 ret =3D kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd, v= cpu_id); if (ret < 0) { - error_setg(errp, "Unable to connect CPU%ld to kernel XICS: %s", vc= pu_id, - strerror(errno)); + Error *local_err =3D NULL; + + error_setg(&local_err, "Unable to connect CPU%ld to kernel XICS: %= s", + vcpu_id, strerror(errno)); + if (errno =3D=3D ENOSPC) { + error_append_hint(&local_err, "Try -smp maxcpus=3DN with N < %= u\n", + MACHINE(qdev_get_machine())->smp.max_cpus); + } + error_propagate(errp, local_err); return; } enabled_icp =3D g_malloc(sizeof(*enabled_icp)); @@ -344,6 +351,7 @@ void ics_kvm_set_irq(ICSState *ics, int srcno, int val) =20 int xics_kvm_connect(SpaprMachineState *spapr, Error **errp) { + ICSState *ics =3D spapr->ics; int rc; CPUState *cs; Error *local_err =3D NULL; @@ -397,6 +405,18 @@ int xics_kvm_connect(SpaprMachineState *spapr, Error *= *errp) goto fail; } =20 + /* Tell KVM about the # of VCPUs we may have (POWER9 and newer only) */ + if (kvm_device_check_attr(rc, KVM_DEV_XICS_GRP_CTRL, + KVM_DEV_XICS_NR_SERVERS)) { + uint32_t nr_servers =3D xics_nr_servers(ics->xics); + + if (kvm_device_access(rc, KVM_DEV_XICS_GRP_CTRL, + KVM_DEV_XICS_NR_SERVERS, &nr_servers, true, + &local_err)) { + goto fail; + } + } + kernel_xics_fd =3D rc; kvm_kernel_irqchip =3D true; kvm_msi_via_irqfd_allowed =3D true; From nobody Sun May 5 17:59:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1570104408; cv=none; d=zoho.com; s=zohoarc; b=U0dkNPAghrgzXpCyCUjBxdTctTCJHqfhkHlsmMOQiU+HqshE2hA6eNmF2jYtPY/YnUIs9FozQzkNCrLSva+tJ7Rvzc4Eq0yrV/3Q6OIwtK/uTABwc/MlRahlVfoSliQ0yOzEkgrPEK1VqKTkkQ1i5HSsNyNMHCpvTrAse54oFPI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570104408; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=GxEinlYnbriz4qjTgzfcfJa3s3xkMFy/tGCqp1G1DbA=; b=MgRZtPDjVGFxqnkxh7EYlKOp4cOGD648/SLZhzDgcJc5r5auPhGDrpWWMKqP5s+BhlQphRPEfFTTOW1+1j2kENKh6VTQEy+ddYnKLNL5MZlFQ3BuXcmTzgcDplD4foenGKzUQvbGKzi5Pn/j7q52AvSSqrYG3j9xpPty1gWHfq0= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570104408361366.12682686572884; Thu, 3 Oct 2019 05:06:48 -0700 (PDT) Received: from localhost ([::1]:35616 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iFzsd-0005Sl-0Z for importer@patchew.org; Thu, 03 Oct 2019 08:06:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40119) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iFzoC-0000Z7-6d for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:02:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iFzo6-0008M8-U5 for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:02:12 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:38400) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iFzo3-0008FF-05 for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:02:04 -0400 Received: from pps.filterd (m0187473.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x93BvBZr138378 for ; Thu, 3 Oct 2019 08:01:59 -0400 Received: from e06smtp04.uk.ibm.com (e06smtp04.uk.ibm.com [195.75.94.100]) by mx0a-001b2d01.pphosted.com with ESMTP id 2vd1gye6ym-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 03 Oct 2019 08:01:59 -0400 Received: from localhost by e06smtp04.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 3 Oct 2019 13:01:54 +0100 Received: from b06wcsmtp001.portsmouth.uk.ibm.com (b06wcsmtp001.portsmouth.uk.ibm.com [9.149.105.160]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x93C1rYu51052772 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 3 Oct 2019 12:01:53 GMT Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D0026A4068; Thu, 3 Oct 2019 12:01:53 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9DE3DA4060; Thu, 3 Oct 2019 12:01:53 +0000 (GMT) Received: from bahia.lan (unknown [9.145.67.254]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 3 Oct 2019 12:01:53 +0000 (GMT) Subject: [PATCH 6/7] spapr/xive: Configure number of servers in KVM From: Greg Kurz To: David Gibson , =?utf-8?q?C=C3=A9dric?= Le Goater Date: Thu, 03 Oct 2019 14:01:53 +0200 In-Reply-To: <157010404888.246126.9768030542733152637.stgit@bahia.lan> References: <157010404888.246126.9768030542733152637.stgit@bahia.lan> User-Agent: StGit/unknown-version MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 x-cbid: 19100312-0016-0000-0000-000002B3A9F2 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19100312-0017-0000-0000-00003314B3CB Message-Id: <157010411139.246126.16419749660388287086.stgit@bahia.lan> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-10-03_05:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=787 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1908290000 definitions=main-1910030113 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" The XIVE KVM devices now has an attribute to configure the number of interrupt servers. This allows to greatly optimize the usage of the VP space in the XIVE HW, and thus to start a lot more VMs. Only set this attribute if available in order to support older POWER9 KVM. The XIVE KVM device now reports the exhaustion of VPs upon the connection of the first VCPU. Check that in order to have a chance to provide an hint to the user. Signed-off-by: Greg Kurz Reviewed-by: C=C3=A9dric Le Goater --- hw/intc/spapr_xive_kvm.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/hw/intc/spapr_xive_kvm.c b/hw/intc/spapr_xive_kvm.c index 51b334b676a1..2a3a9ef22b6f 100644 --- a/hw/intc/spapr_xive_kvm.c +++ b/hw/intc/spapr_xive_kvm.c @@ -152,7 +152,8 @@ void kvmppc_xive_cpu_synchronize_state(XiveTCTX *tctx, = Error **errp) =20 void kvmppc_xive_cpu_connect(XiveTCTX *tctx, Error **errp) { - SpaprXive *xive =3D SPAPR_MACHINE(qdev_get_machine())->xive; + MachineState *ms =3D MACHINE(qdev_get_machine()); + SpaprXive *xive =3D SPAPR_MACHINE(ms)->xive; unsigned long vcpu_id; int ret; =20 @@ -171,8 +172,15 @@ void kvmppc_xive_cpu_connect(XiveTCTX *tctx, Error **e= rrp) ret =3D kvm_vcpu_enable_cap(tctx->cs, KVM_CAP_PPC_IRQ_XIVE, 0, xive->f= d, vcpu_id, 0); if (ret < 0) { - error_setg(errp, "XIVE: unable to connect CPU%ld to KVM device: %s= ", + Error *err =3D NULL; + + error_setg(&err, "XIVE: unable to connect CPU%ld to KVM device: %s= ", vcpu_id, strerror(errno)); + if (errno =3D=3D ENOSPC) { + error_append_hint(&local_err, "Try -smp maxcpus=3DN with N < %= u\n", + ms->smp.max_cpus); + } + error_propagate(errp, err); return; } =20 @@ -768,6 +776,16 @@ void kvmppc_xive_connect(SpaprXive *xive, Error **errp) return; } =20 + /* Tell KVM about the # of VCPUs we may have */ + if (kvm_device_check_attr(xive->fd, KVM_DEV_XIVE_GRP_CTRL, + KVM_DEV_XIVE_NR_SERVERS)) { + if (kvm_device_access(xive->fd, KVM_DEV_XIVE_GRP_CTRL, + KVM_DEV_XIVE_NR_SERVERS, &xive->nr_servers, = true, + &local_err)) { + goto fail; + } + } + /* * 1. Source ESB pages - KVM mapping */ From nobody Sun May 5 17:59:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1570104404; cv=none; d=zoho.com; s=zohoarc; b=mcfdrwKGZ/pvwAsut4J4elpMZ7axbNomnwihN/N9V1IoycwqthMHGzDGiKdtOocTQAE8zGfYcWo/7IzGWaoqUmTMUOuEP/Pq6COvy9a9BZ93ldjlPwrVjxueQ929SxmOYXmfmVUlHhd8r1FbiTQLfs4FRAh5vNvkYJh1FQm3NT4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570104404; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=QrTDUOxZZwfY21GoHSTIkDNqR3VFelXb9ZGTdBqVSQc=; b=AopAHq8Izz4fgZ172yoTpCoZVSNOlL0Y4X7l1ah5yCgmt4MRzfnulgIlyrKlh9HA4+O/1mUy1sQVknhtW9VkdGRKBBi+DHcUjslQEX0PplmBHx8ejaRhcHmCJCeE/b7g7gdEm2vymNg76a7G4rEP0YuJkzOaNeln6WgDMBuzlTc= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570104404030667.4349455741514; Thu, 3 Oct 2019 05:06:44 -0700 (PDT) Received: from localhost ([::1]:35610 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iFzsY-0005Kj-Jr for importer@patchew.org; Thu, 03 Oct 2019 08:06:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40083) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iFzo8-0000Uv-Nu for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:02:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iFzo7-0008MZ-7p for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:02:08 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:37692 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iFzo6-0008LV-Vr for qemu-devel@nongnu.org; Thu, 03 Oct 2019 08:02:07 -0400 Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x93Bvn4c094432 for ; Thu, 3 Oct 2019 08:02:06 -0400 Received: from e06smtp01.uk.ibm.com (e06smtp01.uk.ibm.com [195.75.94.97]) by mx0b-001b2d01.pphosted.com with ESMTP id 2vdfcjtq24-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 03 Oct 2019 08:02:05 -0400 Received: from localhost by e06smtp01.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 3 Oct 2019 13:02:01 +0100 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x93C206V44105894 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 3 Oct 2019 12:02:00 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7CA8B52073; Thu, 3 Oct 2019 12:02:00 +0000 (GMT) Received: from bahia.lan (unknown [9.145.67.254]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id 4B33752069; Thu, 3 Oct 2019 12:02:00 +0000 (GMT) Subject: [PATCH 7/7] spapr: Set VSMT to smp_threads by default From: Greg Kurz To: David Gibson , =?utf-8?q?C=C3=A9dric?= Le Goater Date: Thu, 03 Oct 2019 14:02:00 +0200 In-Reply-To: <157010404888.246126.9768030542733152637.stgit@bahia.lan> References: <157010404888.246126.9768030542733152637.stgit@bahia.lan> User-Agent: StGit/unknown-version MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 x-cbid: 19100312-4275-0000-0000-0000036DAAD0 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19100312-4276-0000-0000-00003880B0E1 Message-Id: <157010411885.246126.12610015369068227139.stgit@bahia.lan> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-10-03_05:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1908290000 definitions=main-1910030113 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Support for setting VSMT is available in KVM since linux-4.13. Most distros that support KVM on POWER already have it. It thus seem reasonable enough to have the default machine to set VSMT to smp_threads. This brings contiguous VCPU ids and thus brings their upper bound down to the machine's max_cpus. This is especially useful for XIVE KVM devices, which may thus allocate only one VP descriptor per VCPU. Signed-off-by: Greg Kurz --- hw/ppc/spapr.c | 7 ++++++- include/hw/ppc/spapr.h | 1 + 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 8f59f08c102e..473ce1d04775 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2503,6 +2503,7 @@ static CPUArchId *spapr_find_cpu_slot(MachineState *m= s, uint32_t id, int *idx) static void spapr_set_vsmt_mode(SpaprMachineState *spapr, Error **errp) { MachineState *ms =3D MACHINE(spapr); + SpaprMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); Error *local_err =3D NULL; bool vsmt_user =3D !!spapr->vsmt; int kvm_smt =3D kvmppc_smt_threads(); @@ -2529,7 +2530,7 @@ static void spapr_set_vsmt_mode(SpaprMachineState *sp= apr, Error **errp) goto out; } /* In this case, spapr->vsmt has been set by the command line */ - } else { + } else if (!smc->smp_threads_vsmt) { /* * Default VSMT value is tricky, because we need it to be as * consistent as possible (for migration), but this requires @@ -2538,6 +2539,8 @@ static void spapr_set_vsmt_mode(SpaprMachineState *sp= apr, Error **errp) * overwhelmingly common case in production systems. */ spapr->vsmt =3D MAX(8, smp_threads); + } else { + spapr->vsmt =3D smp_threads; } =20 /* KVM: If necessary, set the SMT mode: */ @@ -4452,6 +4455,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) smc->irq =3D &spapr_irq_dual; smc->dr_phb_enabled =3D true; smc->linux_pci_probe =3D true; + smc->smp_threads_vsmt =3D true; } =20 static const TypeInfo spapr_machine_info =3D { @@ -4519,6 +4523,7 @@ static void spapr_machine_4_1_class_options(MachineCl= ass *mc) =20 spapr_machine_4_2_class_options(mc); smc->linux_pci_probe =3D false; + smc->smp_threads_vsmt =3D false; compat_props_add(mc->compat_props, hw_compat_4_1, hw_compat_4_1_len); compat_props_add(mc->compat_props, compat, G_N_ELEMENTS(compat)); } diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index cbd1a4c9f390..2009eb64f9cb 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -122,6 +122,7 @@ struct SpaprMachineClass { bool broken_host_serial_model; /* present real host info to the guest = */ bool pre_4_1_migration; /* don't migrate hpt-max-page-size */ bool linux_pci_probe; + bool smp_threads_vsmt; /* set VSMT to smp_threads by default */ =20 void (*phb_placement)(SpaprMachineState *spapr, uint32_t index, uint64_t *buid, hwaddr *pio,=20