From nobody Tue Feb 10 01:33:02 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1569944048; cv=none; d=zoho.com; s=zohoarc; b=nPgRafWmrMU9acDrfArdsApXjjtNOdlFzgXKaSAufbJ6ac9Cm5aJzkgKbSmnj1+or5nLjnNJRUM0TH1pJ0z8zNQd3Ch6kKdPe1WCCkRCn0QlNXSLsB/nX6QvlZku4jNWqRo7K8oyhucfheqNuUTuU9WfSGF+qCoE/7xTcf+Uz38= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1569944048; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=3vMjmpiNBrYWRG3LS9G3hIAm+YptHxwZemUplkcFWDk=; b=jJSjxP5PoT/g2I4MX3j1KBfq0AQLaBLR7Sz10JHlVkxNjZQK3LHUEPqa7d4EALyBVFlnXLX799wxzsltHlBPZes7DvEnk4s35zAHTd3h2BLqWOmYeRkIayep8ubdDiX2FtECQ1qACxACPecV/AIeFyBPJL+xSR9SMDPhncVbeJc= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 156994404873276.48752579841505; Tue, 1 Oct 2019 08:34:08 -0700 (PDT) Received: from localhost ([::1]:43466 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iFK9x-0002ic-UB for importer@patchew.org; Tue, 01 Oct 2019 11:33:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45454) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iFJtr-0004wI-93 for qemu-devel@nongnu.org; Tue, 01 Oct 2019 11:17:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iFJtp-00025V-IC for qemu-devel@nongnu.org; Tue, 01 Oct 2019 11:17:15 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:59987 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iFJtp-0001up-6O for qemu-devel@nongnu.org; Tue, 01 Oct 2019 11:17:13 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 691A41A22D4; Tue, 1 Oct 2019 17:15:55 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.55]) by mail.rt-rk.com (Postfix) with ESMTPSA id 1EEA61A239D; Tue, 1 Oct 2019 17:15:55 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Subject: [PULL 18/18] target/mips: msa: Move helpers for .V Date: Tue, 1 Oct 2019 17:15:44 +0200 Message-Id: <1569942944-10381-19-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1569942944-10381-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1569942944-10381-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 89.216.37.149 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Cosmetic reorganization. Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Rikalo Message-Id: <1569415572-19635-21-git-send-email-aleksandar.markovic@rt-rk.c= om> --- target/mips/helper.h | 9 +++--- target/mips/msa_helper.c | 81 ++++++++++++++++++++++++--------------------= ---- 2 files changed, 45 insertions(+), 45 deletions(-) diff --git a/target/mips/helper.h b/target/mips/helper.h index 3b1a965..d615c83 100644 --- a/target/mips/helper.h +++ b/target/mips/helper.h @@ -887,6 +887,11 @@ DEF_HELPER_4(msa_mod_s_h, void, env, i32, i32, i32) DEF_HELPER_4(msa_mod_s_w, void, env, i32, i32, i32) DEF_HELPER_4(msa_mod_s_d, void, env, i32, i32, i32) =20 +DEF_HELPER_4(msa_and_v, void, env, i32, i32, i32) +DEF_HELPER_4(msa_nor_v, void, env, i32, i32, i32) +DEF_HELPER_4(msa_or_v, void, env, i32, i32, i32) +DEF_HELPER_4(msa_xor_v, void, env, i32, i32, i32) + DEF_HELPER_3(msa_move_v, void, env, i32, i32) =20 DEF_HELPER_4(msa_andi_b, void, env, i32, i32, i32) @@ -1021,10 +1026,6 @@ DEF_HELPER_5(msa_mulr_q_df, void, env, i32, i32, i32= , i32) DEF_HELPER_5(msa_maddr_q_df, void, env, i32, i32, i32, i32) DEF_HELPER_5(msa_msubr_q_df, void, env, i32, i32, i32, i32) =20 -DEF_HELPER_4(msa_and_v, void, env, i32, i32, i32) -DEF_HELPER_4(msa_or_v, void, env, i32, i32, i32) -DEF_HELPER_4(msa_nor_v, void, env, i32, i32, i32) -DEF_HELPER_4(msa_xor_v, void, env, i32, i32, i32) DEF_HELPER_4(msa_fill_df, void, env, i32, i32, i32) =20 DEF_HELPER_4(msa_copy_s_b, void, env, i32, i32, i32) diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c index 03b198c..a2052ba 100644 --- a/target/mips/msa_helper.c +++ b/target/mips/msa_helper.c @@ -2010,7 +2010,46 @@ void helper_msa_mod_u_d(CPUMIPSState *env, * +---------------+------------------------------------------------------= ----+ */ =20 -/* TODO: insert Logic group helpers here */ + +void helper_msa_and_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_= t wt) +{ + wr_t *pwd =3D &(env->active_fpu.fpr[wd].wr); + wr_t *pws =3D &(env->active_fpu.fpr[ws].wr); + wr_t *pwt =3D &(env->active_fpu.fpr[wt].wr); + + pwd->d[0] =3D pws->d[0] & pwt->d[0]; + pwd->d[1] =3D pws->d[1] & pwt->d[1]; +} + +void helper_msa_nor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_= t wt) +{ + wr_t *pwd =3D &(env->active_fpu.fpr[wd].wr); + wr_t *pws =3D &(env->active_fpu.fpr[ws].wr); + wr_t *pwt =3D &(env->active_fpu.fpr[wt].wr); + + pwd->d[0] =3D ~(pws->d[0] | pwt->d[0]); + pwd->d[1] =3D ~(pws->d[1] | pwt->d[1]); +} + +void helper_msa_or_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t= wt) +{ + wr_t *pwd =3D &(env->active_fpu.fpr[wd].wr); + wr_t *pws =3D &(env->active_fpu.fpr[ws].wr); + wr_t *pwt =3D &(env->active_fpu.fpr[wt].wr); + + pwd->d[0] =3D pws->d[0] | pwt->d[0]; + pwd->d[1] =3D pws->d[1] | pwt->d[1]; +} + +void helper_msa_xor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_= t wt) +{ + wr_t *pwd =3D &(env->active_fpu.fpr[wd].wr); + wr_t *pws =3D &(env->active_fpu.fpr[ws].wr); + wr_t *pwt =3D &(env->active_fpu.fpr[wt].wr); + + pwd->d[0] =3D pws->d[0] ^ pwt->d[0]; + pwd->d[1] =3D pws->d[1] ^ pwt->d[1]; +} =20 =20 /* @@ -2160,46 +2199,6 @@ void helper_msa_shf_df(CPUMIPSState *env, uint32_t d= f, uint32_t wd, msa_move_v(pwd, pwx); } =20 -void helper_msa_and_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_= t wt) -{ - wr_t *pwd =3D &(env->active_fpu.fpr[wd].wr); - wr_t *pws =3D &(env->active_fpu.fpr[ws].wr); - wr_t *pwt =3D &(env->active_fpu.fpr[wt].wr); - - pwd->d[0] =3D pws->d[0] & pwt->d[0]; - pwd->d[1] =3D pws->d[1] & pwt->d[1]; -} - -void helper_msa_or_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t= wt) -{ - wr_t *pwd =3D &(env->active_fpu.fpr[wd].wr); - wr_t *pws =3D &(env->active_fpu.fpr[ws].wr); - wr_t *pwt =3D &(env->active_fpu.fpr[wt].wr); - - pwd->d[0] =3D pws->d[0] | pwt->d[0]; - pwd->d[1] =3D pws->d[1] | pwt->d[1]; -} - -void helper_msa_nor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_= t wt) -{ - wr_t *pwd =3D &(env->active_fpu.fpr[wd].wr); - wr_t *pws =3D &(env->active_fpu.fpr[ws].wr); - wr_t *pwt =3D &(env->active_fpu.fpr[wt].wr); - - pwd->d[0] =3D ~(pws->d[0] | pwt->d[0]); - pwd->d[1] =3D ~(pws->d[1] | pwt->d[1]); -} - -void helper_msa_xor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_= t wt) -{ - wr_t *pwd =3D &(env->active_fpu.fpr[wd].wr); - wr_t *pws =3D &(env->active_fpu.fpr[ws].wr); - wr_t *pwt =3D &(env->active_fpu.fpr[wt].wr); - - pwd->d[0] =3D pws->d[0] ^ pwt->d[0]; - pwd->d[1] =3D pws->d[1] ^ pwt->d[1]; -} - static inline int64_t msa_addv_df(uint32_t df, int64_t arg1, int64_t arg2) { return arg1 + arg2; --=20 2.7.4