From nobody Mon May 6 02:57:08 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=kernel.org ARC-Seal: i=1; a=rsa-sha256; t=1569301467; cv=none; d=zoho.com; s=zohoarc; b=KQODO7KxM74hE9yor/r0sAiIxxnFph2u68VyOX+NSKAP3ZSPyuIgfuAnNamLnkgF7lSTIXeKRtDQrP2xYeUXHzstHFTsorplCbCtsPvPupIkbxpF0xduBGfiU+v8GjI/vSi9+0tqj47tEpgbEM8kSmBH4CpfaCCK+YdqJ7sAcMU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1569301467; h=Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:Sender:Subject:To:ARC-Authentication-Results; bh=juYDDIvPUd703oolHYcGjGTrF7pecUBd2uIyvOADFVc=; b=ZpU+lR2pydHDy/LXR3INh0UC7bmyUDb53fjVw7Ts2ArUPCxlSBQEPRDSyxXTH0BD/tAGUDtoFvvqh+Fv93nH1wzpweWNooZ81zFhmIiDPeuW2eOJm61xUAzWWt1OFjD2XLwneuzXlQHC2VX6/Yu4wZL4nogTWaoy2NQ4GBVlra8= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1569301467797771.5673313476173; Mon, 23 Sep 2019 22:04:27 -0700 (PDT) Received: from localhost ([::1]:40794 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iCczw-00047e-09 for importer@patchew.org; Tue, 24 Sep 2019 01:04:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51804) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iCcx4-0002A9-LB for qemu-devel@nongnu.org; Tue, 24 Sep 2019 01:01:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iCcx2-0002UO-Gp for qemu-devel@nongnu.org; Tue, 24 Sep 2019 01:01:26 -0400 Received: from mail.kernel.org ([198.145.29.99]:42318) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iCcx0-0002SV-Gm; Tue, 24 Sep 2019 01:01:22 -0400 Received: from guoren-Inspiron-7460.lan (unknown [223.93.147.148]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E62BF20872; Tue, 24 Sep 2019 05:00:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569301277; bh=n1RdI/OAQ/Vw9nYytQuGvnrhjR9yJhMd+lcOx6KQFv8=; h=From:To:Cc:Subject:Date:From; b=XntcTVCQElHvXgfQECcraAyn8QkgAwmxqKipHF0Q2uGOCXdfk9/CfaF52nEFsDHih D88ImgDkR3tnHgnmVBPFEeD/QekZyi6KFnoYrdnm04UEgBpb5bPKkCTD3c5xUbxIjB Fn+RASkpqoYtdRv6tll1cnrhz742yKIvNx5/VDYw= From: guoren@kernel.org To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH] target/riscv: Bugfix reserved bits in PTE for RV64 Date: Tue, 24 Sep 2019 13:00:32 +0800 Message-Id: <1569301232-7128-1-git-send-email-guoren@kernel.org> X-Mailer: git-send-email 2.7.4 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 198.145.29.99 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, palmer@sifive.com, alistair.francis@wdc.com, Guo Ren Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Guo Ren Highest 10 bits of PTE are reserved in riscv-privileged, ref: [1], so we need to ignore them. They can not be a part of ppn. 1: The RISC-V Instruction Set Manual, Volume II: Privileged Architecture 4.4 Sv39: Page-Based 39-bit Virtual-Memory System 4.5 Sv48: Page-Based 48-bit Virtual-Memory System Signed-off-by: Guo Ren Reviewed-by: Liu Zhiwei --- target/riscv/cpu_helper.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 87dd6a6..3c5e8f6 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -260,6 +260,7 @@ restart: target_ulong pte =3D ldl_phys(cs->as, pte_addr); #elif defined(TARGET_RISCV64) target_ulong pte =3D ldq_phys(cs->as, pte_addr); + pte =3D pte << 10 >> 10; #endif hwaddr ppn =3D pte >> PTE_PPN_SHIFT; =20 --=20 2.7.4