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X-Received-From: 2a00:1450:4864:20::329 Subject: [Qemu-devel] [PULL 21/29] hw/i386/pc: Pass the CPUArchIdList array by argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Philippe Mathieu-Daud=C3=A9 Pass the CPUArchIdList array by argument, this will allow us to remove the PCMachineState argument later. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20190818225414.22590-8-philmd@redhat.com> --- hw/i386/pc.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index c0e9d83..5b3f615 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -937,14 +937,13 @@ static void pc_build_smbios(PCMachineState *pcms) } =20 static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms, + const CPUArchIdList *cpus, uint16_t boot_cpus, uint16_t apic_id_limit) { FWCfgState *fw_cfg; uint64_t *numa_fw_cfg; int i; - const CPUArchIdList *cpus; - MachineClass *mc =3D MACHINE_GET_CLASS(pcms); MachineState *ms =3D MACHINE(pcms); int nb_numa_nodes =3D ms->numa_state->num_nodes; =20 @@ -964,7 +963,7 @@ static FWCfgState *fw_cfg_arch_create(PCMachineState *p= cms, * So for compatibility reasons with old BIOSes we are stuck with * "etc/max-cpus" actually being apic_id_limit */ - fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)pcms->apic_id_limit); + fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, apic_id_limit); fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, acpi_tables, acpi_tables_len); @@ -980,20 +979,19 @@ static FWCfgState *fw_cfg_arch_create(PCMachineState = *pcms, * of nodes, one word for each VCPU->node and one word for each node to * hold the amount of memory. */ - numa_fw_cfg =3D g_new0(uint64_t, 1 + pcms->apic_id_limit + nb_numa_nod= es); + numa_fw_cfg =3D g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes); numa_fw_cfg[0] =3D cpu_to_le64(nb_numa_nodes); - cpus =3D mc->possible_cpu_arch_ids(MACHINE(pcms)); for (i =3D 0; i < cpus->len; i++) { unsigned int apic_id =3D cpus->cpus[i].arch_id; - assert(apic_id < pcms->apic_id_limit); + assert(apic_id < apic_id_limit); numa_fw_cfg[apic_id + 1] =3D cpu_to_le64(cpus->cpus[i].props.node_= id); } for (i =3D 0; i < nb_numa_nodes; i++) { - numa_fw_cfg[pcms->apic_id_limit + 1 + i] =3D + numa_fw_cfg[apic_id_limit + 1 + i] =3D cpu_to_le64(ms->numa_state->nodes[i].node_mem); } fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg, - (1 + pcms->apic_id_limit + nb_numa_nodes) * + (1 + apic_id_limit + nb_numa_nodes) * sizeof(*numa_fw_cfg)); =20 return fw_cfg; @@ -1775,6 +1773,7 @@ void pc_memory_init(PCMachineState *pcms, MemoryRegion *ram_below_4g, *ram_above_4g; FWCfgState *fw_cfg; MachineState *machine =3D MACHINE(pcms); + MachineClass *mc =3D MACHINE_GET_CLASS(machine); PCMachineClass *pcmc =3D PC_MACHINE_GET_CLASS(pcms); =20 assert(machine->ram_size =3D=3D pcms->below_4g_mem_size + @@ -1808,7 +1807,6 @@ void pc_memory_init(PCMachineState *pcms, if (!pcmc->has_reserved_memory && (machine->ram_slots || (machine->maxram_size > machine->ram_size))) { - MachineClass *mc =3D MACHINE_GET_CLASS(machine); =20 error_report("\"-memory 'slots|maxmem'\" is not supported by: %s", mc->name); @@ -1871,7 +1869,8 @@ void pc_memory_init(PCMachineState *pcms, option_rom_mr, 1); =20 - fw_cfg =3D fw_cfg_arch_create(pcms, pcms->boot_cpus, pcms->apic_id_lim= it); + fw_cfg =3D fw_cfg_arch_create(pcms, mc->possible_cpu_arch_ids(machine), + pcms->boot_cpus, pcms->apic_id_limit); =20 rom_set_fw(fw_cfg); =20 --=20 1.8.3.1