From nobody Wed Nov 12 03:43:52 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=fail (Bad Signature) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1567797427386531.6453678761812; Fri, 6 Sep 2019 12:17:07 -0700 (PDT) Received: from localhost ([::1]:59566 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i6JjD-00075q-AE for importer@patchew.org; Fri, 06 Sep 2019 15:17:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42227) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i6JeL-0001z1-Js for qemu-devel@nongnu.org; Fri, 06 Sep 2019 15:12:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i6JeJ-000468-V4 for qemu-devel@nongnu.org; Fri, 06 Sep 2019 15:12:01 -0400 Received: from mail-eopbgr820045.outbound.protection.outlook.com ([40.107.82.45]:56736 helo=NAM01-SN1-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1i6JeJ-00045z-Nn for qemu-devel@nongnu.org; Fri, 06 Sep 2019 15:11:59 -0400 Received: from DM5PR12MB2471.namprd12.prod.outlook.com (52.132.141.138) by DM5PR12MB1179.namprd12.prod.outlook.com (10.168.234.137) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2241.14; Fri, 6 Sep 2019 19:11:57 +0000 Received: from DM5PR12MB2471.namprd12.prod.outlook.com ([fe80::6c7c:4b6d:f136:1bf8]) by DM5PR12MB2471.namprd12.prod.outlook.com ([fe80::6c7c:4b6d:f136:1bf8%3]) with mapi id 15.20.2220.022; Fri, 6 Sep 2019 19:11:57 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=K2RlBC6ADLWhXdRRJbIJxLXz06GRuvKBjnkEKLJnwWRZXFZX+VgqFDsT/sqqtAEpJnmNW5SWjtMOCcjb7eIAURCrdnFqvyhyVAxKzfx8pQxxllBWb0zcrWOKKTMAyKWMbohU+ueUq9j5DTJu1Ab0wju9/4rqhZc8EP0KnxhNwsmsTa0geY6ud8x6WA6sYaWyPYsbnupB4FLteCci7msA2cXGbHGD0VupzKMfdXFUA01mmn/RiAQUJnpo6E/fc+YjzBI0Eds+1zgPD/7AAFS3zrMCfZqiJKVnwAfhxn7sGDsnw6CS29julvugElefkMZbKw/JZ4K3NGxz1TycQb1c3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=bXEw0n7MqNsbnRnV5gUXfMigHLDj0h38zB8kU3Z97WQ=; b=aUKUDnLAcjc0yx6dPjWJiDxROZ/bCPzFh0Wg31vkgmY5OAXTue1oZNBsQ0qjWaVVsCN74nma1pZojphFoQScHr205vj4ZpV5RDA5xe/xyGjRYKGG14RidRbylhXZyK/pALDKWikWeNjqWaYRDehWhi4wzI0XTHmHSBHhc54OcLAWrvrrpmoVlqny17csgYTzfkGLIWZQoAjEF/kfZ4DlqmOCVY5u5pjE8eUPxdaAhSuKg2FeO9Cwpbr0yZZ1xMS7HlGmhgsTdz9VxOrhAwDpN/0J8z/PH+yd4HHnvB1uTsbNHd20FzX9hy9LYfNZPMKEScvdKK9ojo3K+2WVUXGr3g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector2-amdcloud-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=bXEw0n7MqNsbnRnV5gUXfMigHLDj0h38zB8kU3Z97WQ=; b=lFyCayaTVxWVvg7cvTCPMCU40rG5o88+7CkbmZnie97QFQYkjK+ddkebL7ECZIHtAsDRGk0Wr2u0VPmjCX9Zf8RkLbBszS8O+jfp7NC51t5jZF03oi2SXrkdEiyrs7xeyQqo5945TgIhNuLwZg3DZ64hZxvkcS0f/JRgy1a50cw= From: "Moger, Babu" To: ssg.sos.staff , "ehabkost@redhat.com" , "marcel.apfelbaum@gmail.com" , "mst@redhat.com" , "pbonzini@redhat.com" , "rth@twiddle.net" , "eblake@redhat.com" , "armbru@redhat.com" , "imammedo@redhat.com" Thread-Topic: [RFC 2 PATCH 03/16] hw/i386: Introduce X86CPUTopoInfo to contain topology info Thread-Index: AQHVZObziLA3l0FNIkGr1sRRrqiJ3Q== Date: Fri, 6 Sep 2019 19:11:57 +0000 Message-ID: <156779711572.21957.10722611828264773686.stgit@localhost.localdomain> References: <156779689013.21957.1631551572950676212.stgit@localhost.localdomain> In-Reply-To: <156779689013.21957.1631551572950676212.stgit@localhost.localdomain> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SN4PR0401CA0010.namprd04.prod.outlook.com (2603:10b6:803:21::20) To DM5PR12MB2471.namprd12.prod.outlook.com (2603:10b6:4:b5::10) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Babu.Moger@amd.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [165.204.78.1] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: b6da3d73-6267-48e9-742b-08d732fe1622 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600166)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020); SRVR:DM5PR12MB1179; x-ms-traffictypediagnostic: DM5PR12MB1179: x-ld-processed: 3dd8961f-e488-4e60-8e11-a82d994e183d,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:2733; x-forefront-prvs: 0152EBA40F x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(4636009)(376002)(346002)(366004)(396003)(39860400002)(136003)(189003)(199004)(6116002)(103116003)(76176011)(305945005)(86362001)(256004)(2201001)(71190400001)(71200400001)(81156014)(81166006)(2906002)(476003)(3846002)(446003)(8676002)(11346002)(486006)(102836004)(7736002)(6506007)(386003)(6486002)(26005)(8936002)(5660300002)(186003)(4326008)(66066001)(6436002)(14454004)(25786009)(52116002)(9686003)(6512007)(53936002)(99286004)(2501003)(110136005)(478600001)(316002)(66476007)(64756008)(66446008)(66556008)(66946007); DIR:OUT; SFP:1101; SCL:1; SRVR:DM5PR12MB1179; H:DM5PR12MB2471.namprd12.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 5UdIfzb3w4RAnHMdLVY2xqhur+FxCziGESGE75PjqNmifNaOY/gpd+e9KG6WcJRVTrNWrgQ6c5DkmYcZN35SrDPb0r0XZ2919W11zRTOSDhPUWi/UYgXNvD3bWzyRrtna+k9b9m3zex7uyile9eexc4urWqykaCOebErJyqVdG5+GG+1/TQfUfZW8FiLW/T4quXisQJkEQYbZ+4Hmy7HHV1VdJtPALHmF2Q4gbN6zLguM5vrMLaKoJs0nGon/fhJnBGNN1Ds2qaJVP//An1mbhnmzjPh14juZsUny/VW5NsAm6WcxfTjscEynT7Cw0n0pF3WDXaPVvywfGQaqtgHeQZyzhkOGQG+jLV3MK2lWweUjRx9nGLYVKnw5NK+hfQLCF964jL0DRbwkMEGeRLgn+mprEGMEOo7qdwXS5FC9HA= Content-Type: text/plain; charset="utf-8" Content-ID: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: b6da3d73-6267-48e9-742b-08d732fe1622 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Sep 2019 19:11:57.4760 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: iazF9OP1NqVq2TvrDjWeOUIIcdP80YmQQEZWHIQAYPSRaWsWeMMSYadU8Sewttv5 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1179 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 40.107.82.45 Subject: [Qemu-devel] [RFC 2 PATCH 03/16] hw/i386: Introduce X86CPUTopoInfo to contain topology info X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "qemu-devel@nongnu.org" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) This is an effort to re-arrange few data structure for better readability. Add X86CPUTopoInfo which will have all the topology informations required to build the cpu topology. There is no functional changes. Signed-off-by: Babu Moger --- hw/i386/pc.c | 40 +++++++++++++++++++++++++++------------- include/hw/i386/topology.h | 40 ++++++++++++++++++++++++++-------------- 2 files changed, 53 insertions(+), 27 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index ada445f8f3..95aab8e5e7 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -930,11 +930,15 @@ static uint32_t x86_cpu_apic_id_from_index(PCMachineS= tate *pcms, { MachineState *ms =3D MACHINE(pcms); PCMachineClass *pcmc =3D PC_MACHINE_GET_CLASS(pcms); + X86CPUTopoInfo topo_info; uint32_t correct_id; static bool warned; =20 - correct_id =3D x86_apicid_from_cpu_idx(pcms->smp_dies, ms->smp.cores, - ms->smp.threads, cpu_index); + topo_info.nr_dies =3D pcms->smp_dies; + topo_info.nr_cores =3D ms->smp.cores; + topo_info.nr_threads =3D ms->smp.threads; + + correct_id =3D x86_apicid_from_cpu_idx(&topo_info, cpu_index); if (pcmc->compat_apic_id_mode) { if (cpu_index !=3D correct_id && !warned && !qtest_enabled()) { error_report("APIC IDs set in compatibility mode, " @@ -2386,6 +2390,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_d= ev, PCMachineState *pcms =3D PC_MACHINE(hotplug_dev); unsigned int smp_cores =3D ms->smp.cores; unsigned int smp_threads =3D ms->smp.threads; + X86CPUTopoInfo topo_info; =20 if(!object_dynamic_cast(OBJECT(cpu), ms->cpu_type)) { error_setg(errp, "Invalid CPU type, expected cpu type: '%s'", @@ -2393,6 +2398,10 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_= dev, return; } =20 + topo_info.nr_dies =3D pcms->smp_dies; + topo_info.nr_cores =3D smp_cores; + topo_info.nr_threads =3D smp_threads; + env->nr_dies =3D pcms->smp_dies; =20 /* @@ -2436,16 +2445,14 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug= _dev, topo_ids.die_id =3D cpu->die_id; topo_ids.core_id =3D cpu->core_id; topo_ids.smt_id =3D cpu->thread_id; - cpu->apic_id =3D apicid_from_topo_ids(pcms->smp_dies, smp_cores, - smp_threads, &topo_ids); + cpu->apic_id =3D apicid_from_topo_ids(&topo_info, &topo_ids); } =20 cpu_slot =3D pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx); if (!cpu_slot) { MachineState *ms =3D MACHINE(pcms); =20 - x86_topo_ids_from_apicid(cpu->apic_id, pcms->smp_dies, - smp_cores, smp_threads, &topo_ids); + x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); error_setg(errp, "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with" " APIC ID %" PRIu32 ", valid index range 0:%d", @@ -2466,8 +2473,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_d= ev, /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizef= n() * once -smp refactoring is complete and there will be CPU private * CPUState::nr_cores and CPUState::nr_threads fields instead of globa= ls */ - x86_topo_ids_from_apicid(cpu->apic_id, pcms->smp_dies, - smp_cores, smp_threads, &topo_ids); + x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); if (cpu->socket_id !=3D -1 && cpu->socket_id !=3D topo_ids.pkg_id) { error_setg(errp, "property socket-id: %u doesn't match set apic-id= :" " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, topo_id= s.pkg_id); @@ -2842,19 +2848,28 @@ static int64_t pc_get_default_cpu_node_id(const Mac= hineState *ms, int idx) { X86CPUTopoIDs topo_ids; PCMachineState *pcms =3D PC_MACHINE(ms); + X86CPUTopoInfo topo_info; + + topo_info.nr_dies =3D pcms->smp_dies; + topo_info.nr_cores =3D ms->smp.cores; + topo_info.nr_threads =3D ms->smp.threads; =20 assert(idx < ms->possible_cpus->len); x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, - pcms->smp_dies, ms->smp.cores, - ms->smp.threads, &topo_ids); + &topo_info, &topo_ids); return topo_ids.pkg_id % nb_numa_nodes; } =20 static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *ms) { PCMachineState *pcms =3D PC_MACHINE(ms); - int i; unsigned int max_cpus =3D ms->smp.max_cpus; + X86CPUTopoInfo topo_info; + int i; + + topo_info.nr_dies =3D pcms->smp_dies; + topo_info.nr_cores =3D ms->smp.cores; + topo_info.nr_threads =3D ms->smp.threads; =20 if (ms->possible_cpus) { /* @@ -2875,8 +2890,7 @@ static const CPUArchIdList *pc_possible_cpu_arch_ids(= MachineState *ms) ms->possible_cpus->cpus[i].vcpus_count =3D 1; ms->possible_cpus->cpus[i].arch_id =3D x86_cpu_apic_id_from_index(= pcms, i); x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, - pcms->smp_dies, ms->smp.cores, - ms->smp.threads, &topo_ids); + &topo_info, &topo_ids); ms->possible_cpus->cpus[i].props.has_socket_id =3D true; ms->possible_cpus->cpus[i].props.socket_id =3D topo_ids.pkg_id; ms->possible_cpus->cpus[i].props.has_die_id =3D true; diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h index 0637743cdf..906017e8e3 100644 --- a/include/hw/i386/topology.h +++ b/include/hw/i386/topology.h @@ -54,6 +54,14 @@ typedef struct X86CPUTopoIDs { unsigned ccx_id; } X86CPUTopoIDs; =20 +typedef struct X86CPUTopoInfo { + unsigned numa_nodes; + unsigned nr_sockets; + unsigned nr_dies; + unsigned nr_cores; + unsigned nr_threads; +} X86CPUTopoInfo; + /* Return the bit width needed for 'count' IDs */ static unsigned apicid_bitwidth_for_count(unsigned count) @@ -121,11 +129,13 @@ static inline unsigned apicid_pkg_offset(unsigned nr_= dies, * * The caller must make sure core_id < nr_cores and smt_id < nr_threads. */ -static inline apic_id_t apicid_from_topo_ids(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads, +static inline apic_id_t apicid_from_topo_ids(X86CPUTopoInfo *topo_info, const X86CPUTopoIDs *topo_ids) { + unsigned nr_dies =3D topo_info->nr_dies; + unsigned nr_cores =3D topo_info->nr_cores; + unsigned nr_threads =3D topo_info->nr_threads; + return (topo_ids->pkg_id << apicid_pkg_offset(nr_dies, nr_cores, nr_t= hreads)) | (topo_ids->die_id << apicid_die_offset(nr_dies, nr_cores, nr_t= hreads)) | (topo_ids->core_id << apicid_core_offset(nr_dies, nr_cores, nr_= threads)) | @@ -135,12 +145,14 @@ static inline apic_id_t apicid_from_topo_ids(unsigned= nr_dies, /* Calculate thread/core/package IDs for a specific topology, * based on (contiguous) CPU index */ -static inline void x86_topo_ids_from_idx(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads, +static inline void x86_topo_ids_from_idx(X86CPUTopoInfo *topo_info, unsigned cpu_index, X86CPUTopoIDs *topo_ids) { + unsigned nr_dies =3D topo_info->nr_dies; + unsigned nr_cores =3D topo_info->nr_cores; + unsigned nr_threads =3D topo_info->nr_threads; + topo_ids->pkg_id =3D cpu_index / (nr_dies * nr_cores * nr_threads); topo_ids->die_id =3D cpu_index / (nr_cores * nr_threads) % nr_dies; topo_ids->core_id =3D cpu_index / nr_threads % nr_cores; @@ -151,11 +163,13 @@ static inline void x86_topo_ids_from_idx(unsigned nr_= dies, * based on APIC ID */ static inline void x86_topo_ids_from_apicid(apic_id_t apicid, - unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads, + X86CPUTopoInfo *topo_info, X86CPUTopoIDs *topo_ids) { + unsigned nr_dies =3D topo_info->nr_dies; + unsigned nr_cores =3D topo_info->nr_cores; + unsigned nr_threads =3D topo_info->nr_threads; + topo_ids->smt_id =3D apicid & ~(0xFFFFFFFFUL << apicid_smt_width(nr_dies, nr_cores, nr_threa= ds)); topo_ids->core_id =3D @@ -171,14 +185,12 @@ static inline void x86_topo_ids_from_apicid(apic_id_t= apicid, * * 'cpu_index' is a sequential, contiguous ID for the CPU. */ -static inline apic_id_t x86_apicid_from_cpu_idx(unsigned nr_dies, - unsigned nr_cores, - unsigned nr_threads, +static inline apic_id_t x86_apicid_from_cpu_idx(X86CPUTopoInfo *topo_info, unsigned cpu_index) { X86CPUTopoIDs topo_ids; - x86_topo_ids_from_idx(nr_dies, nr_cores, nr_threads, cpu_index, &topo_= ids); - return apicid_from_topo_ids(nr_dies, nr_cores, nr_threads, &topo_ids); + x86_topo_ids_from_idx(topo_info, cpu_index, &topo_ids); + return apicid_from_topo_ids(topo_info, &topo_ids); } =20 #endif /* HW_I386_TOPOLOGY_H */