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DIR:OUT; SFP:1101; SCL:1; SRVR:DM5PR12MB1145; H:DM5PR12MB2471.namprd12.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: rwEaJr/bcyusb3I3cbdFUQJ4AFTuvbBMrDUCloKZsUstEIxx04dwu7Z6KPUaFvRaGSjhwU2CnjDUVb7LFf/6s9RR8CWNrh9KPxR/I1G4MYi4oLNz+jMp98hK29t5qnu2KYTI+dWvtAW32fmNNOnVXI5BsLd8zgnY3buTft43QuVt54zrjhs7QHWlI1Uv4LdLRTXCAxWSwm4t8t0VgXAnOKScJK+3dEFDSLCj6lmcnXn/6Tf3eEIOUcLLa2c4vdEjSpcpUwyiWR3HcvfTcYevJy5fqhM3ubPa6M4jyXonBfoMZ9dqcQEjlhDCU3L3iiLHj5DtW3TE6hmGn8EfZ83RtcdQh2072jvr4cSFN+ktFAcpFMwZuBS0VIbEBK/ZjvWTUCRfJx8LhymEaiVuusJxNFktu++0hw1uQR47ZsrryDo= Content-Type: text/plain; charset="utf-8" Content-ID: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 10270f50-ba88-4771-0275-08d732fe121c X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Sep 2019 19:11:50.5280 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: yOHgIKtZY32lisAnrUznQDzIxjaAjfH+WY4EBlY2Gg8eRSXIxSmHE23W6oeON913 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1145 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 40.107.75.49 Subject: [Qemu-devel] [RFC 2 PATCH 02/16] hw/i386: Rename X86CPUTopoInfo structure to X86CPUTopoIDs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "qemu-devel@nongnu.org" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Rename few data structures related to X86 topology. X86CPUTopoIDs will have individual arch ids. Next patch introduces X86CPUTopoInfo which will have all topology information(like cores, threads etc..). Adds node_id and ccx_id. This will be required to support new epyc mode mode. There is no functional change. Signed-off-by: Babu Moger Reviewed-by: Eduardo Habkost --- hw/i386/pc.c | 60 ++++++++++++++++++++++------------------= ---- include/hw/i386/topology.h | 42 ++++++++++++++++--------------- 2 files changed, 52 insertions(+), 50 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 549c437050..ada445f8f3 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -2379,7 +2379,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_d= ev, int idx; CPUState *cs; CPUArchId *cpu_slot; - X86CPUTopoInfo topo; + X86CPUTopoIDs topo_ids; X86CPU *cpu =3D X86_CPU(dev); CPUX86State *env =3D &cpu->env; MachineState *ms =3D MACHINE(hotplug_dev); @@ -2432,12 +2432,12 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug= _dev, return; } =20 - topo.pkg_id =3D cpu->socket_id; - topo.die_id =3D cpu->die_id; - topo.core_id =3D cpu->core_id; - topo.smt_id =3D cpu->thread_id; + topo_ids.pkg_id =3D cpu->socket_id; + topo_ids.die_id =3D cpu->die_id; + topo_ids.core_id =3D cpu->core_id; + topo_ids.smt_id =3D cpu->thread_id; cpu->apic_id =3D apicid_from_topo_ids(pcms->smp_dies, smp_cores, - smp_threads, &topo); + smp_threads, &topo_ids); } =20 cpu_slot =3D pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx); @@ -2445,11 +2445,11 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug= _dev, MachineState *ms =3D MACHINE(pcms); =20 x86_topo_ids_from_apicid(cpu->apic_id, pcms->smp_dies, - smp_cores, smp_threads, &topo); + smp_cores, smp_threads, &topo_ids); error_setg(errp, "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with" " APIC ID %" PRIu32 ", valid index range 0:%d", - topo.pkg_id, topo.die_id, topo.core_id, topo.smt_id, + topo_ids.pkg_id, topo_ids.die_id, topo_ids.core_id, topo_ids.s= mt_id, cpu->apic_id, ms->possible_cpus->len - 1); return; } @@ -2467,34 +2467,34 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug= _dev, * once -smp refactoring is complete and there will be CPU private * CPUState::nr_cores and CPUState::nr_threads fields instead of globa= ls */ x86_topo_ids_from_apicid(cpu->apic_id, pcms->smp_dies, - smp_cores, smp_threads, &topo); - if (cpu->socket_id !=3D -1 && cpu->socket_id !=3D topo.pkg_id) { + smp_cores, smp_threads, &topo_ids); + if (cpu->socket_id !=3D -1 && cpu->socket_id !=3D topo_ids.pkg_id) { error_setg(errp, "property socket-id: %u doesn't match set apic-id= :" - " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, topo.pk= g_id); + " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, topo_id= s.pkg_id); return; } - cpu->socket_id =3D topo.pkg_id; + cpu->socket_id =3D topo_ids.pkg_id; =20 - if (cpu->die_id !=3D -1 && cpu->die_id !=3D topo.die_id) { + if (cpu->die_id !=3D -1 && cpu->die_id !=3D topo_ids.die_id) { error_setg(errp, "property die-id: %u doesn't match set apic-id:" - " 0x%x (die-id: %u)", cpu->die_id, cpu->apic_id, topo.die_id); + " 0x%x (die-id: %u)", cpu->die_id, cpu->apic_id, topo_ids.die_= id); return; } - cpu->die_id =3D topo.die_id; + cpu->die_id =3D topo_ids.die_id; =20 - if (cpu->core_id !=3D -1 && cpu->core_id !=3D topo.core_id) { + if (cpu->core_id !=3D -1 && cpu->core_id !=3D topo_ids.core_id) { error_setg(errp, "property core-id: %u doesn't match set apic-id:" - " 0x%x (core-id: %u)", cpu->core_id, cpu->apic_id, topo.core_i= d); + " 0x%x (core-id: %u)", cpu->core_id, cpu->apic_id, topo_ids.co= re_id); return; } - cpu->core_id =3D topo.core_id; + cpu->core_id =3D topo_ids.core_id; =20 - if (cpu->thread_id !=3D -1 && cpu->thread_id !=3D topo.smt_id) { + if (cpu->thread_id !=3D -1 && cpu->thread_id !=3D topo_ids.smt_id) { error_setg(errp, "property thread-id: %u doesn't match set apic-id= :" - " 0x%x (thread-id: %u)", cpu->thread_id, cpu->apic_id, topo.sm= t_id); + " 0x%x (thread-id: %u)", cpu->thread_id, cpu->apic_id, topo_id= s.smt_id); return; } - cpu->thread_id =3D topo.smt_id; + cpu->thread_id =3D topo_ids.smt_id; =20 if (hyperv_feat_enabled(cpu, HYPERV_FEAT_VPINDEX) && !kvm_hv_vpindex_settable()) { @@ -2840,14 +2840,14 @@ pc_cpu_index_to_props(MachineState *ms, unsigned cp= u_index) =20 static int64_t pc_get_default_cpu_node_id(const MachineState *ms, int idx) { - X86CPUTopoInfo topo; + X86CPUTopoIDs topo_ids; PCMachineState *pcms =3D PC_MACHINE(ms); =20 assert(idx < ms->possible_cpus->len); x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, pcms->smp_dies, ms->smp.cores, - ms->smp.threads, &topo); - return topo.pkg_id % nb_numa_nodes; + ms->smp.threads, &topo_ids); + return topo_ids.pkg_id % nb_numa_nodes; } =20 static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *ms) @@ -2869,22 +2869,22 @@ static const CPUArchIdList *pc_possible_cpu_arch_id= s(MachineState *ms) sizeof(CPUArchId) * max_cpus); ms->possible_cpus->len =3D max_cpus; for (i =3D 0; i < ms->possible_cpus->len; i++) { - X86CPUTopoInfo topo; + X86CPUTopoIDs topo_ids; =20 ms->possible_cpus->cpus[i].type =3D ms->cpu_type; ms->possible_cpus->cpus[i].vcpus_count =3D 1; ms->possible_cpus->cpus[i].arch_id =3D x86_cpu_apic_id_from_index(= pcms, i); x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, pcms->smp_dies, ms->smp.cores, - ms->smp.threads, &topo); + ms->smp.threads, &topo_ids); ms->possible_cpus->cpus[i].props.has_socket_id =3D true; - ms->possible_cpus->cpus[i].props.socket_id =3D topo.pkg_id; + ms->possible_cpus->cpus[i].props.socket_id =3D topo_ids.pkg_id; ms->possible_cpus->cpus[i].props.has_die_id =3D true; - ms->possible_cpus->cpus[i].props.die_id =3D topo.die_id; + ms->possible_cpus->cpus[i].props.die_id =3D topo_ids.die_id; ms->possible_cpus->cpus[i].props.has_core_id =3D true; - ms->possible_cpus->cpus[i].props.core_id =3D topo.core_id; + ms->possible_cpus->cpus[i].props.core_id =3D topo_ids.core_id; ms->possible_cpus->cpus[i].props.has_thread_id =3D true; - ms->possible_cpus->cpus[i].props.thread_id =3D topo.smt_id; + ms->possible_cpus->cpus[i].props.thread_id =3D topo_ids.smt_id; } return ms->possible_cpus; } diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h index 4ff5b2da6c..0637743cdf 100644 --- a/include/hw/i386/topology.h +++ b/include/hw/i386/topology.h @@ -45,12 +45,14 @@ */ typedef uint32_t apic_id_t; =20 -typedef struct X86CPUTopoInfo { +typedef struct X86CPUTopoIDs { unsigned pkg_id; unsigned die_id; unsigned core_id; unsigned smt_id; -} X86CPUTopoInfo; + unsigned node_id; + unsigned ccx_id; +} X86CPUTopoIDs; =20 /* Return the bit width needed for 'count' IDs */ @@ -122,12 +124,12 @@ static inline unsigned apicid_pkg_offset(unsigned nr_= dies, static inline apic_id_t apicid_from_topo_ids(unsigned nr_dies, unsigned nr_cores, unsigned nr_threads, - const X86CPUTopoInfo *topo) + const X86CPUTopoIDs *topo_ids) { - return (topo->pkg_id << apicid_pkg_offset(nr_dies, nr_cores, nr_threa= ds)) | - (topo->die_id << apicid_die_offset(nr_dies, nr_cores, nr_threa= ds)) | - (topo->core_id << apicid_core_offset(nr_dies, nr_cores, nr_threa= ds)) | - topo->smt_id; + return (topo_ids->pkg_id << apicid_pkg_offset(nr_dies, nr_cores, nr_t= hreads)) | + (topo_ids->die_id << apicid_die_offset(nr_dies, nr_cores, nr_t= hreads)) | + (topo_ids->core_id << apicid_core_offset(nr_dies, nr_cores, nr_= threads)) | + topo_ids->smt_id; } =20 /* Calculate thread/core/package IDs for a specific topology, @@ -137,12 +139,12 @@ static inline void x86_topo_ids_from_idx(unsigned nr_= dies, unsigned nr_cores, unsigned nr_threads, unsigned cpu_index, - X86CPUTopoInfo *topo) + X86CPUTopoIDs *topo_ids) { - topo->pkg_id =3D cpu_index / (nr_dies * nr_cores * nr_threads); - topo->die_id =3D cpu_index / (nr_cores * nr_threads) % nr_dies; - topo->core_id =3D cpu_index / nr_threads % nr_cores; - topo->smt_id =3D cpu_index % nr_threads; + topo_ids->pkg_id =3D cpu_index / (nr_dies * nr_cores * nr_threads); + topo_ids->die_id =3D cpu_index / (nr_cores * nr_threads) % nr_dies; + topo_ids->core_id =3D cpu_index / nr_threads % nr_cores; + topo_ids->smt_id =3D cpu_index % nr_threads; } =20 /* Calculate thread/core/package IDs for a specific topology, @@ -152,17 +154,17 @@ static inline void x86_topo_ids_from_apicid(apic_id_t= apicid, unsigned nr_dies, unsigned nr_cores, unsigned nr_threads, - X86CPUTopoInfo *topo) + X86CPUTopoIDs *topo_ids) { - topo->smt_id =3D apicid & + topo_ids->smt_id =3D apicid & ~(0xFFFFFFFFUL << apicid_smt_width(nr_dies, nr_cores, nr_threa= ds)); - topo->core_id =3D + topo_ids->core_id =3D (apicid >> apicid_core_offset(nr_dies, nr_cores, nr_threads)) & ~(0xFFFFFFFFUL << apicid_core_width(nr_dies, nr_cores, nr_thre= ads)); - topo->die_id =3D + topo_ids->die_id =3D (apicid >> apicid_die_offset(nr_dies, nr_cores, nr_threads)) & ~(0xFFFFFFFFUL << apicid_die_width(nr_dies, nr_cores, nr_threa= ds)); - topo->pkg_id =3D apicid >> apicid_pkg_offset(nr_dies, nr_cores, nr_thr= eads); + topo_ids->pkg_id =3D apicid >> apicid_pkg_offset(nr_dies, nr_cores, nr= _threads); } =20 /* Make APIC ID for the CPU 'cpu_index' @@ -174,9 +176,9 @@ static inline apic_id_t x86_apicid_from_cpu_idx(unsigne= d nr_dies, unsigned nr_threads, unsigned cpu_index) { - X86CPUTopoInfo topo; - x86_topo_ids_from_idx(nr_dies, nr_cores, nr_threads, cpu_index, &topo); - return apicid_from_topo_ids(nr_dies, nr_cores, nr_threads, &topo); + X86CPUTopoIDs topo_ids; + x86_topo_ids_from_idx(nr_dies, nr_cores, nr_threads, cpu_index, &topo_= ids); + return apicid_from_topo_ids(nr_dies, nr_cores, nr_threads, &topo_ids); } =20 #endif /* HW_I386_TOPOLOGY_H */